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ARM: dts: rv1109: remove the dts repeated with rv1126
Now the code has realized compatible with rv1109 and rv1126. It is no longer need these duplicate dts of rv1109. At the same time, the configuration of LP3 and DDR3 is the same. Remove them together for reduces maintenance work. Signed-off-by: Nickey Yang <nickey.yang@rock-chips.com> Change-Id: Ie732509aa821d37376a725fc12c358915c7d6869
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@@ -844,11 +844,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rv1108-evb.dtb \
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rv1109-38-v10-spi-nand.dtb \
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rv1109-ai-cam-ddr3-v1.dtb \
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rv1109-evb-ddr3-v10.dtb \
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rv1109-evb-ddr3-v12.dtb \
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rv1109-evb-ddr3-v12-facial-gate.dtb \
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rv1109-evb-ddr3-v12-tb-emmc.dtb \
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rv1109-evb-lp3-v10.dtb \
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rv1109-fpga.dtb \
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rv1126-38x38-v10-spi-nor.dtb \
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rv1126-ai-cam-ddr3-v1.dtb \
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@@ -862,7 +858,6 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rv1126-evb-ddr3-v12-tb-emmc.dtb \
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rv1126-evb-ddr3-v12-tb-spi-nor.dtb \
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rv1126-evb-ddr3-v13.dtb \
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rv1126-evb-lp3-v10.dtb \
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rv1126-iotest-v10.dtb \
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rv1126-ipc2-ddr3-v10.dtb \
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rv1126-sphericalipc-ddr3-v10.dtb \
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@@ -1,17 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
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*/
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/dts-v1/;
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#include "rv1109.dtsi"
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#include "rv11xx-evb-v10.dtsi"
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/ {
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model = "Rockchip RV1109 EVB DDR3 Board";
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compatible = "rockchip,rv1109-evb-ddr3-v10", "rockchip,rv1109";
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chosen {
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bootargs = "earlycon=uart8250,mmio32,0xff570000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=ext4 rootwait snd_aloop.index=7";
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};
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};
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@@ -1,19 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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*/
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/dts-v1/;
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#include "rv1109.dtsi"
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#include "rv11xx-evb-v12.dtsi"
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#include "rv11xx-thunder-boot-emmc.dtsi"
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#include "rv11xx-evb-thunder-boot.dtsi"
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/ {
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model = "Rockchip RV1109 EVB DDR3 V12 with eMMC (Thunder Boot)";
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compatible = "rockchip,rv1109-evb-ddr3-v12-tb-emmc", "rockchip,rv1109";
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chosen {
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bootargs = "loglevel=0 initcall_nr_threads=-1 initcall_debug=0 printk.devkmsg=on root=/dev/rd0 console=ttyFIQ0 snd_aloop.index=7 driver_async_probe=dwmmc_rockchip rk.root2nd=/dev/mmcblk0p7";
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};
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};
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@@ -1,15 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2020 Rockchip Electronics Co., Ltd.
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*/
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/dts-v1/;
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#include "rv1109.dtsi"
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#include "rv11xx-evb-v12.dtsi"
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/ {
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model = "Rockchip RV1109 EVB DDR3 Board";
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compatible = "rockchip,rv1109-evb-ddr3-v12", "rockchip,rv1109";
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chosen {
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bootargs = "earlycon=uart8250,mmio32,0xff570000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=ext4 rootwait snd_aloop.index=7";
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};
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};
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@@ -1,18 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
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*/
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/dts-v1/;
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#include "rv1109.dtsi"
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#include "rv11xx-evb-v10.dtsi"
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/ {
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model = "Rockchip RV1109 EVB LPDDR3 Board";
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compatible = "rockchip,rv1109-evb-lp3-v10", "rockchip,rv1109";
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chosen {
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bootargs = "earlycon=uart8250,mmio32,0xff570000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=ext4 rootwait snd_aloop.index=7";
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};
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};
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@@ -1,18 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd.
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*/
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/dts-v1/;
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#include "rv1126.dtsi"
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#include "rv11xx-evb-v10.dtsi"
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/ {
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model = "Rockchip RV1126 EVB LPDDR3 Board";
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compatible = "rockchip,rv1126-evb-lp3-v10", "rockchip,rv1126";
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chosen {
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bootargs = "earlycon=uart8250,mmio32,0xff570000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=ext4 rootwait snd_aloop.index=7";
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};
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};
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