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pinctrl: rockchip: Add slew rate support

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The origin commit is 'pinctrl: rockchip: Add slew rate support for
px30', this commit only pick the support codes without px30, that will
be supported in another path.

The usage of slew rate is needed to config it at DTS,
such as:
  fast speed: slew-rate = <1>;
  slew speed: slew-rate = <0>;

Change-Id: Iefa9c15a35c6c1e94f716f5d6dd7e30d20a7293f
Signed-off-by: David Wu <david.wu@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
This commit is contained in:
Jianqun Xu
2021-04-02 14:19:34 +08:00
parent 68c7a8b0f4
commit e81f2fafc9
1 changed files with 67 additions and 0 deletions
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67
drivers/pinctrl/pinctrl-rockchip.c
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@@ -428,6 +428,9 @@ struct rockchip_pin_ctrl {
int (*schmitt_calc_reg)(struct rockchip_pin_bank *bank,
int pin_num, struct regmap **regmap,
int *reg, u8 *bit);
int (*slew_rate_calc_reg)(struct rockchip_pin_bank *bank,
int pin_num, struct regmap **regmap,
int *reg, u8 *bit);
};
struct rockchip_pin_config {
@@ -2838,6 +2841,51 @@ static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
return regmap_update_bits(regmap, reg, rmask, data);
}
static int rockchip_get_slew_rate(struct rockchip_pin_bank *bank, int pin_num)
{
struct rockchip_pinctrl *info = bank->drvdata;
struct rockchip_pin_ctrl *ctrl = info->ctrl;
struct regmap *regmap;
int reg, ret;
u8 bit;
u32 data;
ret = ctrl->slew_rate_calc_reg(bank, pin_num, &regmap, &reg, &bit);
if (ret)
return ret;
ret = regmap_read(regmap, reg, &data);
if (ret)
return ret;
data >>= bit;
return data & 0x1;
}
static int rockchip_set_slew_rate(struct rockchip_pin_bank *bank,
int pin_num, int speed)
{
struct rockchip_pinctrl *info = bank->drvdata;
struct rockchip_pin_ctrl *ctrl = info->ctrl;
struct regmap *regmap;
int reg, ret;
u8 bit;
u32 data, rmask;
dev_dbg(info->dev, "setting slew rate of GPIO%d-%d to %d\n",
bank->bank_num, pin_num, speed);
ret = ctrl->slew_rate_calc_reg(bank, pin_num, &regmap, &reg, &bit);
if (ret)
return ret;
/* enable the write to the equivalent lower bits */
data = BIT(bit + 16) | (speed << bit);
rmask = BIT(bit + 16) | BIT(bit);
return regmap_update_bits(regmap, reg, rmask, data);
}
/*
* Pinmux_ops handling
*/
@@ -3077,6 +3125,15 @@ static int rockchip_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
if (rc < 0)
return rc;
break;
case PIN_CONFIG_SLEW_RATE:
if (!info->ctrl->slew_rate_calc_reg)
return -ENOTSUPP;
rc = rockchip_set_slew_rate(bank,
pin - bank->pin_base, arg);
if (rc < 0)
return rc;
break;
default:
return -ENOTSUPP;
break;
@@ -3145,6 +3202,16 @@ static int rockchip_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
if (rc < 0)
return rc;
arg = rc;
break;
case PIN_CONFIG_SLEW_RATE:
if (!info->ctrl->slew_rate_calc_reg)
return -ENOTSUPP;
rc = rockchip_get_slew_rate(bank, pin - bank->pin_base);
if (rc < 0)
return rc;
arg = rc;
break;
default: