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cpufreq: rockchip: Add support to change read margin for dsu
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Change-Id: I6bb6bcdf2ac169deb668e004d823b9dc1fdc4033
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@@ -186,7 +186,7 @@ static int rk3588_cpu_set_read_margin(struct device *dev,
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u32 rm;
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int i;
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if (!opp_info->grf || !opp_info->volt_rm_tbl)
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if (!opp_info->volt_rm_tbl)
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return 0;
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for (i = 0; opp_info->volt_rm_tbl[i].rm != VOLT_RM_TABLE_END; i++) {
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@@ -203,12 +203,24 @@ static int rk3588_cpu_set_read_margin(struct device *dev,
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return 0;
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dev_dbg(dev, "set rm to %d\n", rm);
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regmap_write(opp_info->grf, 0x20, 0x001c0000 | (rm << 2));
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regmap_write(opp_info->grf, 0x28, 0x003c0000 | (rm << 2));
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regmap_write(opp_info->grf, 0x2c, 0x003c0000 | (rm << 2));
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regmap_write(opp_info->grf, 0x30, 0x00200020);
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udelay(1);
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regmap_write(opp_info->grf, 0x30, 0x00200000);
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if (opp_info->grf) {
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regmap_write(opp_info->grf, 0x20, 0x001c0000 | (rm << 2));
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regmap_write(opp_info->grf, 0x28, 0x003c0000 | (rm << 2));
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regmap_write(opp_info->grf, 0x2c, 0x003c0000 | (rm << 2));
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regmap_write(opp_info->grf, 0x30, 0x00200020);
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udelay(1);
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regmap_write(opp_info->grf, 0x30, 0x00200000);
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}
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if (opp_info->dsu_grf) {
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regmap_write(opp_info->dsu_grf, 0x20, 0x001c0000 | (rm << 2));
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regmap_write(opp_info->dsu_grf, 0x28, 0x003c0000 | (rm << 2));
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regmap_write(opp_info->dsu_grf, 0x2c, 0x003c0000 | (rm << 2));
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regmap_write(opp_info->dsu_grf, 0x30, 0x001c0000 | (rm << 2));
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regmap_write(opp_info->dsu_grf, 0x38, 0x001c0000 | (rm << 2));
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regmap_write(opp_info->dsu_grf, 0x18, 0x40004000);
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udelay(1);
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regmap_write(opp_info->dsu_grf, 0x18, 0x40000000);
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}
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opp_info->current_rm = rm;
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@@ -326,6 +338,18 @@ static int rockchip_cpufreq_set_volt(struct device *dev,
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return ret;
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}
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static int rockchip_cpufreq_set_read_margin(struct device *dev,
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struct rockchip_opp_info *opp_info,
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unsigned long volt)
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{
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if (opp_info->data && opp_info->data->set_read_margin) {
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opp_info->data->set_read_margin(dev, opp_info, volt);
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opp_info->volt_rm = volt;
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}
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return 0;
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}
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static int cpu_opp_helper(struct dev_pm_set_opp_data *data)
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{
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struct dev_pm_opp_supply *old_supply_vdd = &data->old_opp.supplies[0];
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@@ -357,9 +381,8 @@ static int cpu_opp_helper(struct dev_pm_set_opp_data *data)
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"vdd");
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if (ret)
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goto restore_voltage;
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if (opp_info->data->set_read_margin)
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opp_info->data->set_read_margin(dev, opp_info,
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new_supply_vdd->u_volt);
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rockchip_cpufreq_set_read_margin(dev, opp_info,
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new_supply_vdd->u_volt);
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}
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/* Change frequency */
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@@ -373,9 +396,8 @@ static int cpu_opp_helper(struct dev_pm_set_opp_data *data)
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/* Scaling down? Scale voltage after frequency */
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if (new_freq < old_freq) {
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if (opp_info->data->set_read_margin)
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opp_info->data->set_read_margin(dev, opp_info,
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new_supply_vdd->u_volt);
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rockchip_cpufreq_set_read_margin(dev, opp_info,
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new_supply_vdd->u_volt);
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ret = rockchip_cpufreq_set_volt(dev, vdd_reg, new_supply_vdd,
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"vdd");
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if (ret)
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@@ -393,9 +415,8 @@ restore_freq:
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dev_err(dev, "%s: failed to restore old-freq (%lu Hz)\n",
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__func__, old_freq);
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restore_rm:
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if (opp_info->data->set_read_margin)
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opp_info->data->set_read_margin(dev, opp_info,
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old_supply_vdd->u_volt);
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rockchip_cpufreq_set_read_margin(dev, opp_info,
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old_supply_vdd->u_volt);
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restore_voltage:
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rockchip_cpufreq_set_volt(dev, mem_reg, old_supply_mem, "mem");
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rockchip_cpufreq_set_volt(dev, vdd_reg, old_supply_vdd, "vdd");
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@@ -448,6 +469,10 @@ static int rockchip_cpufreq_cluster_init(int cpu, struct cluster_info *cluster)
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"rockchip,grf");
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if (IS_ERR(opp_info->grf))
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opp_info->grf = NULL;
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opp_info->dsu_grf =
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syscon_regmap_lookup_by_phandle(np, "rockchip,dsu-grf");
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if (IS_ERR(opp_info->dsu_grf))
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opp_info->dsu_grf = NULL;
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rockchip_get_volt_rm_table(dev, np, "volt-mem-read-margin",
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&opp_info->volt_rm_tbl);
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}
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@@ -27,6 +27,7 @@ struct rockchip_opp_info {
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const struct rockchip_opp_data *data;
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struct volt_rm_table *volt_rm_tbl;
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struct regmap *grf;
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struct regmap *dsu_grf;
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struct clk_bulk_data *clks;
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int num_clks;
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unsigned long volt_rm;
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