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@@ -293,7 +293,7 @@ static void lcdc_read_reg_defalut_cfg(struct lcdc_device *lcdc_dev)
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/********do basic init*********/
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static int rk3288_lcdc_pre_init(struct rk_lcdc_driver *dev_drv)
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{
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int v,i;
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int v;
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u32 mask,val;
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struct lcdc_device *lcdc_dev = container_of(dev_drv,
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struct
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@@ -3119,42 +3119,60 @@ static int rk3288_lcdc_get_dsp_addr(struct rk_lcdc_driver *dev_drv,unsigned int
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return 0;
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}
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static int rk3288_lcdc_set_dsp_cabc(struct rk_lcdc_driver *dev_drv,int mode)
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static struct lcdc_cabc_mode cabc_mode[5] = {
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/* pixel_num, stage_up, stage_down */
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{5, 2, 2}, /*mode 1*/
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{10, 2, 2}, /*mode 2*/
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{15, 2, 2}, /*mode 3*/
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{20, 2, 2}, /*mode 4*/
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{20, 128, 0}, /*mode 5*/
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};
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static int rk3288_lcdc_set_dsp_cabc(struct rk_lcdc_driver *dev_drv, int mode)
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{
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struct lcdc_device *lcdc_dev =
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container_of(dev_drv, struct lcdc_device, driver);
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struct rk_screen *screen = dev_drv->cur_screen;
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int total_pixel,calc_pixel,stage_up,stage_down;
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u32 mask=0, val=0;
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int total_pixel, calc_pixel, stage_up, stage_down;
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u32 mask = 0, val = 0;
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u32 cabc_mode[5][3]={
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/*num ,up, down*/
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{2, 10, 10}, /*mode 1*/
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{4, 10, 10}, /*mode 2*/
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{6, 10, 10}, /*mode 3*/
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{8, 10, 10}, /*mode 4*/
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{10, 10, 10}, /*mode 5*/
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};
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/*iomux connect to vop or pwm*/
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if(mode == 0){
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DBG(3,"close cabc\n");
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dev_drv->cabc_mode = mode;
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/* iomux connect to vop or pwm */
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if (mode == 0) { /* select rk pwm */
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DBG(3, "close cabc and select rk pwm\n");
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val = 0x30001;
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writel_relaxed(val, RK_GRF_VIRT + RK3288_GRF_GPIO7A_IOMUX);/*pwm sel*/
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lcdc_set_bit(lcdc_dev, SYS_CTRL, 0<<23);/*disable auto gating*/
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mask = m_CABC_EN;
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val = v_CABC_EN(0);
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lcdc_set_bit(lcdc_dev, SYS_CTRL, m_AUTO_GATING_EN);
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/*lcdc_msk_reg(lcdc_dev, CABC_CTRL0, mask, val);*/
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writel_relaxed(val, RK_GRF_VIRT + RK3288_GRF_GPIO7A_IOMUX);
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spin_lock(&lcdc_dev->reg_lock);
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if(lcdc_dev->clk_on) {
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lcdc_msk_reg(lcdc_dev, CABC_CTRL0, m_CABC_EN, v_CABC_EN(0));
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lcdc_cfg_done(lcdc_dev);
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}
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spin_unlock(&lcdc_dev->reg_lock);
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return 0;
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} else if (mode == 99) { /* select vop pwm */
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DBG(3, "close cabc and select vop pwm\n");
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val = (dev_drv->id == 0) ? 0x30002 : 0x30003;
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writel_relaxed(val, RK_GRF_VIRT + RK3288_GRF_GPIO7A_IOMUX);
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spin_lock(&lcdc_dev->reg_lock);
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if(lcdc_dev->clk_on) {
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lcdc_msk_reg(lcdc_dev, CABC_CTRL0, m_CABC_EN, v_CABC_EN(0));
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lcdc_cfg_done(lcdc_dev);
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}
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spin_unlock(&lcdc_dev->reg_lock);
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return 0;
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} else {
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val = (dev_drv->id == 0) ? 0x30002 : 0x30003;
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writel_relaxed(val, RK_GRF_VIRT + RK3288_GRF_GPIO7A_IOMUX);
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}
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total_pixel = screen->mode.xres * screen->mode.yres;
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calc_pixel = total_pixel * (100 - cabc_mode[mode-1][0])/100;
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stage_up = cabc_mode[mode-1][1];
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stage_down = cabc_mode[mode-1][2];
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calc_pixel = total_pixel * (100 - cabc_mode[mode - 1].pixel_num) / 100;
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stage_up = cabc_mode[mode - 1].stage_up;
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stage_down = cabc_mode[mode - 1].stage_down;
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spin_lock(&lcdc_dev->reg_lock);
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if(lcdc_dev->clk_on){
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lcdc_msk_reg(lcdc_dev, CABC_CTRL0, mask, val);
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if(lcdc_dev->clk_on) {
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mask = m_CABC_TOTAL_NUM | m_CABC_STAGE_DOWN;
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val = v_CABC_TOTAL_NUM(total_pixel) | v_CABC_STAGE_DOWN(stage_down);
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lcdc_msk_reg(lcdc_dev, CABC_CTRL1, mask, val);
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@@ -3167,8 +3185,7 @@ static int rk3288_lcdc_set_dsp_cabc(struct rk_lcdc_driver *dev_drv,int mode)
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lcdc_cfg_done(lcdc_dev);
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}
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spin_unlock(&lcdc_dev->reg_lock);
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val = 0x30003;
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writel_relaxed(val, RK_GRF_VIRT + RK3288_GRF_GPIO7A_IOMUX);/*pwm sel*/
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return 0;
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}
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/*
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@@ -3479,6 +3496,11 @@ static int rk3288_lcdc_parse_dt(struct lcdc_device *lcdc_dev)
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else
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lcdc_dev->prop = val;
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if (of_property_read_u32(np, "rockchip,cabc_mode", &val))
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lcdc_dev->driver.cabc_mode = 0; /* default set close cabc */
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else
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lcdc_dev->driver.cabc_mode = val;
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if (of_property_read_u32(np, "rockchip,pwr18", &val))
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lcdc_dev->pwr18 = false; /*default set it as 3.xv power supply */
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else
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