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https://github.com/hardkernel/linux.git
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Merge commit 'b97e3d77e750d210dc742b2f8c675143ee85de0e'
* commit 'b97e3d77e750d210dc742b2f8c675143ee85de0e': ARM: dts: rockchip: add rv1106 dual sensor v11 extboard dts. ARM: configs: rk3308_linux_aarch32_defconfig: enable rk816 pmic Change-Id: Ibe04cd56326e6b5a1a0a900d70fc14a5d10fc7b1
This commit is contained in:
@@ -1147,6 +1147,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
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rv1106g-evb1-v10-spi-nand.dtb \
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rv1106g-evb1-v10-spi-nor.dtb \
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rv1106g-evb1-v11-nofastae-spi-nand.dtb \
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rv1106g-evb1-v11-ext-dual-sensor.dtb \
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rv1106g-evb2-v10.dtb \
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rv1106g-evb2-v10-dual-camera.dtb \
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rv1106g-evb2-v11-emmc.dtb \
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246
arch/arm/boot/dts/rv1106g-dual-sensor-extboard.dtsi
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246
arch/arm/boot/dts/rv1106g-dual-sensor-extboard.dtsi
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@@ -0,0 +1,246 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
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*
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* Version Sensor I2C_ADDR Lanes
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* v1.0.0 os04a10 0x36 lane0~1(dphy1)
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* sc4336 0x30 lane2~3(dphy2)
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* v1.1.0 gc2053 0x37 lane0~1(dphy1)
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* gc2053 0x3f lane2~3(dphy2)
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*/
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&csi2_dphy_hw {
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status = "okay";
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};
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&csi2_dphy1 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy_input0: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&ahd_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi_csi2_input>;
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};
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};
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};
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};
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&csi2_dphy2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy_input1: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&sc3336_out>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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csi_dphy_output1: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&mipi1_csi2_input>;
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};
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};
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};
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};
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&i2c4 {
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status = "okay";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&i2c4m2_xfer>;
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tp9951_00: tp9951@45 {
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compatible = "techpoint,tp9951";
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status = "okay";
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reg = <0x45>;
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clocks = <&cru MCLK_REF_MIPI0>;
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clock-names = "xvclk";
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reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>;
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power-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_refclk_out0>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "front";
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rockchip,camera-module-name = "tp9951";
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rockchip,camera-module-lens-name = "tp9951";
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port {
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ahd_out: endpoint {
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remote-endpoint = <&csi_dphy_input0>;
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data-lanes = <1 2>;
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};
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};
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};
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sc3336: sc3336@30 {
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compatible = "smartsens,sc3336";
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status = "okay";
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reg = <0x30>;
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clocks = <&cru MCLK_REF_MIPI1>;
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clock-names = "xvclk";
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reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
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// pwdn-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_refclk_out1>;
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rockchip,camera-module-index = <1>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "OT01";
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rockchip,camera-module-lens-name = "40IRC_F16";
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port {
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sc3336_out: endpoint {
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remote-endpoint = <&csi_dphy_input1>;
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data-lanes = <1 2>;
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};
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};
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};
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};
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&mipi0_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csi_dphy_output>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in>;
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};
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};
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};
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};
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&mipi1_csi2 {
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status = "okay";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi1_csi2_input: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&csi_dphy_output1>;
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};
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};
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port@1 {
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reg = <1>;
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#address-cells = <1>;
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#size-cells = <0>;
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mipi1_csi2_output: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&cif_mipi_in1>;
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};
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};
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};
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};
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&rkcif {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_pins>;
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};
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&rkcif_mipi_lvds {
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status = "okay";
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port {
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/* MIPI CSI-2 endpoint */
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cif_mipi_in: endpoint {
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remote-endpoint = <&mipi_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds1 {
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status = "okay";
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port {
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/* MIPI CSI-2 endpoint */
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cif_mipi_in1: endpoint {
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remote-endpoint = <&mipi1_csi2_output>;
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};
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};
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};
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&rkcif_mipi_lvds1_sditf {
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status = "okay";
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port {
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/* MIPI CSI-2 endpoint */
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mipi_lvds1_sditf: endpoint {
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remote-endpoint = <&isp_in1>;
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};
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};
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};
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&rkisp {
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status = "okay";
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};
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&rkisp_vir0 {
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status = "okay";
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port@0 {
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isp_in1: endpoint {
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remote-endpoint = <&mipi_lvds1_sditf>;
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};
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};
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};
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171
arch/arm/boot/dts/rv1106g-evb1-v11-ext-dual-sensor.dts
Normal file
171
arch/arm/boot/dts/rv1106g-evb1-v11-ext-dual-sensor.dts
Normal file
@@ -0,0 +1,171 @@
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
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*/
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/dts-v1/;
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#include "rv1106.dtsi"
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#include "rv1106-evb-v10.dtsi"
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#include "rv1106g-dual-sensor-extboard.dtsi"
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/ {
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model = "Rockchip RV1106G EVB1 V11 Board For Dual Camera";
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compatible = "rockchip,rv1106g-evb1-v11-dual-cam", "rockchip,rv1106";
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sdio_pwrseq: sdio-pwrseq {
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compatible = "mmc-pwrseq-simple";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_enable_h &wifi_vbat>;
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/*
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* On the module itself this is one of these (depending
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* on the actual card populated):
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* - SDIO_RESET_L_WL_REG_ON
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* - PDN (power down when low)
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*/
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post-power-on-delay-ms = <300>;
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reset-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>,
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<&gpio1 RK_PA0 GPIO_ACTIVE_LOW>;
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};
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vcc_1v8: vcc-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_1v8";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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vcc_3v3: vcc-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "vcc_3v3";
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regulator-always-on;
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regulator-boot-on;
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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vcc3v3_sd: vcc3v3-sd {
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compatible = "regulator-fixed";
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gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>;
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regulator-name = "vcc3v3_sd";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_pwren>;
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};
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vccio_sd: vccio-sd {
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compatible = "regulator-gpio";
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regulator-name = "vccio_sd";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <3300000>;
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gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
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states = <3300000 1
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1800000 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc_volt>;
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};
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wireless_wlan: wireless-wlan {
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compatible = "wlan-platdata";
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wifi_chip_type = "rtl8189fs";
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pinctrl-names = "default";
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pinctrl-0 = <&wifi_host_wake_irq>;
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WIFI,host_wake_irq = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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};
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&pinctrl {
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sdio-pwrseq {
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wifi_enable_h: wifi-enable-h {
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rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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wifi_vbat: wifi-vbat {
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rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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sdmmc {
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/omit-if-no-ref/
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sdmmc_pwren: sdmmc-pwren {
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rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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/omit-if-no-ref/
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sdmmc_volt: sdmmc-volt {
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rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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usb {
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usb_pwren: usb-pwren {
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rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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wireless-wlan {
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wifi_host_wake_irq: wifi-host-wake-irq {
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rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&sdio {
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max-frequency = <200000000>;
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no-sd;
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no-mmc;
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bus-width = <4>;
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cap-sd-highspeed;
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cap-sdio-irq;
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keep-power-in-suspend;
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mmc-pwrseq = <&sdio_pwrseq>;
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non-removable;
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sd-uhs-sdr104;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc1m0_cmd &sdmmc1m0_clk &sdmmc1m0_bus4 &clk_32k>;
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status = "okay";
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};
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&sdmmc {
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max-frequency = <200000000>;
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no-sdio;
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no-mmc;
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bus-width = <4>;
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cap-mmc-highspeed;
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cap-sd-highspeed;
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disable-wp;
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pinctrl-names = "default";
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pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
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sd-uhs-sdr12;
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sd-uhs-sdr25;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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vmmc-supply = <&vcc3v3_sd>;
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vqmmc-supply = <&vccio_sd>;
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status = "okay";
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};
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&sfc {
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status = "okay";
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flash@0 {
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compatible = "spi-nand";
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reg = <0>;
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spi-max-frequency = <75000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <1>;
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};
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};
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&u2phy_otg {
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/delete-property/ vbus-supply;
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};
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&usbdrd_dwc3 {
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dr_mode = "peripheral";
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};
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@@ -142,6 +142,7 @@ CONFIG_GPIO_SYSFS=y
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CONFIG_POWER_RESET=y
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CONFIG_SYSCON_REBOOT_MODE=y
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CONFIG_POWER_SUPPLY=y
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CONFIG_BATTERY_RK816=y
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# CONFIG_HWMON is not set
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CONFIG_THERMAL=y
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CONFIG_THERMAL_WRITABLE_TRIPS=y
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@@ -151,9 +152,11 @@ CONFIG_DEVFREQ_THERMAL=y
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CONFIG_ROCKCHIP_THERMAL=y
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CONFIG_WATCHDOG=y
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CONFIG_DW_WATCHDOG=y
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CONFIG_MFD_RK808=y
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CONFIG_REGULATOR_FIXED_VOLTAGE=y
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CONFIG_REGULATOR_GPIO=y
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CONFIG_REGULATOR_PWM=y
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CONFIG_REGULATOR_RK808=y
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CONFIG_MEDIA_SUPPORT=y
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CONFIG_SOUND=y
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CONFIG_SND=y
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@@ -195,9 +198,11 @@ CONFIG_LEDS_TRIGGER_ONESHOT=y
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CONFIG_LEDS_TRIGGER_HEARTBEAT=y
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CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
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CONFIG_RTC_CLASS=y
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CONFIG_RTC_DRV_RK808=y
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CONFIG_DMADEVICES=y
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CONFIG_PL330_DMA=y
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CONFIG_STAGING=y
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CONFIG_COMMON_CLK_RK808=y
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# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
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# CONFIG_IOMMU_SUPPORT is not set
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CONFIG_CPU_RK3308=y
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