Merge commit 'b97e3d77e750d210dc742b2f8c675143ee85de0e'

* commit 'b97e3d77e750d210dc742b2f8c675143ee85de0e':
  ARM: dts: rockchip: add rv1106 dual sensor v11 extboard dts.
  ARM: configs: rk3308_linux_aarch32_defconfig: enable rk816 pmic

Change-Id: Ibe04cd56326e6b5a1a0a900d70fc14a5d10fc7b1
This commit is contained in:
Tao Huang
2023-12-11 17:38:03 +08:00
4 changed files with 423 additions and 0 deletions

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@@ -1147,6 +1147,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rv1106g-evb1-v10-spi-nand.dtb \
rv1106g-evb1-v10-spi-nor.dtb \
rv1106g-evb1-v11-nofastae-spi-nand.dtb \
rv1106g-evb1-v11-ext-dual-sensor.dtb \
rv1106g-evb2-v10.dtb \
rv1106g-evb2-v10-dual-camera.dtb \
rv1106g-evb2-v11-emmc.dtb \

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@@ -0,0 +1,246 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
*
* Version Sensor I2C_ADDR Lanes
* v1.0.0 os04a10 0x36 lane0~1(dphy1)
* sc4336 0x30 lane2~3(dphy2)
* v1.1.0 gc2053 0x37 lane0~1(dphy1)
* gc2053 0x3f lane2~3(dphy2)
*/
&csi2_dphy_hw {
status = "okay";
};
&csi2_dphy1 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
csi_dphy_input0: endpoint@1 {
reg = <1>;
remote-endpoint = <&ahd_out>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csi_dphy_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_csi2_input>;
};
};
};
};
&csi2_dphy2 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
csi_dphy_input1: endpoint@1 {
reg = <1>;
remote-endpoint = <&sc3336_out>;
data-lanes = <1 2>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csi_dphy_output1: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi1_csi2_input>;
};
};
};
};
&i2c4 {
status = "okay";
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&i2c4m2_xfer>;
tp9951_00: tp9951@45 {
compatible = "techpoint,tp9951";
status = "okay";
reg = <0x45>;
clocks = <&cru MCLK_REF_MIPI0>;
clock-names = "xvclk";
reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>;
power-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipi_refclk_out0>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "front";
rockchip,camera-module-name = "tp9951";
rockchip,camera-module-lens-name = "tp9951";
port {
ahd_out: endpoint {
remote-endpoint = <&csi_dphy_input0>;
data-lanes = <1 2>;
};
};
};
sc3336: sc3336@30 {
compatible = "smartsens,sc3336";
status = "okay";
reg = <0x30>;
clocks = <&cru MCLK_REF_MIPI1>;
clock-names = "xvclk";
reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
// pwdn-gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipi_refclk_out1>;
rockchip,camera-module-index = <1>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "OT01";
rockchip,camera-module-lens-name = "40IRC_F16";
port {
sc3336_out: endpoint {
remote-endpoint = <&csi_dphy_input1>;
data-lanes = <1 2>;
};
};
};
};
&mipi0_csi2 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csi_dphy_output>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in>;
};
};
};
};
&mipi1_csi2 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi1_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csi_dphy_output1>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi1_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in1>;
};
};
};
};
&rkcif {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mipi_pins>;
};
&rkcif_mipi_lvds {
status = "okay";
port {
/* MIPI CSI-2 endpoint */
cif_mipi_in: endpoint {
remote-endpoint = <&mipi_csi2_output>;
};
};
};
&rkcif_mipi_lvds1 {
status = "okay";
port {
/* MIPI CSI-2 endpoint */
cif_mipi_in1: endpoint {
remote-endpoint = <&mipi1_csi2_output>;
};
};
};
&rkcif_mipi_lvds1_sditf {
status = "okay";
port {
/* MIPI CSI-2 endpoint */
mipi_lvds1_sditf: endpoint {
remote-endpoint = <&isp_in1>;
};
};
};
&rkisp {
status = "okay";
};
&rkisp_vir0 {
status = "okay";
port@0 {
isp_in1: endpoint {
remote-endpoint = <&mipi_lvds1_sditf>;
};
};
};

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@@ -0,0 +1,171 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
*/
/dts-v1/;
#include "rv1106.dtsi"
#include "rv1106-evb-v10.dtsi"
#include "rv1106g-dual-sensor-extboard.dtsi"
/ {
model = "Rockchip RV1106G EVB1 V11 Board For Dual Camera";
compatible = "rockchip,rv1106g-evb1-v11-dual-cam", "rockchip,rv1106";
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
pinctrl-0 = <&wifi_enable_h &wifi_vbat>;
/*
* On the module itself this is one of these (depending
* on the actual card populated):
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*/
post-power-on-delay-ms = <300>;
reset-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>,
<&gpio1 RK_PA0 GPIO_ACTIVE_LOW>;
};
vcc_1v8: vcc-1v8 {
compatible = "regulator-fixed";
regulator-name = "vcc_1v8";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
vcc_3v3: vcc-3v3 {
compatible = "regulator-fixed";
regulator-name = "vcc_3v3";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vcc3v3_sd: vcc3v3-sd {
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>;
regulator-name = "vcc3v3_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_pwren>;
};
vccio_sd: vccio-sd {
compatible = "regulator-gpio";
regulator-name = "vccio_sd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_HIGH>;
states = <3300000 1
1800000 0>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_volt>;
};
wireless_wlan: wireless-wlan {
compatible = "wlan-platdata";
wifi_chip_type = "rtl8189fs";
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>;
WIFI,host_wake_irq = <&gpio2 RK_PB0 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
&pinctrl {
sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>;
};
wifi_vbat: wifi-vbat {
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sdmmc {
/omit-if-no-ref/
sdmmc_pwren: sdmmc-pwren {
rockchip,pins = <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
/omit-if-no-ref/
sdmmc_volt: sdmmc-volt {
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
usb_pwren: usb-pwren {
rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&sdio {
max-frequency = <200000000>;
no-sd;
no-mmc;
bus-width = <4>;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
sd-uhs-sdr104;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc1m0_cmd &sdmmc1m0_clk &sdmmc1m0_bus4 &clk_32k>;
status = "okay";
};
&sdmmc {
max-frequency = <200000000>;
no-sdio;
no-mmc;
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_det &sdmmc0_bus4>;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
vmmc-supply = <&vcc3v3_sd>;
vqmmc-supply = <&vccio_sd>;
status = "okay";
};
&sfc {
status = "okay";
flash@0 {
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <75000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <1>;
};
};
&u2phy_otg {
/delete-property/ vbus-supply;
};
&usbdrd_dwc3 {
dr_mode = "peripheral";
};

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@@ -142,6 +142,7 @@ CONFIG_GPIO_SYSFS=y
CONFIG_POWER_RESET=y
CONFIG_SYSCON_REBOOT_MODE=y
CONFIG_POWER_SUPPLY=y
CONFIG_BATTERY_RK816=y
# CONFIG_HWMON is not set
CONFIG_THERMAL=y
CONFIG_THERMAL_WRITABLE_TRIPS=y
@@ -151,9 +152,11 @@ CONFIG_DEVFREQ_THERMAL=y
CONFIG_ROCKCHIP_THERMAL=y
CONFIG_WATCHDOG=y
CONFIG_DW_WATCHDOG=y
CONFIG_MFD_RK808=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y
CONFIG_REGULATOR_PWM=y
CONFIG_REGULATOR_RK808=y
CONFIG_MEDIA_SUPPORT=y
CONFIG_SOUND=y
CONFIG_SND=y
@@ -195,9 +198,11 @@ CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_RK808=y
CONFIG_DMADEVICES=y
CONFIG_PL330_DMA=y
CONFIG_STAGING=y
CONFIG_COMMON_CLK_RK808=y
# CONFIG_ARM_ARCH_TIMER_EVTSTREAM is not set
# CONFIG_IOMMU_SUPPORT is not set
CONFIG_CPU_RK3308=y