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arm64: dts: rockchip: vehicle-evb: update max96752 01ea register to default value

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Signed-off-by: Luo Wei <lw@rock-chips.com>
Change-Id: I87478539edfb3a3a5c8afd78369df3b90b2a756a
This commit is contained in:
Luo Wei
2024-11-15 16:49:58 +08:00
committed by Tao Huang
parent 59eb83b7aa
commit e9bbd6b68e
5 changed files with 22 additions and 43 deletions
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12
arch/arm64/boot/dts/rockchip/rk3576-vehicle-evb-v20-serdes-mfd-display-maxim.dtsi
View File

@@ -260,8 +260,8 @@
0057 0021
//Clock Select, X for portA, Y/Z for PortB
0308 0076
//Start DSI Port
0311 0061
//Start DSI-A Port
0311 0001
//Set Port A Lane Mapping
0332 004E
//Set Port B Lane Mapping
@@ -341,7 +341,7 @@
//Turn on video pipe
0002 0033
//Enable splitter mode reset one shot
0010 0023
0010 0021
ffff f000 //0xf000 ms delay
];
@@ -431,7 +431,7 @@
0050 0000
01ce 004e
01ea 0005
01ea 0004
];
i2c8_max96752_pinctrl: i2c8-max96752-pinctrl {
@@ -964,7 +964,7 @@
0050 0000
01ce 004e
01ea 0005
01ea 0004
];
i2c5_max96752_pinctrl: i2c5-max96752-pinctrl {
@@ -1490,7 +1490,7 @@
0050 0000
01ce 004e
01ea 0005
01ea 0004
];
i2c3_max96752_pinctrl: i2c3-max96752-pinctrl {

6
arch/arm64/boot/dts/rockchip/rk3576-vehicle-serdes-mfd-display-maxim-split.dtsi
View File

@@ -555,7 +555,7 @@
0050 0000
01ce 004e
01ea 0005
01ea 0004
];
i2c8_max96752_pinctrl: i2c8-max96752-pinctrl {
@@ -878,7 +878,7 @@
0050 0000
01ce 004e
01ea 0005
01ea 0004
];
i2c5_max96752_pinctrl: i2c5-max96752-pinctrl {
@@ -1005,7 +1005,7 @@
0050 0001
01ce 004e
01ea 0005
01ea 0004
];
i2c5_max96752_split_pinctrl: i2c5-max96752-split-pinctrl {

6
arch/arm64/boot/dts/rockchip/rk3576-vehicle-serdes-mfd-display-maxim.dtsi
View File

@@ -431,7 +431,7 @@
0050 0000
01ce 004e
01ea 0005
01ea 0004
];
i2c8_max96752_pinctrl: i2c8-max96752-pinctrl {
@@ -964,7 +964,7 @@
0050 0000
01ce 004e
01ea 0005
01ea 0004
];
i2c5_max96752_pinctrl: i2c5-max96752-pinctrl {
@@ -1490,7 +1490,7 @@
0050 0000
01ce 004e
01ea 0005
01ea 0004
];
i2c2_max96752_pinctrl: i2c2-max96752-pinctrl {

33
arch/arm64/boot/dts/rockchip/rk3588-vehicle-serdes-mfd-display-maxim-split.dtsi
View File

@@ -451,9 +451,6 @@
serdes-init-sequence = [
//Independent 11_07_17-56 Using MAX96789/91/F (GMSL-1/2)
//RESET ALL and delay
0010 00f1
ffff 1000
//Disable Video pipe
0002 0003
//Address Value of I2C SRC_A
@@ -653,9 +650,6 @@
serdes-init-sequence = [
/*max96752 dual oLDI output*/
//RESET ALL and delay
0010 00f1
ffff 1000
0002 0043
0073 0031
007b 0031
@@ -667,7 +661,7 @@
0050 0000
01ce 004e
01ea 0005
01ea 0004
];
i2c2_max96752_pinctrl: i2c2-max96752-pinctrl {
@@ -785,9 +779,6 @@
serdes-init-sequence = [
/*max96752 dual oLDI output*/
//RESET ALL and delay
0010 00f1
ffff 1000
0002 0043
0073 0032
007b 0032
@@ -800,7 +791,7 @@
//0140 0020
0050 0001
01ce 004e
01ea 0005
01ea 0004
];
i2c2_max96752_split_pinctrl: i2c2-max96752-split-pinctrl {
@@ -954,9 +945,6 @@
status = "okay";
serdes-init-sequence = [
//reset all and delay
0010 00f1
ffff 1000
//Address Value of I2C SRC_A
0042 008a
//Address Value of I2C DST_A
@@ -1343,9 +1331,6 @@
serdes-init-sequence = [
/*max96752 dual oLDI output*/
//RESET ALL and delay
0010 00f1
ffff 1000
0002 0043
0073 0031
007b 0031
@@ -1357,7 +1342,7 @@
0050 0000
01ce 004e
01ea 0005
01ea 0004
];
i2c4_max96752_pinctrl: i2c4-max96752-pinctrl {
@@ -1485,7 +1470,7 @@
//0140 0020
0050 0001
01ce 004e
01ea 0005
01ea 0004
];
i2c4_max96752_split_pinctrl: i2c4-max96752-split-pinctrl {
@@ -1633,9 +1618,6 @@
status = "disabled";
serdes-init-sequence = [
//reset all and delay
0010 00f1
ffff 1000
//Address Value of I2C SRC_A
0042 008a
//Address Value of I2C DST_A
@@ -2026,9 +2008,6 @@
serdes-init-sequence = [
/*max96752 dual oLDI output*/
//RESET ALL and delay
0010 00f1
ffff 1000
0002 0043
0073 0031
007b 0031
@@ -2040,7 +2019,7 @@
0050 0000
01ce 004e
01ea 0005
01ea 0004
];
i2c5_max96752_pinctrl: i2c5-max96752-pinctrl {
@@ -2169,7 +2148,7 @@
//0140 0020
0050 0001
01ce 004e
01ea 0005
01ea 0004
];
i2c5_max96752_split_pinctrl: i2c5-max96752-split-pinctrl {

8
arch/arm64/boot/dts/rockchip/rk3588-vehicle-serdes-mfd-display-maxim.dtsi
View File

@@ -661,7 +661,7 @@
0050 0000
01ce 004e
01ea 0005
01ea 0004
];
i2c2_max96752_pinctrl: i2c2-max96752-pinctrl {
@@ -791,7 +791,7 @@
//0140 0020
0050 0001
01ce 004e
01ea 0005
01ea 0004
];
i2c2_max96752_split_pinctrl: i2c2-max96752-split-pinctrl {
@@ -1328,7 +1328,7 @@
0050 0000
01ce 004e
01ea 0005
01ea 0004
];
i2c4_max96752_pinctrl: i2c4-max96752-pinctrl {
@@ -1849,7 +1849,7 @@
0050 0000
01ce 004e
01ea 0005
01ea 0004
];
i2c5_max96752_pinctrl: i2c5-max96752-pinctrl {