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ASoC: codecs: rv1106_codec: fixes and clean up DAC steps based on vendor DS_V1P8

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Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Change-Id: Ifeaec747dda09c6445309e15e43cdb8c30686959
This commit is contained in:
Xing Zheng
2023-02-03 18:32:02 +08:00
committed by Tao Huang
parent 4e71f3e843
commit ea6df1a5bb
1 changed files with 42 additions and 36 deletions
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78
sound/soc/codecs/rv1106_codec.c
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@@ -1051,87 +1051,96 @@ static int rv1106_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
static int rv1106_codec_dac_enable(struct rv1106_codec_priv *rv1106)
{
/* vendor step 1 */
/* Step 01 */
regmap_update_bits(rv1106->regmap, ACODEC_DAC_ANA_CTL0,
ACODEC_DAC_IBIAS_MSK,
ACODEC_DAC_IBIAS_EN);
udelay(20);
/* vendor step 2 */
/* Step 02 */
regmap_update_bits(rv1106->regmap, ACODEC_DAC_ANA_CTL0,
ACODEC_DAC_L_REF_VOL_BUF_MSK,
ACODEC_DAC_L_REF_VOL_BUF_EN);
/* Waiting the stable reference voltage */
mdelay(1);
usleep_range(1000, 2000);
/* vendor step 7 */
/* Step 03 */
regmap_update_bits(rv1106->regmap, ACODEC_DAC_ANA_CTL1,
ACODEC_DAC_L_LINEOUT_MSK,
ACODEC_DAC_L_LINEOUT_EN);
udelay(20);
/* vendor step 8 */
/* Step 04 */
regmap_update_bits(rv1106->regmap, ACODEC_DAC_ANA_CTL1,
ACODEC_DAC_L_LINEOUT_SIGNAL_MSK,
ACODEC_DAC_L_LINEOUT_SIGNAL_WORK);
udelay(20);
/* vendor step 11 */
/* Step 05 */
regmap_update_bits(rv1106->regmap, ACODEC_DAC_HPMIX_CTL,
ACODEC_DAC_HPMIX_MSK,
ACODEC_DAC_HPMIX_EN);
udelay(20);
/* Step 06 */
regmap_update_bits(rv1106->regmap, ACODEC_DAC_HPMIX_CTL,
ACODEC_DAC_HPMIX_MDL_MSK,
ACODEC_DAC_HPMIX_MDL_WORK);
udelay(20);
/* Step 07 */
regmap_update_bits(rv1106->regmap, ACODEC_DAC_HPMIX_CTL,
ACODEC_DAC_HPMIX_SEL_MSK,
ACODEC_DAC_HPMIX_I2S);
/* Waiting HPMIX be stable */
usleep_range(18000, 20000);
/* Step 08 */
regmap_update_bits(rv1106->regmap, ACODEC_DAC_ANA_CTL0,
ACODEC_DAC_L_REF_VOL_MSK,
ACODEC_DAC_L_REF_VOL_EN);
udelay(20);
/* vendor step 12 */
/* Step 09 */
regmap_update_bits(rv1106->regmap, ACODEC_DAC_ANA_CTL0,
ACODEC_DAC_L_CLK_MSK,
ACODEC_DAC_L_CLK_EN);
udelay(20);
/* vendor step 13 */
/* Step 10 */
regmap_update_bits(rv1106->regmap, ACODEC_DAC_ANA_CTL0,
ACODEC_DAC_SRC_SIGNAL_MSK,
ACODEC_DAC_SRC_SIGNAL_EN);
udelay(20);
/* vendor step 14 */
/* Step 11 */
regmap_update_bits(rv1106->regmap, ACODEC_DAC_ANA_CTL0,
ACODEC_DAC_L_SIGNAL_MSK,
ACODEC_DAC_L_SIGNAL_WORK);
udelay(20);
/* vendor step 15 */
/* Step 12 */
regmap_update_bits(rv1106->regmap, ACODEC_DAC_HPMIX_CTL,
ACODEC_DAC_HPMIX_MUTE_MSK,
ACODEC_DAC_HPMIX_WORK);
udelay(20);
/* Step 13 */
regmap_update_bits(rv1106->regmap, ACODEC_DAC_ANA_CTL1,
ACODEC_DAC_L_LINEOUT_MUTE_MSK,
ACODEC_DAC_L_LINEOUT_WORK);
udelay(20);
regmap_update_bits(rv1106->regmap, ACODEC_DAC_HPMIX_CTL,
ACODEC_DAC_HPMIX_MSK |
ACODEC_DAC_HPMIX_MDL_MSK |
ACODEC_DAC_HPMIX_MUTE_MSK |
ACODEC_DAC_HPMIX_SEL_MSK,
ACODEC_DAC_HPMIX_EN |
ACODEC_DAC_HPMIX_MDL_WORK |
ACODEC_DAC_HPMIX_WORK |
ACODEC_DAC_HPMIX_I2S);
/* Skip setting gains that Step 14/15 */
rv1106->dac_enable = true;
return 0;
}
static int rv1106_codec_dac_disable(struct rv1106_codec_priv *rv1106)
{
/* Step 01 */
/* Skip cleaning the gain to GAIN_LINEOUTL */
/* Step 02 */
regmap_update_bits(rv1106->regmap, ACODEC_DAC_ANA_CTL1,
ACODEC_DAC_L_LINEOUT_MUTE_MSK,
@@ -1170,20 +1179,17 @@ static int rv1106_codec_dac_disable(struct rv1106_codec_priv *rv1106)
regmap_update_bits(rv1106->regmap, ACODEC_DAC_ANA_CTL0,
ACODEC_DAC_L_REF_VOL_MSK,
ACODEC_DAC_L_REF_VOL_DIS);
/* Step 11, note: skip handing POP Sound */
/* Step 12 */
/* Step 11 */
regmap_update_bits(rv1106->regmap, ACODEC_DAC_ANA_CTL0,
ACODEC_DAC_L_REF_VOL_BUF_MSK,
ACODEC_DAC_L_REF_VOL_BUF_DIS);
/* Step 13 */
/* Step 12 */
regmap_update_bits(rv1106->regmap, ACODEC_DAC_ANA_CTL0,
ACODEC_DAC_IBIAS_MSK,
ACODEC_DAC_IBIAS_DIS);
/* Step 14 */
/* Step 13 */
regmap_update_bits(rv1106->regmap, ACODEC_DAC_ANA_CTL0,
ACODEC_DAC_L_SIGNAL_MSK,
ACODEC_DAC_L_SIGNAL_INIT);