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usb: dwc3: add dis_u2_freeclk_exists_quirk
Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit, which specifies whether the USB2.0 PHY provides a free-running PHY clock, which is active when the clock control input is active. Change-Id: I84ea6eeccb9fc2ea6d13ef586f1166d5fa132606 Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
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@@ -38,6 +38,9 @@ Optional properties:
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- snps,dis_u2_susphy_quirk: when set core will disable USB2 suspend phy.
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- snps,dis_enblslpm_quirk: when set clears the enblslpm in GUSB2PHYCFG,
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disabling the suspend signal to the PHY.
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- snps,dis_u2_freeclk_exists_quirk: when set, clear the u2_freeclk_exists
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in GUSB2PHYCFG, specify that USB2 PHY doesn't provide
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a free-running PHY clock.
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- snps,is-utmi-l1-suspend: true when DWC3 asserts output signal
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utmi_l1_suspend_n, false when asserts utmi_sleep_n
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- snps,hird-threshold: HIRD threshold
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@@ -519,6 +519,9 @@ static int dwc3_phy_setup(struct dwc3 *dwc)
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if (dwc->dis_enblslpm_quirk)
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reg &= ~DWC3_GUSB2PHYCFG_ENBLSLPM;
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if (dwc->dis_u2_freeclk_exists_quirk)
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reg &= ~DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS;
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dwc3_writel(dwc->regs, DWC3_GUSB2PHYCFG(0), reg);
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return 0;
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@@ -934,6 +937,8 @@ static int dwc3_probe(struct platform_device *pdev)
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"snps,dis_u2_susphy_quirk");
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dwc->dis_enblslpm_quirk = device_property_read_bool(dev,
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"snps,dis_enblslpm_quirk");
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dwc->dis_u2_freeclk_exists_quirk = device_property_read_bool(dev,
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"snps,dis_u2_freeclk_exists_quirk");
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dwc->tx_de_emphasis_quirk = device_property_read_bool(dev,
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"snps,tx_de_emphasis_quirk");
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@@ -968,6 +973,8 @@ static int dwc3_probe(struct platform_device *pdev)
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dwc->dis_u3_susphy_quirk = pdata->dis_u3_susphy_quirk;
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dwc->dis_u2_susphy_quirk = pdata->dis_u2_susphy_quirk;
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dwc->dis_enblslpm_quirk = pdata->dis_enblslpm_quirk;
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dwc->dis_u2_freeclk_exists_quirk =
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pdata->dis_u2_freeclk_exists_quirk;
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dwc->tx_de_emphasis_quirk = pdata->tx_de_emphasis_quirk;
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if (pdata->tx_de_emphasis)
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@@ -178,6 +178,7 @@
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/* Global USB2 PHY Configuration Register */
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#define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31)
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#define DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS (1 << 30)
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#define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6)
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#define DWC3_GUSB2PHYCFG_ULPI_UTMI (1 << 4)
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#define DWC3_GUSB2PHYCFG_ENBLSLPM (1 << 8)
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@@ -725,6 +726,9 @@ struct dwc3_scratchpad_array {
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* @dis_u2_susphy_quirk: set if we disable usb2 suspend phy
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* @dis_enblslpm_quirk: set if we clear enblslpm in GUSB2PHYCFG,
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* disabling the suspend signal to the PHY.
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* @dis_u2_freeclk_exists_quirk : set if we clear u2_freeclk_exists
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* in GUSB2PHYCFG, specify that USB2 PHY doesn't
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* provide a free-running PHY clock.
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* @tx_de_emphasis_quirk: set if we enable Tx de-emphasis quirk
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* @tx_de_emphasis: Tx de-emphasis value
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* 0 - -6dB de-emphasis
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@@ -870,6 +874,7 @@ struct dwc3 {
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unsigned dis_u3_susphy_quirk:1;
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unsigned dis_u2_susphy_quirk:1;
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unsigned dis_enblslpm_quirk:1;
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unsigned dis_u2_freeclk_exists_quirk:1;
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unsigned tx_de_emphasis_quirk:1;
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unsigned tx_de_emphasis:2;
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@@ -43,6 +43,7 @@ struct dwc3_platform_data {
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unsigned dis_u3_susphy_quirk:1;
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unsigned dis_u2_susphy_quirk:1;
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unsigned dis_enblslpm_quirk:1;
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unsigned dis_u2_freeclk_exists_quirk:1;
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unsigned tx_de_emphasis_quirk:1;
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unsigned tx_de_emphasis:2;
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