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media_module: fix phy 0 address poluted by video decoder [1/2]

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PD#SWPL-2372

Problem:
phy addr 0 - 0x100000 is reserved before. once it is released for system use.
it will be polluted by video decoder (avs2 & vp9).

Solution:
init hw addr (not 0) in decoder to avoid 0 address polluted

Verify:
local verified on U212.

Change-Id: I1e54d0aaefe8d4c513ea32d02c2a5867bb2f9197
Signed-off-by: Hui Zhang <hui.zhang@amlogic.com>
This commit is contained in:
Hui Zhang
2019-01-04 11:22:52 +08:00
committed by Dongjin Kim
parent 9411dbdd11
commit ea997a972b
2 changed files with 3 additions and 5 deletions
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3
drivers/amlogic/media_modules/frame_provider/decoder/avs2/vavs2.c
View File

@@ -3391,8 +3391,7 @@ static void avs2_config_work_space_hw(struct AVS2Decoder_s *dec)
#if 1
/*MULTI_INSTANCE_SUPPORT*/
/*new added in simulation???*/
if (get_cpu_major_id() >= AM_MESON_CPU_MAJOR_ID_GXLX2)
WRITE_VREG(HEVC_MPRED_ABV_START_ADDR, buf_spec->mpred_above.buf_start);
WRITE_VREG(HEVC_MPRED_ABV_START_ADDR, buf_spec->mpred_above.buf_start);
#endif
}

5
drivers/amlogic/media_modules/frame_provider/decoder/vp9/vvp9.c
View File

@@ -5232,10 +5232,9 @@ static void vp9_config_work_space_hw(struct VP9Decoder_s *pbi, u32 mask)
WRITE_VREG(HEVC_DBLK_CFGE, buf_spec->dblk_para.buf_start);
if (debug & VP9_DEBUG_BUFMGR_MORE)
pr_info("Write HEVC_DBLK_CFGE\n");
} else {
/* cfg_p_addr */
WRITE_VREG(HEVC_DBLK_CFG4, buf_spec->dblk_para.buf_start);
}
/* cfg_p_addr */
WRITE_VREG(HEVC_DBLK_CFG4, buf_spec->dblk_para.buf_start);
/* cfg_d_addr */
WRITE_VREG(HEVC_DBLK_CFG5, buf_spec->dblk_data.buf_start);