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dt-bindings: Add resets for Rockchip pvtm

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Change-Id: Ie58612db5f24b24b1abf9f18e728872e38a6e2fb
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
This commit is contained in:
Finley Xiao
2017-08-21 10:39:37 +08:00
parent fb293558a5
commit eabe4ce8c6
1 changed files with 11 additions and 3 deletions
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14
Documentation/devicetree/bindings/soc/rockchip/rockchip-pvtm.txt
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@@ -11,8 +11,13 @@ Required properties:
- "rockchip,rk3366-pmu-pvtm" - for RK3366 SoCs.
- "rockchip,rk3399-pvtm" - for RK3399 SoCs.
- "rockchip,rk3399-pmu-pvtm" - for RK3399 SoCs.
- clocks: list of the clock controller input clock identifiers.
- clock-names: list of the clock controller input clock names.
- clocks: Must contain an entry for each entry in clock-names.
See ../../clocks/clock-bindings.txt for details.
- clock-names: Should be "core_l", "core_b", "gpu", "ddr" and "pmu".
- resets: Must contain an entry for each entry in reset-names.
See ../../reset/reset.txt for details.
- reset-names: Should be "core_l", "core_b", "gpu", "ddr" and "pmu".
Example:
@@ -27,7 +32,10 @@ grf: syscon@ff770000 {
pvtm: pvtm {
compatible = "rockchip,rk3399-pvtm";
clocks = <&cru SCLK_PVTM_CORE_L>, <&cru SCLK_PVTM_CORE_B>,
<&cru SCLK_PVTM_GPU>, <&cru SCLK_PVTM_DDR>;
<&cru SCLK_PVTM_GPU>, <&cru SCLK_PVTM_DDR>;
clock-names = "core_l", "core_b", "gpu", "ddr";
resets = <&cru SRST_PVTM_CORE_L>, <&cru SRST_PVTM_CORE_B>,
<&cru SRST_PVTM_GPU>, <&cru SRST_PVTM_DDR>;
reset-names = "core_l", "core_b", "gpu", "ddr";
};
}