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rdma: used line_n_int to trigger osd, dv and hdr rdma [1/2]

Browse Source 
PD#SWPL-4582

Problem:
g12b revb osd blend shift issue still exist
when dv and hdr enable/disable

Solution:
used line_n_int to trigger osd, dv and hdr rdma,
this workaround can fix shift issue

Verify:
verify by g12b revb

Change-Id: Ie9747b2f7aaa3a7997245f82d15831c4c3da41cf
Signed-off-by: Pengcheng Chen <pengcheng.chen@amlogic.com>
This commit is contained in:
Pengcheng Chen
2019-02-20 09:38:02 +08:00
committed by Luan Yuan
parent 97071b2f14
commit eaf2e4a051
14 changed files with 779 additions and 448 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/boot/dts/amlogic/mesong12b.dtsi
View File

@@ -1360,7 +1360,7 @@
};
rdma{
compatible = "amlogic, meson, rdma";
compatible = "amlogic, meson-g12b, rdma";
dev_name = "amlogic-rdma";
status = "okay";
interrupts = <0 89 1>;

2
arch/arm64/boot/dts/amlogic/mesong12b.dtsi
View File

@@ -1360,7 +1360,7 @@
};
rdma{
compatible = "amlogic, meson, rdma";
compatible = "amlogic, meson-g12b, rdma";
dev_name = "amlogic-rdma";
status = "okay";
interrupts = <0 89 1>;

367
drivers/amlogic/media/common/rdma/rdma.c
View File

@@ -47,140 +47,225 @@
#define Wr_reg_bits(adr, val, start, len) \
WRITE_VCBUS_REG_BITS(adr, val, start, len)
static int vsync_rdma_handle;
static int irq_count;
static int enable;
static int cur_enable;
static int pre_enable_;
static int debug_flag;
static int vsync_cfg_count;
static u32 force_rdma_config;
static bool first_config;
static bool rdma_done;
#define RDMA_NUM 2
static int second_rdma_feature;
static int rdma_num = RDMA_NUM;
static int vsync_rdma_handle[RDMA_NUM];
static int irq_count[RDMA_NUM];
static int enable[RDMA_NUM];
static int cur_enable[RDMA_NUM];
static int pre_enable_[RDMA_NUM];
static int debug_flag[RDMA_NUM];
static int vsync_cfg_count[RDMA_NUM];
static u32 force_rdma_config[RDMA_NUM];
static bool first_config[RDMA_NUM];
static bool rdma_done[RDMA_NUM];
static void vsync_rdma_irq(void *arg);
static void line_n_int_rdma_irq(void *arg);
struct rdma_op_s vsync_rdma_op = {
vsync_rdma_irq,
NULL
};
struct rdma_op_s line_n_int_rdma_op = {
line_n_int_rdma_irq,
NULL
};
void vsync_rdma_config(void)
static void set_rdma_trigger_line(void)
{
int trigger_line;
switch (aml_read_vcbus(VPU_VIU_VENC_MUX_CTRL) & 0x3) {
case 0:
trigger_line = aml_read_vcbus(ENCL_VIDEO_VAVON_ELINE)
- aml_read_vcbus(ENCL_VIDEO_VSO_BLINE);
break;
case 1:
if ((aml_read_vcbus(ENCI_VIDEO_MODE) & 1) == 0)
trigger_line = 260; /* 480i */
else
trigger_line = 310; /* 576i */
break;
case 2:
if (aml_read_vcbus(ENCP_VIDEO_MODE) & (1 << 12))
trigger_line = aml_read_vcbus(ENCP_DE_V_END_EVEN);
else
trigger_line = aml_read_vcbus(ENCP_VIDEO_VAVON_ELINE)
- aml_read_vcbus(ENCP_VIDEO_VSO_BLINE);
break;
case 3:
trigger_line = aml_read_vcbus(ENCT_VIDEO_VAVON_ELINE)
- aml_read_vcbus(ENCT_VIDEO_VSO_BLINE);
break;
}
aml_write_vcbus(VPP_INT_LINE_NUM, trigger_line);
}
void _vsync_rdma_config(int rdma_type)
{
int iret = 0;
int enable_ = cur_enable & 0xf;
int enable_ = cur_enable[rdma_type] & 0xf;
if (vsync_rdma_handle <= 0)
if (vsync_rdma_handle[rdma_type] <= 0)
return;
/* first frame not use rdma */
if (!first_config) {
cur_enable = enable;
pre_enable_ = enable_;
first_config = true;
rdma_done = false;
if (!first_config[rdma_type]) {
cur_enable[rdma_type] = enable[rdma_type];
pre_enable_[rdma_type] = enable_;
first_config[rdma_type] = true;
rdma_done[rdma_type] = false;
return;
}
/* if rdma mode changed, reset rdma */
if (pre_enable_ != enable_) {
rdma_clear(vsync_rdma_handle);
force_rdma_config = 1;
if (pre_enable_[rdma_type] != enable_) {
rdma_clear(vsync_rdma_handle[rdma_type]);
force_rdma_config[rdma_type] = 1;
}
if (force_rdma_config)
rdma_done = true;
if (force_rdma_config[rdma_type])
rdma_done[rdma_type] = true;
if (enable_ == 1) {
if (rdma_done)
if (rdma_done[rdma_type])
iret = rdma_watchdog_setting(0);
else
iret = rdma_watchdog_setting(1);
} else {
/* not vsync mode */
iret = rdma_watchdog_setting(0);
force_rdma_config = 1;
force_rdma_config[rdma_type] = 1;
}
rdma_done = false;
rdma_done[rdma_type] = false;
if (iret)
force_rdma_config = 1;
force_rdma_config[rdma_type] = 1;
iret = 0;
if (force_rdma_config) {
if (force_rdma_config[rdma_type]) {
if (enable_ == 1) {
iret = rdma_config(vsync_rdma_handle,
RDMA_TRIGGER_VSYNC_INPUT);
if (rdma_type == VSYNC_RDMA)
iret = rdma_config(vsync_rdma_handle[rdma_type],
RDMA_TRIGGER_VSYNC_INPUT);
else if (rdma_type == LINE_N_INT_RDMA) {
set_rdma_trigger_line();
iret = rdma_config(vsync_rdma_handle[rdma_type],
RDMA_TRIGGER_LINE_INPUT);
}
if (iret)
vsync_cfg_count++;
vsync_cfg_count[rdma_type]++;
} else if (enable_ == 2)
/*manually in cur vsync*/
rdma_config(vsync_rdma_handle,
rdma_config(vsync_rdma_handle[rdma_type],
RDMA_TRIGGER_MANUAL);
else if (enable_ == 3)
;
else if (enable_ == 4)
rdma_config(vsync_rdma_handle,
rdma_config(vsync_rdma_handle[rdma_type],
RDMA_TRIGGER_DEBUG1); /*for debug*/
else if (enable_ == 5)
rdma_config(vsync_rdma_handle,
rdma_config(vsync_rdma_handle[rdma_type],
RDMA_TRIGGER_DEBUG2); /*for debug*/
else if (enable_ == 6)
;
if (!iret)
force_rdma_config = 1;
force_rdma_config[rdma_type] = 1;
else
force_rdma_config = 0;
force_rdma_config[rdma_type] = 0;
}
pre_enable_ = enable_;
cur_enable = enable;
pre_enable_[rdma_type] = enable_;
cur_enable[rdma_type] = enable[rdma_type];
}
void vsync_rdma_config(void)
{
_vsync_rdma_config(VSYNC_RDMA);
if (second_rdma_feature &&
is_meson_g12b_revb())
_vsync_rdma_config(LINE_N_INT_RDMA);
}
EXPORT_SYMBOL(vsync_rdma_config);
void _vsync_rdma_config_pre(int rdma_type)
{
int enable_ = cur_enable[rdma_type] & 0xf;
if (vsync_rdma_handle[rdma_type] == 0)
return;
if (enable_ == 3)/*manually in next vsync*/
rdma_config(vsync_rdma_handle[rdma_type], 0);
else if (enable_ == 6)
rdma_config(vsync_rdma_handle[rdma_type], 0x101); /*for debug*/
}
void vsync_rdma_config_pre(void)
{
int enable_ = cur_enable & 0xf;
if (vsync_rdma_handle == 0)
return;
if (enable_ == 3)/*manually in next vsync*/
rdma_config(vsync_rdma_handle, 0);
else if (enable_ == 6)
rdma_config(vsync_rdma_handle, 0x101); /*for debug*/
_vsync_rdma_config_pre(VSYNC_RDMA);
if (second_rdma_feature &&
is_meson_g12b_revb())
_vsync_rdma_config_pre(LINE_N_INT_RDMA);
}
EXPORT_SYMBOL(vsync_rdma_config_pre);
static void vsync_rdma_irq(void *arg)
{
int iret;
int enable_ = cur_enable & 0xf;
int enable_ = cur_enable[VSYNC_RDMA] & 0xf;
if (enable_ == 1) {
/*triggered by next vsync*/
iret = rdma_config(vsync_rdma_handle,
iret = rdma_config(vsync_rdma_handle[VSYNC_RDMA],
RDMA_TRIGGER_VSYNC_INPUT);
if (iret)
vsync_cfg_count++;
vsync_cfg_count[VSYNC_RDMA]++;
} else
iret = rdma_config(vsync_rdma_handle, 0);
pre_enable_ = enable_;
iret = rdma_config(vsync_rdma_handle[VSYNC_RDMA], 0);
pre_enable_[VSYNC_RDMA] = enable_;
if ((!iret) || (enable_ != 1))
force_rdma_config = 1;
force_rdma_config[VSYNC_RDMA] = 1;
else
force_rdma_config = 0;
rdma_done = true;
irq_count++;
force_rdma_config[VSYNC_RDMA] = 0;
rdma_done[VSYNC_RDMA] = true;
irq_count[VSYNC_RDMA]++;
return;
}
static void line_n_int_rdma_irq(void *arg)
{
int iret;
int enable_ = cur_enable[LINE_N_INT_RDMA] & 0xf;
if (enable_ == 1) {
/*triggered by next vsync*/
//set_rdma_trigger_line();
iret = rdma_config(vsync_rdma_handle[LINE_N_INT_RDMA],
RDMA_TRIGGER_LINE_INPUT);
if (iret)
vsync_cfg_count[LINE_N_INT_RDMA]++;
} else
iret = rdma_config(vsync_rdma_handle[LINE_N_INT_RDMA], 0);
pre_enable_[LINE_N_INT_RDMA] = enable_;
if ((!iret) || (enable_ != 1))
force_rdma_config[LINE_N_INT_RDMA] = 1;
else
force_rdma_config[LINE_N_INT_RDMA] = 0;
rdma_done[VSYNC_RDMA] = true;
irq_count[VSYNC_RDMA]++;
}
u32 VSYNC_RD_MPEG_REG(u32 adr)
{
int enable_ = cur_enable & 0xf;
int enable_ = cur_enable[VSYNC_RDMA] & 0xf;
u32 read_val = Rd(adr);
if ((enable_ != 0) && (vsync_rdma_handle > 0))
read_val = rdma_read_reg(vsync_rdma_handle, adr);
if ((enable_ != 0) && (vsync_rdma_handle[VSYNC_RDMA] > 0))
read_val = rdma_read_reg(vsync_rdma_handle[VSYNC_RDMA], adr);
return read_val;
}
@@ -188,13 +273,13 @@ EXPORT_SYMBOL(VSYNC_RD_MPEG_REG);
int VSYNC_WR_MPEG_REG(u32 adr, u32 val)
{
int enable_ = cur_enable & 0xf;
int enable_ = cur_enable[VSYNC_RDMA] & 0xf;
if ((enable_ != 0) && (vsync_rdma_handle > 0)) {
rdma_write_reg(vsync_rdma_handle, adr, val);
if ((enable_ != 0) && (vsync_rdma_handle[VSYNC_RDMA] > 0)) {
rdma_write_reg(vsync_rdma_handle[VSYNC_RDMA], adr, val);
} else {
Wr(adr, val);
if (debug_flag & 1)
if (debug_flag[VSYNC_RDMA] & 1)
pr_info("VSYNC_WR(%x)<=%x\n", adr, val);
}
return 0;
@@ -203,27 +288,94 @@ EXPORT_SYMBOL(VSYNC_WR_MPEG_REG);
int VSYNC_WR_MPEG_REG_BITS(u32 adr, u32 val, u32 start, u32 len)
{
int enable_ = cur_enable & 0xf;
int enable_ = cur_enable[VSYNC_RDMA] & 0xf;
if ((enable_ != 0) && (vsync_rdma_handle > 0)) {
rdma_write_reg_bits(vsync_rdma_handle, adr, val, start, len);
if ((enable_ != 0) && (vsync_rdma_handle[VSYNC_RDMA] > 0)) {
rdma_write_reg_bits(vsync_rdma_handle[VSYNC_RDMA],
adr, val, start, len);
} else {
u32 read_val = Rd(adr);
u32 write_val = (read_val & ~(((1L<<(len))-1)<<(start)))
|((unsigned int)(val) << (start));
Wr(adr, write_val);
if (debug_flag & 1)
if (debug_flag[VSYNC_RDMA] & 1)
pr_info("VSYNC_WR(%x)<=%x\n", adr, write_val);
}
return 0;
}
EXPORT_SYMBOL(VSYNC_WR_MPEG_REG_BITS);
u32 _VSYNC_RD_MPEG_REG(u32 adr)
{
u32 read_val = 0;
if (second_rdma_feature && is_meson_g12b_revb()) {
int enable_ = cur_enable[LINE_N_INT_RDMA] & 0xf;
read_val = Rd(adr);
if ((enable_ != 0) &&
(vsync_rdma_handle[LINE_N_INT_RDMA] > 0))
read_val = rdma_read_reg
(vsync_rdma_handle[LINE_N_INT_RDMA], adr);
} else {
read_val = VSYNC_RD_MPEG_REG(adr);
}
return read_val;
}
EXPORT_SYMBOL(_VSYNC_RD_MPEG_REG);
int _VSYNC_WR_MPEG_REG(u32 adr, u32 val)
{
if (second_rdma_feature && is_meson_g12b_revb()) {
int enable_ = cur_enable[LINE_N_INT_RDMA] & 0xf;
if ((enable_ != 0) &&
(vsync_rdma_handle[LINE_N_INT_RDMA] > 0)) {
rdma_write_reg
(vsync_rdma_handle[LINE_N_INT_RDMA], adr, val);
} else {
Wr(adr, val);
if (debug_flag[LINE_N_INT_RDMA] & 1)
pr_info("VSYNC_WR(%x)<=%x\n", adr, val);
}
} else {
VSYNC_WR_MPEG_REG(adr, val);
}
return 0;
}
EXPORT_SYMBOL(_VSYNC_WR_MPEG_REG);
int _VSYNC_WR_MPEG_REG_BITS(u32 adr, u32 val, u32 start, u32 len)
{
if (second_rdma_feature && is_meson_g12b_revb()) {
int enable_ = cur_enable[LINE_N_INT_RDMA] & 0xf;
if ((enable_ != 0) &&
(vsync_rdma_handle[LINE_N_INT_RDMA] > 0)) {
rdma_write_reg_bits
(vsync_rdma_handle[LINE_N_INT_RDMA],
adr, val, start, len);
} else {
u32 read_val = Rd(adr);
u32 write_val = (read_val & ~(((1L<<(len))-1)<<(start)))
|((unsigned int)(val) << (start));
Wr(adr, write_val);
if (debug_flag[LINE_N_INT_RDMA] & 1)
pr_info("VSYNC_WR(%x)<=%x\n", adr, write_val);
}
} else {
VSYNC_WR_MPEG_REG_BITS(adr, val, start, len);
}
return 0;
}
EXPORT_SYMBOL(_VSYNC_WR_MPEG_REG_BITS);
bool is_vsync_rdma_enable(void)
{
bool ret;
int enable_ = cur_enable & 0xf;
int enable_ = cur_enable[VSYNC_RDMA] & 0xf;
ret = (enable_ != 0);
return ret;
@@ -232,53 +384,88 @@ EXPORT_SYMBOL(is_vsync_rdma_enable);
void enable_rdma_log(int flag)
{
if (flag)
debug_flag |= 0x1;
else
debug_flag &= (~0x1);
if (flag) {
debug_flag[VSYNC_RDMA] |= 0x1;
debug_flag[LINE_N_INT_RDMA] |= 0x1;
} else {
debug_flag[VSYNC_RDMA] &= (~0x1);
debug_flag[LINE_N_INT_RDMA] &= (~0x1);
}
}
EXPORT_SYMBOL(enable_rdma_log);
void enable_rdma(int enable_flag)
{
enable = enable_flag;
enable[VSYNC_RDMA] = enable_flag;
enable[LINE_N_INT_RDMA] = enable_flag;
}
EXPORT_SYMBOL(enable_rdma);
struct rdma_op_s *get_rdma_ops(void)
struct rdma_op_s *get_rdma_ops(int rdma_type)
{
return &vsync_rdma_op;
if (rdma_type == VSYNC_RDMA)
return &vsync_rdma_op;
else if (rdma_type == LINE_N_INT_RDMA)
return &line_n_int_rdma_op;
else
return NULL;
}
void set_rdma_handle(int handle)
void set_rdma_handle(int rdma_type, int handle)
{
vsync_rdma_handle = handle;
vsync_rdma_handle[rdma_type] = handle;
pr_info("%s video rdma handle = %d.\n", __func__,
vsync_rdma_handle);
vsync_rdma_handle[rdma_type]);
}
u32 is_line_n_rdma_enable(void)
{
return second_rdma_feature;
}
static int __init rdma_init(void)
{
cur_enable = 0;
enable = 1;
force_rdma_config = 1;
second_rdma_feature = 0;
if (is_meson_g12b_revb())
second_rdma_feature = 1;
cur_enable[VSYNC_RDMA] = 0;
enable[VSYNC_RDMA] = 1;
force_rdma_config[VSYNC_RDMA] = 1;
if (second_rdma_feature) {
cur_enable[LINE_N_INT_RDMA] = 0;
enable[LINE_N_INT_RDMA] = 1;
force_rdma_config[LINE_N_INT_RDMA] = 1;
}
return 0;
}
module_init(rdma_init);
MODULE_PARM_DESC(enable, "\n enable\n");
module_param(enable, uint, 0664);
MODULE_PARM_DESC(second_rdma_feature,
"\n second_rdma_feature enable\n");
module_param(second_rdma_feature, uint, 0664);
MODULE_PARM_DESC(irq_count, "\n irq_count\n");
module_param(irq_count, uint, 0664);
MODULE_PARM_DESC(enable,
"\n vsync rdma enable\n");
module_param_array(enable, uint, &rdma_num, 0664);
MODULE_PARM_DESC(debug_flag, "\n debug_flag\n");
module_param(debug_flag, uint, 0664);
MODULE_PARM_DESC(irq_count,
"\n vsync rdma irq_count\n");
module_param_array(irq_count, uint, &rdma_num, 0664);
MODULE_PARM_DESC(vsync_cfg_count, "\n vsync_cfg_count\n");
module_param(vsync_cfg_count, uint, 0664);
MODULE_PARM_DESC(debug_flag,
"\n vsync rdma debug_flag\n");
module_param_array(debug_flag, uint, &rdma_num, 0664);
MODULE_PARM_DESC(force_rdma_config, "\n force_rdma_config\n");
module_param(force_rdma_config, uint, 0664);
MODULE_PARM_DESC(vsync_cfg_count,
"\n vsync rdma vsync_cfg_count\n");
module_param_array(vsync_cfg_count, uint, &rdma_num, 0664);
MODULE_PARM_DESC(force_rdma_config,
"\n vsync rdma force_rdma_config\n");
module_param_array(force_rdma_config, uint, &rdma_num, 0664);

9
drivers/amlogic/media/common/rdma/rdma.h
View File

@@ -17,6 +17,11 @@
#ifndef RDMA_VSYNC_H_
#define RDMA_VSYNC_H_
enum {
VSYNC_RDMA,
LINE_N_INT_RDMA,
};
void vsync_rdma_config(void);
void vsync_rdma_config_pre(void);
bool is_vsync_rdma_enable(void);
@@ -25,7 +30,7 @@ void enable_rdma_log(int flag);
void enable_rdma(int enable_flag);
extern int rdma_watchdog_setting(int flag);
int rdma_init2(void);
struct rdma_op_s *get_rdma_ops(void);
void set_rdma_handle(int handle);
struct rdma_op_s *get_rdma_ops(int rdma_type);
void set_rdma_handle(int rdma_type, int handle);
#endif

35
drivers/amlogic/media/common/rdma/rdma_mgr.c
View File

@@ -825,11 +825,19 @@ MODULE_PARM_DESC(trace_reg, "\n trace_addr\n");
module_param(trace_reg, ushort, 0664);
static struct rdma_device_data_s rdma_meson = {
.cpu_type = CPU_NORMAL,
.rdma_ver = RDMA_VER_1,
.trigger_mask_len = 8,
};
static struct rdma_device_data_s rdma_g12b = {
.cpu_type = CPU_G12B,
.rdma_ver = RDMA_VER_1,
.trigger_mask_len = 8,
};
static struct rdma_device_data_s rdma_tl1 = {
.cpu_type = CPU_NORMAL,
.rdma_ver = RDMA_VER_2,
.trigger_mask_len = 16,
};
@@ -839,6 +847,10 @@ static const struct of_device_id rdma_dt_match[] = {
.compatible = "amlogic, meson, rdma",
.data = &rdma_meson,
},
{
.compatible = "amlogic, meson-g12b, rdma",
.data = &rdma_g12b,
},
{
.compatible = "amlogic, meson-tl1, rdma",
.data = &rdma_tl1,
@@ -846,6 +858,15 @@ static const struct of_device_id rdma_dt_match[] = {
{},
};
u32 is_meson_g12b_revb(void)
{
if (rdma_meson_dev.cpu_type == CPU_G12B &&
is_meson_rev_b())
return 1;
else
return 0;
}
/* static int __devinit rdma_probe(struct platform_device *pdev) */
static int rdma_probe(struct platform_device *pdev)
{
@@ -880,7 +901,8 @@ static int rdma_probe(struct platform_device *pdev)
pr_err("dev %s NOT found\n", __func__);
return -ENODEV;
}
pr_info("%s,ver:%d, len:%d\n", __func__,
pr_info("%s,cpu_type:%d, ver:%d, len:%d\n", __func__,
rdma_meson_dev.cpu_type,
rdma_meson_dev.rdma_ver, rdma_meson_dev.trigger_mask_len);
switch_vpu_mem_pd_vmod(VPU_RDMA, VPU_MEM_POWER_ON);
@@ -933,9 +955,16 @@ static int rdma_probe(struct platform_device *pdev)
info->rdma_dev = pdev;
handle = rdma_register(get_rdma_ops(), NULL, RDMA_TABLE_SIZE);
set_rdma_handle(handle);
handle = rdma_register(get_rdma_ops(VSYNC_RDMA),
NULL, RDMA_TABLE_SIZE);
set_rdma_handle(VSYNC_RDMA, handle);
if (is_meson_g12b_revb()) {
pr_info("g12b revb!!!!\n");
handle = rdma_register(get_rdma_ops(LINE_N_INT_RDMA),
NULL, RDMA_TABLE_SIZE);
set_rdma_handle(LINE_N_INT_RDMA, handle);
}
return 0;
}

679
drivers/amlogic/media/enhancement/amdolby_vision/amdolby_vision.c
View File

File diff suppressed because it is too large Load Diff

12
drivers/amlogic/media/enhancement/amdolby_vision/amdolby_vision.h
View File

@@ -624,14 +624,14 @@ struct dolby_vision_func_s {
extern int register_dv_functions(const struct dolby_vision_func_s *func);
extern int unregister_dv_functions(void);
#ifndef CONFIG_AMLOGIC_MEDIA_VSYNC_RDMA
#define VSYNC_WR_MPEG_REG(adr, val) WRITE_VPP_REG(adr, val)
#define VSYNC_RD_MPEG_REG(adr) READ_VPP_REG(adr)
#define VSYNC_WR_MPEG_REG_BITS(adr, val, start, len) \
#define _VSYNC_WR_MPEG_REG(adr, val) WRITE_VPP_REG(adr, val)
#define _VSYNC_RD_MPEG_REG(adr) READ_VPP_REG(adr)
#define _VSYNC_WR_MPEG_REG_BITS(adr, val, start, len) \
WRITE_VPP_REG_BITS(adr, val, start, len)
#else
extern int VSYNC_WR_MPEG_REG_BITS(u32 adr, u32 val, u32 start, u32 len);
extern u32 VSYNC_RD_MPEG_REG(u32 adr);
extern int VSYNC_WR_MPEG_REG(u32 adr, u32 val);
extern int _VSYNC_WR_MPEG_REG_BITS(u32 adr, u32 val, u32 start, u32 len);
extern u32 _VSYNC_RD_MPEG_REG(u32 adr);
extern int _VSYNC_WR_MPEG_REG(u32 adr, u32 val);
#endif
#endif

1
drivers/amlogic/media/osd/osd.h
View File

@@ -755,6 +755,7 @@ struct hw_para_s {
u32 two_ports;
u32 afbc_err_cnt;
u32 viu_type;
u32 line_n_rdma;
struct hw_debug_s osd_debug;
int out_fence_fd;
int in_fd[HW_OSD_COUNT];

35
drivers/amlogic/media/osd/osd_fb.c
View File

@@ -46,6 +46,7 @@
#include <linux/cma.h>
#include <linux/dma-contiguous.h>
#include <linux/clk.h>
#include <linux/amlogic/cpu_version.h>
/* Amlogic Headers */
#include <linux/amlogic/media/vout/vinfo.h>
#include <linux/amlogic/media/vout/vout_notify.h>
@@ -59,6 +60,7 @@
#include "osd_log.h"
#include "osd_sync.h"
#include "osd_io.h"
#include "osd_rdma.h"
static __u32 var_screeninfo[5];
static struct osd_device_data_s osd_meson_dev;
@@ -1948,6 +1950,9 @@ int osd_notify_callback(struct notifier_block *block, unsigned long cmd,
switch (cmd) {
case VOUT_EVENT_MODE_CHANGE:
set_osd_logo_freescaler();
if (osd_hw.osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_G12B &&
is_meson_rev_b())
set_reset_rdma_trigger_line();
if ((osd_meson_dev.osd_ver == OSD_NORMAL)
|| (osd_meson_dev.osd_ver == OSD_SIMPLE)
|| (osd_hw.hwc_enable == 0)) {
@@ -3345,6 +3350,33 @@ static ssize_t show_osd_status(struct device *device,
fb_info->node, osd_hw.enable[fb_info->node]);
}
static ssize_t show_osd_line_n_rdma(
struct device *device, struct device_attribute *attr,
char *buf)
{
int line_n_rdma;
line_n_rdma = osd_get_line_n_rdma();
return snprintf(buf, PAGE_SIZE, "0x%x\n", line_n_rdma);
}
static ssize_t store_osd_line_n_rdma(
struct device *device, struct device_attribute *attr,
const char *buf, size_t count)
{
int line_n_rdma;
int ret = 0;
ret = kstrtoint(buf, 0, &line_n_rdma);
if (ret < 0)
return -EINVAL;
osd_set_line_n_rdma(line_n_rdma);
return count;
}
static inline int str2lower(char *str)
{
while (*str != '\0') {
@@ -3555,7 +3587,8 @@ static struct device_attribute osd_attrs[] = {
show_osd_plane_alpha, store_osd_plane_alpha),
__ATTR(osd_status, 0444,
show_osd_status, NULL),
__ATTR(osd_line_n_rdma, 0644,
show_osd_line_n_rdma, store_osd_line_n_rdma),
};
static struct device_attribute osd_attrs_viu2[] = {

18
drivers/amlogic/media/osd/osd_hw.c
View File

@@ -2071,6 +2071,22 @@ u32 osd_get_gbl_alpha_hw(u32 index)
return osd_hw.gbl_alpha[index];
}
void osd_set_line_n_rdma(u32 line_n_rdma)
{
if (osd_hw.line_n_rdma != line_n_rdma) {
osd_hw.line_n_rdma = line_n_rdma;
if (osd_hw.line_n_rdma)
enable_line_n_rdma();
else
enable_vsync_rdma();
}
}
u32 osd_get_line_n_rdma(void)
{
return osd_hw.line_n_rdma;
}
void osd_set_color_key_hw(u32 index, u32 color_index, u32 colorkey)
{
u8 r = 0, g = 0, b = 0, a = (colorkey & 0xff000000) >> 24;
@@ -8656,7 +8672,7 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
#endif
}
if (osd_hw.hw_rdma_en)
osd_rdma_enable(1);
osd_rdma_enable(2);
}

2
drivers/amlogic/media/osd/osd_hw.h
View File

@@ -216,4 +216,6 @@ void osd_set_rotate(u32 index, u32 osd_rotate);
void osd_get_afbc_err_cnt(u32 *err_cnt);
void osd_get_dimm_info(u32 index, u32 *osd_dimm_layer, u32 *osd_dimm_color);
void osd_set_dimm_info(u32 index, u32 osd_dimm_layer, u32 osd_dimm_color);
u32 osd_get_line_n_rdma(void);
void osd_set_line_n_rdma(u32 line_n_rdma);
#endif

54
drivers/amlogic/media/osd/osd_rdma.c
View File

@@ -33,7 +33,7 @@
#include <linux/dma-mapping.h>
#include <linux/mm.h>
#include <linux/of_device.h>
#include <linux/amlogic/cpu_version.h>
/* Local Headers */
#include "osd.h"
#include "osd_io.h"
@@ -47,6 +47,7 @@
#include <linux/amlogic/media/amvecm/ve.h>
#endif
#endif
#define RDMA_TRIGGER_LINE_INPUT (1 << 5)
#if 0
#ifndef CONFIG_AMLOGIC_MEDIA_RDMA
@@ -1085,9 +1086,19 @@ static int start_osd_rdma(char channel)
data32 &= ~(1 << inc_bit);
osd_reg_write(RDMA_ACCESS_AUTO, data32);
#else
rdma_config(channel,
RDMA_TRIGGER_VSYNC_INPUT
| RDMA_AUTO_START_MASK);
if (osd_hw.osd_meson_dev.cpu_id == __MESON_CPU_MAJOR_ID_G12B &&
is_meson_rev_b()) {
set_reset_rdma_trigger_line();
rdma_config(channel, RDMA_TRIGGER_LINE_INPUT |
RDMA_AUTO_START_MASK);
osd_hw.line_n_rdma = 1;
} else {
rdma_config(channel,
RDMA_TRIGGER_VSYNC_INPUT
| RDMA_AUTO_START_MASK);
osd_hw.line_n_rdma = 0;
}
#endif
return 1;
}
@@ -1113,6 +1124,41 @@ static int stop_rdma(char channel)
return 0;
}
void enable_line_n_rdma(void)
{
unsigned long flags;
osd_log_info("%s\n", __func__);
rdma_clear(OSD_RDMA_CHANNEL_INDEX);
spin_lock_irqsave(&rdma_lock, flags);
OSD_RDMA_STATUS_CLEAR_REJECT;
osd_reg_write(START_ADDR, table_paddr);
osd_reg_write(END_ADDR, table_paddr - 1);
item_count = 0;
spin_unlock_irqrestore(&rdma_lock, flags);
reset_rdma_table();
rdma_config(OSD_RDMA_CHANNEL_INDEX,
RDMA_TRIGGER_LINE_INPUT |
RDMA_AUTO_START_MASK);
}
void enable_vsync_rdma(void)
{
unsigned long flags;
osd_log_info("%s\n", __func__);
rdma_clear(OSD_RDMA_CHANNEL_INDEX);
spin_lock_irqsave(&rdma_lock, flags);
OSD_RDMA_STATUS_CLEAR_REJECT;
osd_reg_write(START_ADDR, table_paddr);
osd_reg_write(END_ADDR, table_paddr - 1);
item_count = 0;
spin_unlock_irqrestore(&rdma_lock, flags);
reset_rdma_table();
rdma_config(OSD_RDMA_CHANNEL_INDEX,
RDMA_TRIGGER_VSYNC_INPUT
| RDMA_AUTO_START_MASK);
}
void osd_rdma_interrupt_done_clear(void)
{

3
drivers/amlogic/media/osd/osd_rdma.h
View File

@@ -69,4 +69,7 @@ extern int rdma_reset_tigger_flag;
extern int rdma_mgr_irq_request;
extern void osd_rdma_interrupt_done_clear(void);
extern int osd_rdma_uninit(void);
void set_reset_rdma_trigger_line(void);
void enable_line_n_rdma(void);
void enable_vsync_rdma(void);
#endif

8
include/linux/amlogic/media/rdma/rdma_mgr.h
View File

@@ -24,6 +24,7 @@ struct rdma_op_s {
};
#define RDMA_TRIGGER_VSYNC_INPUT 0x1
#define RDMA_TRIGGER_LINE_INPUT (1 << 5)
#define RDMA_TRIGGER_MANUAL 0x100
#define RDMA_TRIGGER_DEBUG1 0x101
#define RDMA_TRIGGER_DEBUG2 0x102
@@ -34,11 +35,18 @@ enum rdma_ver_e {
RDMA_VER_2,
};
enum cpu_ver_e {
CPU_G12B,
CPU_NORMAL,
};
struct rdma_device_data_s {
enum cpu_ver_e cpu_type;
enum rdma_ver_e rdma_ver;
u32 trigger_mask_len;
};
u32 is_meson_g12b_revb(void);
/*
* rdma_read_reg(), rdma_write_reg(), rdma_clear() can only be called
* after rdma_register() is called and