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arm64: dts: rockchip: rk3568 fix gpio nodes

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Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
Change-Id: If8f2290be609b00e37fd34c6abbb7a9192d71978
This commit is contained in:
Jianqun Xu
2021-04-01 15:05:04 +08:00
committed by Tao Huang
parent 6c671b92dd
commit eb22b17844
1 changed files with 5 additions and 10 deletions
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15
arch/arm64/boot/dts/rockchip/rk3568.dtsi
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@@ -3272,7 +3272,7 @@
#size-cells = <2>;
ranges;
gpio0: gpio@fdd60000 {
gpio0: gpio0@fdd60000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xfdd60000 0x0 0x100>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
@@ -3280,12 +3280,11 @@
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl 0 0 32>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio1: gpio@fe740000 {
gpio1: gpio1@fe740000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xfe740000 0x0 0x100>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
@@ -3293,12 +3292,11 @@
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl 0 32 32>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio2: gpio@fe750000 {
gpio2: gpio2@fe750000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xfe750000 0x0 0x100>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
@@ -3306,12 +3304,11 @@
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl 0 64 32>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio3: gpio@fe760000 {
gpio3: gpio3@fe760000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xfe760000 0x0 0x100>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
@@ -3319,12 +3316,11 @@
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl 0 96 32>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio4: gpio@fe770000 {
gpio4: gpio4@fe770000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xfe770000 0x0 0x100>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
@@ -3332,7 +3328,6 @@
gpio-controller;
#gpio-cells = <2>;
gpio-ranges = <&pinctrl 0 128 32>;
interrupt-controller;
#interrupt-cells = <2>;
};