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media: venus: firmware: Use correct reset sequence for IRIS2
commit 93f213b444a40f1e7a4383b499b65e782dcb14b9 upstream. When starting venus with the "no_tz" code path, IRIS2 needs the same boot/reset sequence as IRIS2_1. This is because most of the registers were moved to the "wrapper_tz_base", which is already defined for both IRIS2 and IRIS2_1 inside core.c. Add IRIS2 to the checks inside firmware.c as well to make sure that it uses the correct reset sequence. Both IRIS2 and IRIS2_1 are HFI v6 variants, so the correct sequence was used before commitc38610f898("media: venus: firmware: Sanitize per-VPU-version"). Fixes:c38610f898("media: venus: firmware: Sanitize per-VPU-version") Cc: stable@vger.kernel.org Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org> Reviewed-by: Vikash Garodia <quic_vgarodia@quicinc.com> Reviewed-by: Dikshita Agarwal <quic_dikshita@quicinc.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> [bod: Fixed commit log IRIS -> IRIS2] Signed-off-by: Bryan O'Donoghue <bod@kernel.org> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
f9d61ee689
commit
ec02275a63
@@ -30,7 +30,7 @@ static void venus_reset_cpu(struct venus_core *core)
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u32 fw_size = core->fw.mapped_mem_size;
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void __iomem *wrapper_base;
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if (IS_IRIS2_1(core))
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if (IS_IRIS2(core) || IS_IRIS2_1(core))
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wrapper_base = core->wrapper_tz_base;
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else
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wrapper_base = core->wrapper_base;
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@@ -42,7 +42,7 @@ static void venus_reset_cpu(struct venus_core *core)
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writel(fw_size, wrapper_base + WRAPPER_NONPIX_START_ADDR);
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writel(fw_size, wrapper_base + WRAPPER_NONPIX_END_ADDR);
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if (IS_IRIS2_1(core)) {
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if (IS_IRIS2(core) || IS_IRIS2_1(core)) {
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/* Bring XTSS out of reset */
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writel(0, wrapper_base + WRAPPER_TZ_XTSS_SW_RESET);
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} else {
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@@ -68,7 +68,7 @@ int venus_set_hw_state(struct venus_core *core, bool resume)
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if (resume) {
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venus_reset_cpu(core);
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} else {
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if (IS_IRIS2_1(core))
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if (IS_IRIS2(core) || IS_IRIS2_1(core))
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writel(WRAPPER_XTSS_SW_RESET_BIT,
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core->wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET);
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else
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@@ -181,7 +181,7 @@ static int venus_shutdown_no_tz(struct venus_core *core)
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void __iomem *wrapper_base = core->wrapper_base;
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void __iomem *wrapper_tz_base = core->wrapper_tz_base;
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if (IS_IRIS2_1(core)) {
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if (IS_IRIS2(core) || IS_IRIS2_1(core)) {
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/* Assert the reset to XTSS */
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reg = readl(wrapper_tz_base + WRAPPER_TZ_XTSS_SW_RESET);
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reg |= WRAPPER_XTSS_SW_RESET_BIT;
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