arm64: dts: rockchip: add dts for TB-RK3588X(RK3588 Toybrick board)

Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Change-Id: I08e580cef0c1671091ee5550d18de6a6417c47f6
This commit is contained in:
Addy Ke
2021-12-31 15:43:54 +08:00
committed by Tao Huang
parent 79e05b26f3
commit ec55e06050
7 changed files with 2947 additions and 0 deletions

View File

@@ -109,6 +109,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-evb6-lp4-v10-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nvr-demo-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nvr-demo-v10-android.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nvr-demo-v10-spi-nand.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-toybrick-x0-android.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-toybrick-x0-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-evb1-lp4x-v10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-evb1-lp4x-v10-linux.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588s-evb2-lp5-v10.dtb

View File

@@ -0,0 +1,707 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/
#include "dt-bindings/usb/pd.h"
#include "rk3588.dtsi"
#include "rk3588-toybrick.dtsi"
#include "rk3588-rk806-single.dtsi"
/ {
es8388_sound: es8388-sound {
status = "okay";
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,mclk-fs = <256>;
simple-audio-card,name = "rockchip,es8388-codec";
simple-audio-card,dai-link@0 {
format = "i2s";
cpu {
sound-dai = <&i2s0_8ch>;
};
codec {
sound-dai = <&es8388>;
};
};
};
pcie20_avdd0v85: pcie20-avdd0v85 {
compatible = "regulator-fixed";
regulator-name = "pcie20_avdd0v85";
regulator-boot-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
vin-supply = <&vdd_0v85_s0>;//csq
};
pcie20_avdd1v8: pcie20-avdd1v8 {
compatible = "regulator-fixed";
regulator-name = "pcie20_avdd1v8";
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&avcc_1v8_s0>;
};
pcie30_avdd0v75: pcie30-avdd0v75 {
compatible = "regulator-fixed";
regulator-name = "pcie30_avdd0v75";
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
vin-supply = <&avdd_0v75_s0>;
};
pcie30_avdd1v8: pcie30-avdd1v8 {
compatible = "regulator-fixed";
regulator-name = "pcie30_avdd1v8";
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&avcc_1v8_s0>;
};
rk_headset: rk-headset {
status = "okay";
compatible = "rockchip_headset";
headset_gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
io-channels = <&saradc 3>;
};
vbus5v0_typec: vbus5v0-typec {
compatible = "regulator-fixed";
regulator-name = "vbus5v0_typec";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio4 RK_PD0 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_usb>;
pinctrl-names = "default";
pinctrl-0 = <&typec5v_pwren>;
};
vcc3v3_lcd_n: vcc3v3-lcd0-n {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_lcd0_n";
regulator-boot-on;
enable-active-high;
gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc_1v8_s0>;
};
vcc3v3_pcie30: vcc3v3-pcie30 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
startup-delay-us = <5000>;
vin-supply = <&vcc12v_dcin>;
};
vcc5v0_host: vcc5v0-host {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_usb>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
};
vcc_mipicsi0: vcc-mipicsi0-regulator {
compatible = "regulator-fixed";
gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipicsi0_pwr>;
regulator-name = "vcc_mipicsi0";
enable-active-high;
};
vcc_mipicsi1: vcc-mipicsi1-regulator {
compatible = "regulator-fixed";
gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipicsi1_pwr>;
regulator-name = "vcc_mipicsi1";
enable-active-high;
};
vcc_mipidcphy0: vcc-mipidcphy0-regulator {
compatible = "regulator-fixed";
gpio = <&gpio2 RK_PC4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&mipidcphy0_pwr>;
regulator-name = "vcc_mipicsi1";
enable-active-high;
};
wireless_bluetooth: wireless-bluetooth {
compatible = "bluetooth-platdata";
clocks = <&hym8563>;
clock-names = "ext_clock";
uart_rts_gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart8m1_rtsn>, <&bt_reset_gpio>, <&bt_wake_gpio>, <&bt_irq_gpio>;
pinctrl-1 = <&uart8_gpios>;
BT,reset_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
status = "okay";
};
wireless_wlan: wireless-wlan {
compatible = "wlan-platdata";
wifi_chip_type = "ap6255";
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>, <&wifi_poweren_gpio>;
WIFI,host_wake_irq = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
WIFI,poweren_gpio = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>;
status = "okay";
};
panel-edp {
compatible = "innolux,p120zdg-bf4", "simple-panel";
backlight = <&backlight>;
power-supply = <&vcc3v3_lcd_edp>;
prepare-delay-ms = <120>;
enable-delay-ms = <120>;
unprepare-delay-ms = <500>;
disable-delay-ms = <120>;
width-mm = <254>;
height-mm = <169>;
panel-timing {
clock-frequency = <200000000>;
hactive = <1536>;
vactive = <2048>;
hfront-porch = <12>;
hsync-len = <16>;
hback-porch = <48>;
vfront-porch = <8>;
vsync-len = <4>;
vback-porch = <8>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <0>;
pixelclk-active = <0>;
};
port {
panel_in_edp: endpoint {
remote-endpoint = <&edp_out_panel>;
};
};
};
vcc3v3_lcd_edp: vcc3v3-lcd-edp {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_lcd_edp";
gpio = <&gpio1 RK_PA5 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin-supply = <&vcc_3v3_s3>;
};
};
&backlight {
pwms = <&pwm2 0 25000 0>;
status = "okay";
};
&combphy0_ps {
status = "okay";
};
&combphy1_ps {
status = "okay";
};
&combphy2_psu {
status = "okay";
};
&dp0 {
status = "disabled";
};
&dp0_in_vp2 {
status = "disabled";
};
&dp1 {
pinctrl-names = "default";
pinctrl-0 = <&dp1_hpd>;
hpd-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
&dp1_in_vp2 {
status = "disabled";
};
/*
* mipi_dcphy0 needs to be enabled
* when dsi0 is enabled
*/
&dsi0 {
status = "disabled";
};
&dsi0_in_vp2 {
status = "disabled";
};
&dsi0_in_vp3 {
status = "disabled";
};
&edp1 {
force-hpd;
status = "okay";
ports {
port@1 {
reg = <1>;
edp_out_panel: endpoint {
remote-endpoint = <&panel_in_edp>;
};
};
};
};
&edp1_in_vp2 {
status = "okay";
};
&hdptxphy1 {
status = "okay";
};
&dsi0_panel {
power-supply = <&vcc3v3_lcd_n>;
reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
};
/*
* mipi_dcphy1 needs to be enabled
* when dsi1 is enabled
*/
&dsi1 {
status = "disabled";
};
&dsi1_in_vp2 {
status = "disabled";
};
&dsi1_in_vp3 {
status = "disabled";
};
&dsi1_panel {
power-supply = <&vcc3v3_lcd_n>;
/*
* because in hardware, the two screens share the reset pin,
* so reset-gpios need only in dsi1 enable and dsi0 disabled
* case.
*/
//reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
//pinctrl-names = "default";
//pinctrl-0 = <&lcd_rst_gpio>;
};
&gmac0 {
/* Use rgmii-rxid mode to disable rx delay inside Soc */
phy-mode = "rgmii-rxid";
clock_in_out = "output";
snps,reset-gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
pinctrl-names = "default";
pinctrl-0 = <&gmac0_miim
&gmac0_tx_bus2
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus>;
tx_delay = <0x43>;
/* rx_delay = <0x3f>; */
phy-handle = <&rgmii_phy>;
status = "okay";
};
&hdmi0 {
enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&hdmi0_in_vp0 {
status = "okay";
};
&hdmi0_sound {
status = "okay";
};
&hdptxphy_hdmi0 {
status = "okay";
};
&i2c2 {
status = "okay";
usbc0: fusb302@22 {
compatible = "fcs,fusb302";
reg = <0x22>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&usbc0_int>;
vbus-supply = <&vbus5v0_typec>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usbc0_role_sw: endpoint@0 {
remote-endpoint = <&dwc3_0_role_switch>;
};
};
};
usb_con: connector {
compatible = "usb-c-connector";
label = "USB-C";
data-role = "dual";
power-role = "dual";
try-power-role = "sink";
op-sink-microwatt = <1000000>;
sink-pdos =
<PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
source-pdos =
<PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
altmodes {
#address-cells = <1>;
#size-cells = <0>;
altmode@0 {
reg = <0>;
svid = <0xff01>;
vdo = <0xffffffff>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usbc0_orien_sw: endpoint {
remote-endpoint = <&usbdp_phy0_orientation_switch>;
};
};
port@1 {
reg = <1>;
dp_altmode_mux: endpoint {
remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
};
};
};
};
};
hym8563: hym8563@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "hym8563";
pinctrl-names = "default";
pinctrl-0 = <&hym8563_int>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PD4 IRQ_TYPE_LEVEL_LOW>;
};
};
&i2c6 {
status = "okay";
gt1x: gt1x@14 {
compatible = "goodix,gt1x";
reg = <0x14>;
pinctrl-names = "default";
pinctrl-0 = <&touch_gpio>;
goodix,rst-gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio0 RK_PB0 IRQ_TYPE_LEVEL_LOW>;
};
gsl3673: gsl3673@40 {
compatible = "GSL,GSL3673";
reg = <0x40>;
screen_max_x = <1536>;
screen_max_y = <2048>;
irq_gpio_number = <&gpio1 RK_PA6 IRQ_TYPE_LEVEL_LOW>;
rst_gpio_number = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
};
};
&i2c7 {
status = "okay";
es8388: es8388@11 {
status = "okay";
#sound-dai-cells = <0>;
compatible = "everest,es8388", "everest,es8323";
reg = <0x11>;
clocks = <&cru I2S0_8CH_MCLKOUT>;
clock-names = "mclk";
assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
assigned-clock-rates = <12288000>;
pinctrl-names = "default";
pinctrl-0 = <&i2s0_mclk>;
spk-con-gpio = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
hp-con-gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
extcon = <&rk_headset>;
};
};
&hdmirx_ctrler {
status = "okay";
hdmirx-det-gpios = <&gpio2 13 GPIO_ACTIVE_LOW>;
};
&i2s5_8ch {
status = "okay";
};
&mdio0 {
rgmii_phy: phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
};
};
&mipi_dcphy0 {
status = "okay";
};
&mipi_dcphy1 {
status = "disabled";
};
&pcie2x1l0 {
reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&pcie2x1l1 {
reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&rtl8111_isolate>;
status = "okay";
};
&pcie30phy {
rockchip,pcie30-phymode = <PHY_MODE_PCIE_AGGREGATION>;
status = "okay";
};
&pcie3x4 {
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pinctrl {
cam {
mipicsi0_pwr: mipicsi0-pwr {
rockchip,pins =
/* camera power en */
<1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
};
mipicsi1_pwr: mipicsi1-pwr {
rockchip,pins =
/* camera power en */
<1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
};
mipidcphy0_pwr: mipidcphy0-pwr {
rockchip,pins =
/* camera power en */
<2 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
dp {
dp1_hpd: dp1-hpd {
rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
headphone {
hp_det: hp-det {
rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
lcd {
lcd_rst_gpio: lcd-rst-gpio {
rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
rtl8111 {
rtl8111_isolate: rtl8111-isolate {
rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
touch {
touch_gpio: touch-gpio {
rockchip,pins =
<0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>,
<0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb-typec {
usbc0_int: usbc0-int {
rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
};
typec5v_pwren: typec5v-pwren {
rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-bluetooth {
uart8_gpios: uart8-gpios {
rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
bt_reset_gpio: bt-reset-gpio {
rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
bt_wake_gpio: bt-wake-gpio {
rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
bt_irq_gpio: bt-irq-gpio {
rockchip,pins = <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
};
wifi_poweren_gpio: wifi-poweren-gpio {
rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
&pwm2 {
status = "okay";
};
&sata0 {
status = "okay";
};
&u2phy1_otg {
phy-supply = <&vcc5v0_host>;
};
&u2phy2_host {
phy-supply = <&vcc5v0_host>;
};
&u2phy3_host {
phy-supply = <&vcc5v0_host>;
};
&uart8 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart8m1_xfer &uart8m1_ctsn>;
};
&usbdp_phy0 {
orientation-switch;
svid = <0xff01>;
sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
port {
#address-cells = <1>;
#size-cells = <0>;
usbdp_phy0_orientation_switch: endpoint@0 {
reg = <0>;
remote-endpoint = <&usbc0_orien_sw>;
};
usbdp_phy0_dp_altmode_mux: endpoint@1 {
reg = <1>;
remote-endpoint = <&dp_altmode_mux>;
};
};
};
&usbdp_phy1 {
rockchip,dp-lane-mux = <2 3>;
};
&usbdrd_dwc3_0 {
dr_mode = "otg";
usb-role-switch;
port {
#address-cells = <1>;
#size-cells = <0>;
dwc3_0_role_switch: endpoint@0 {
reg = <0>;
remote-endpoint = <&usbc0_role_sw>;
};
};
};
&usbhost3_0 {
status = "disabled";
};
&usbhost_dwc3_0 {
status = "disabled";
};

View File

@@ -0,0 +1,322 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/
&csi2_dphy0_hw {
status = "okay";
};
&csi2_dphy0 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi_in_ucam0: endpoint@1 {
reg = <1>;
remote-endpoint = <&ucam_out0>;
data-lanes = <1 2 3 4>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csidphy0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi2_csi2_input>;
};
};
};
};
&i2c3 {
status = "okay";
dw9714: dw9714@c {
compatible = "silicon touch,dw9714";
status = "okay";
reg = <0x0c>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,vcm-start-current = <20>;
rockchip,vcm-rated-current = <120>;
rockchip,vcm-step-mode = <13>;
};
imx258_eeprom: imx258_eeprom@50 {
compatible = "otp,imx258_eeprom";
status = "okay";
reg = <0x50>;
};
imx258: imx258@10 {
compatible = "sony,imx258";
reg = <0x10>;
clocks = <&cru CLK_MIPI_CAMARAOUT_M3>;
clock-names = "xvclk";
pinctrl-names = "default";
pinctrl-0 = <&mipim0_camera3_clk>;
power-domains = <&power RK3588_PD_VI>;
avdd-supply = <&vcc_mipicsi0>;
pwdn-gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "GEIR180089";
rockchip,camera-module-lens-name = "LG500627G";
eeprom-ctrl = <&imx258_eeprom>;
lens-focus = <&dw9714>;
port {
ucam_out0: endpoint {
remote-endpoint = <&mipi_in_ucam0>;
data-lanes = <1 2 3 4>;
};
};
};
};
&mipi2_csi2 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi2_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csidphy0_out>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi2_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in2>;
};
};
};
};
&rkcif {
status = "okay";
};
&rkcif_mipi_lvds2 {
status = "okay";
port {
cif_mipi_in2: endpoint {
remote-endpoint = <&mipi2_csi2_output>;
};
};
};
&rkcif_mipi_lvds2_sditf {
status = "okay";
port {
mipi_lvds_sditf: endpoint {
remote-endpoint = <&isp0_vir0>;
};
};
};
&rkcif_mmu {
status = "okay";
};
&rkisp0 {
status = "okay";
};
&isp0_mmu {
status = "okay";
};
&rkisp0_vir0 {
status = "okay";
port {
#address-cells = <1>;
#size-cells = <0>;
isp0_vir0: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_lvds_sditf>;
};
};
};
// use dcphy0 isp1
&csi2_dcphy0_hw {
status = "okay";
};
&csi2_dcphy0 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi_in_1_ucam0: endpoint@1 {
reg = <1>;
remote-endpoint = <&imx258_1_out0>;
data-lanes = <1 2 3 4>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
csidcphy0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi0_csi2_input>;
};
};
};
};
&i2c5 {
status = "okay";
dw9714_1: dw9714_1@c {
compatible = "silicon touch,dw9714";
status = "okay";
reg = <0x0c>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,vcm-start-current = <20>;
rockchip,vcm-rated-current = <120>;
rockchip,vcm-step-mode = <13>;
};
imx258_1_eeprom: imx258_1_eeprom@50 {
compatible = "otp,imx258_eeprom";
status = "okay";
reg = <0x50>;
};
imx258_1: imx258_1@1a {
compatible = "sony,imx258";
reg = <0x1a>;
clocks = <&cru CLK_MIPI_CAMARAOUT_M1>;
clock-names = "xvclk";
pinctrl-names = "default";
pinctrl-0 = <&mipim0_camera1_clk>;
power-domains = <&power RK3588_PD_VI>;
avdd-supply = <&vcc_mipidcphy0>;
pwdn-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>;
reset-gpios = <&gpio2 RK_PC4 GPIO_ACTIVE_LOW>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "GEIR180089";
rockchip,camera-module-lens-name = "LG500627G";
eeprom-ctrl = <&imx258_1_eeprom>;
lens-focus = <&dw9714_1>;
port {
imx258_1_out0: endpoint {
remote-endpoint = <&mipi_in_1_ucam0>;
data-lanes = <1 2 3 4>;
};
};
};
};
&mipi0_csi2 {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
mipi0_csi2_input: endpoint@1 {
reg = <1>;
remote-endpoint = <&csidcphy0_out>;
};
};
port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
mipi0_csi2_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&cif_mipi_in0>;
};
};
};
};
&rkcif_mipi_lvds {
status = "okay";
port {
cif_mipi_in0: endpoint {
remote-endpoint = <&mipi0_csi2_output>;
};
};
};
#if 0
&rkcif_mipi_lvds_sditf {
status = "okay";
port {
mipi_lvds_sditf_1: endpoint {
remote-endpoint = <&isp0_vir1>;
};
};
};
&rkisp0_vir1 {
status = "okay";
port {
#address-cells = <1>;
#size-cells = <0>;
isp0_vir1: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi_lvds_sditf_1>;
};
};
};
#endif
&rkisp1 {
status = "okay";
};
&isp1_mmu {
status = "okay";
};
&rkcif_mipi_lvds_sditf {
status = "okay";
port {
mipi1_lvds_sditf: endpoint {
remote-endpoint = <&isp1_vir0>;
};
};
};
&rkisp1_vir0 {
status = "okay";
port {
#address-cells = <1>;
#size-cells = <0>;
isp1_vir0: endpoint@0 {
reg = <0>;
remote-endpoint = <&mipi1_lvds_sditf>;
};
};
};

View File

@@ -0,0 +1,16 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
#include "rk3588-toybrick-x0.dtsi"
#include "rk3588-android.dtsi"
#include "rk3588-toybrick-imx258.dtsi"
/ {
model = "Rockchip RK3588 TOYBRICK LP4 X10 Board";
compatible = "rockchip,rk3588-toybrick-x10-android", "rockchip,rk3588";
};

View File

@@ -0,0 +1,15 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/
/dts-v1/;
#include "rk3588-toybrick-x0.dtsi"
#include "rk3588-linux.dtsi"
//#include "rk3588-toybrick-imx258.dtsi"
/ {
model = "Rockchip RK3588 TOYBRICK X10 Board";
compatible = "rockchip,rk3588-toybrick-x10-linux", "rockchip,rk3588";
};

View File

@@ -0,0 +1,655 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2021 Rockchip Electronics Co., Ltd.
*
*/
#include "dt-bindings/usb/pd.h"
#include "rk3588.dtsi"
#include "rk3588-toybrick.dtsi"
#include "rk3588-rk806-single.dtsi"
/ {
hdmiin_dc: hdmiin-dc {
compatible = "rockchip,dummy-codec";
#sound-dai-cells = <0>;
};
es8388_sound: es8388-sound {
status = "okay";
compatible = "rockchip,multicodecs-card";
rockchip,card-name = "rockchip,es8388-codec";
hp-det-gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
io-channels = <&saradc 3>;
io-channel-names = "adc-detect";
keyup-threshold-microvolt = <1800000>;
poll-interval = <100>;
spk-con-gpio = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
hp-con-gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
rockchip,format = "i2s";
rockchip,mclk-fs = <256>;
rockchip,cpu = <&i2s0_8ch>;
rockchip,codec = <&es8388>;
rockchip,audio-routing =
"Headphone", "LOUT1",
"Headphone", "ROUT1",
"Speaker", "LOUT2",
"Speaker", "ROUT2",
"Headphone", "Headphone Power",
"Headphone", "Headphone Power",
"Speaker", "Speaker Power",
"Speaker", "Speaker Power",
"LINPUT1", "Main Mic",
"LINPUT2", "Main Mic",
"RINPUT1", "Headset Mic",
"RINPUT2", "Headset Mic";
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
play-pause-key {
label = "playpause";
linux,code = <KEY_PLAYPAUSE>;
press-threshold-microvolt = <2000>;
};
};
hdmiin-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "rockchip,hdmiin";
simple-audio-card,bitclock-master = <&dailink0_master>;
simple-audio-card,frame-master = <&dailink0_master>;
status = "okay";
simple-audio-card,cpu {
sound-dai = <&i2s7_8ch>;
};
dailink0_master: simple-audio-card,codec {
sound-dai = <&hdmiin_dc>;
};
};
pcie20_avdd0v85: pcie20-avdd0v85 {
compatible = "regulator-fixed";
regulator-name = "pcie20_avdd0v85";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <850000>;
vin-supply = <&vdd_0v85_s0>;//csq
};
pcie20_avdd1v8: pcie20-avdd1v8 {
compatible = "regulator-fixed";
regulator-name = "pcie20_avdd1v8";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&avcc_1v8_s0>;
};
pcie30_avdd0v75: pcie30-avdd0v75 {
compatible = "regulator-fixed";
regulator-name = "pcie30_avdd0v75";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
vin-supply = <&avdd_0v75_s0>;
};
pcie30_avdd1v8: pcie30-avdd1v8 {
compatible = "regulator-fixed";
regulator-name = "pcie30_avdd1v8";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&avcc_1v8_s0>;
};
rk_headset: rk-headset {
status = "disabled";
compatible = "rockchip_headset";
headset_gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&hp_det>;
io-channels = <&saradc 3>;
};
vbus5v0_typec: vbus5v0-typec {
compatible = "regulator-fixed";
regulator-name = "vbus5v0_typec";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio4 RK_PD0 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_usb>;
pinctrl-names = "default";
pinctrl-0 = <&typec5v_pwren>;
};
vcc3v3_lcd_n: vcc3v3-lcd0-n {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_lcd0_n";
regulator-boot-on;
enable-active-high;
gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc_1v8_s0>;
};
vcc3v3_pcie30: vcc3v3-pcie30 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie30";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
enable-active-high;
gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
startup-delay-us = <5000>;
vin-supply = <&vcc12v_dcin>;
};
vcc5v0_host: vcc5v0-host {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
regulator-boot-on;
regulator-always-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_usb>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
};
vcc_mipicsi0: vcc-mipicsi0-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_mipicsi0";
enable-active-high;
};
vcc_mipicsi1: vcc-mipicsi1-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_mipicsi1";
enable-active-high;
};
vcc_mipidcphy0: vcc-mipidcphy0-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_mipicsi1";
enable-active-high;
};
wireless_bluetooth: wireless-bluetooth {
compatible = "bluetooth-platdata";
clocks = <&hym8563>;
clock-names = "ext_clock";
uart_rts_gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_LOW>;
pinctrl-names = "default", "rts_gpio";
pinctrl-0 = <&uart8m1_rtsn>, <&bt_reset_gpio>, <&bt_wake_gpio>, <&bt_irq_gpio>;
pinctrl-1 = <&uart8_gpios>;
BT,reset_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
BT,wake_gpio = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
BT,wake_host_irq = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
status = "okay";
};
wireless_wlan: wireless-wlan {
compatible = "wlan-platdata";
wifi_chip_type = "ap6255";
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake_irq>, <&wifi_poweren_gpio>;
WIFI,host_wake_irq = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
WIFI,poweren_gpio = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>;
status = "okay";
};
};
&backlight {
pwms = <&pwm2 0 25000 0>;
status = "okay";
};
&combphy0_ps {
status = "okay";
};
&combphy1_ps {
status = "okay";
};
&combphy2_psu {
status = "okay";
};
&dp0 {
status = "okay";
};
&dp0_in_vp2 {
status = "okay";
};
/*
* mipi_dcphy0 needs to be enabled
* when dsi0 is enabled
*/
&dsi0 {
status = "disabled";
};
&dsi0_in_vp2 {
status = "disabled";
};
&dsi0_in_vp3 {
status = "okay";
};
&dsi0_panel {
power-supply = <&vcc3v3_lcd_n>;
reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_rst_gpio>;
};
/*
* mipi_dcphy1 needs to be enabled
* when dsi1 is enabled
*/
&dsi1 {
status = "disabled";
};
&dsi1_in_vp2 {
status = "disabled";
};
&dsi1_in_vp3 {
status = "disabled";
};
&dsi1_panel {
power-supply = <&vcc3v3_lcd_n>;
/*
* because in hardware, the two screens share the reset pin,
* so reset-gpios need only in dsi1 enable and dsi0 disabled
* case.
*/
//reset-gpios = <&gpio2 RK_PB4 GPIO_ACTIVE_LOW>;
//pinctrl-names = "default";
//pinctrl-0 = <&lcd_rst_gpio>;
};
&gmac0 {
/* Use rgmii-rxid mode to disable rx delay inside Soc */
phy-mode = "rgmii-rxid";
clock_in_out = "output";
snps,reset-gpio = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
/* Reset time is 20ms, 100ms for rtl8211f */
snps,reset-delays-us = <0 20000 100000>;
pinctrl-names = "default";
pinctrl-0 = <&gmac0_miim
&gmac0_tx_bus2
&gmac0_rx_bus2
&gmac0_rgmii_clk
&gmac0_rgmii_bus>;
tx_delay = <0x43>;
/* rx_delay = <0x3f>; */
phy-handle = <&rgmii_phy>;
status = "okay";
};
&hdmi0 {
enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&hdmi0_in_vp0 {
status = "okay";
};
&hdmi0_sound {
status = "okay";
};
&hdptxphy_hdmi0 {
status = "okay";
};
&i2c2 {
status = "okay";
clock-frequency = <400000>;
usbc0: fusb302@22 {
compatible = "fcs,fusb302";
reg = <0x22>;
interrupt-parent = <&gpio3>;
interrupts = <RK_PB4 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&usbc0_int>;
vbus-supply = <&vbus5v0_typec>;
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usbc0_role_sw: endpoint@0 {
remote-endpoint = <&dwc3_0_role_switch>;
};
};
};
usb_con: connector {
compatible = "usb-c-connector";
label = "USB-C";
data-role = "dual";
power-role = "dual";
try-power-role = "sink";
op-sink-microwatt = <1000000>;
sink-pdos =
<PDO_FIXED(5000, 1000, PDO_FIXED_USB_COMM)>;
source-pdos =
<PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
altmodes {
#address-cells = <1>;
#size-cells = <0>;
altmode@0 {
reg = <0>;
svid = <0xff01>;
vdo = <0xffffffff>;
};
};
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
usbc0_orien_sw: endpoint {
remote-endpoint = <&usbdp_phy0_orientation_switch>;
};
};
port@1 {
reg = <1>;
dp_altmode_mux: endpoint {
remote-endpoint = <&usbdp_phy0_dp_altmode_mux>;
};
};
};
};
};
hym8563: hym8563@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "hym8563";
pinctrl-names = "default";
pinctrl-0 = <&hym8563_int>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PD4 IRQ_TYPE_LEVEL_LOW>;
};
};
&i2c6 {
status = "disabled";
gt1x: gt1x@14 {
compatible = "goodix,gt1x";
reg = <0x14>;
pinctrl-names = "default";
pinctrl-0 = <&touch_gpio>;
goodix,rst-gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>;
goodix,irq-gpio = <&gpio0 RK_PB0 IRQ_TYPE_LEVEL_LOW>;
power-supply = <&vcc3v3_lcd_n>;
};
gsl3673: gsl3673@40 {
compatible = "GSL,GSL3673";
reg = <0x40>;
screen_max_x = <1536>;
screen_max_y = <2048>;
irq_gpio_number = <&gpio1 RK_PA6 IRQ_TYPE_LEVEL_LOW>;
rst_gpio_number = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;
};
};
&i2c7 {
status = "okay";
es8388: es8388@11 {
status = "okay";
#sound-dai-cells = <0>;
compatible = "everest,es8388", "everest,es8323";
reg = <0x11>;
clocks = <&cru I2S0_8CH_MCLKOUT>;
clock-names = "mclk";
assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
assigned-clock-rates = <12288000>;
pinctrl-names = "default";
pinctrl-0 = <&i2s0_mclk>;
};
};
&i2s5_8ch {
status = "okay";
};
&i2s7_8ch {
status = "okay";
};
&mdio0 {
rgmii_phy: phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x1>;
};
};
&mipi_dcphy0 {
status = "okay";
};
&mipi_dcphy1 {
status = "disabled";
};
&pcie2x1l0 {
reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
rockchip,skip-scan-in-resume;
status = "okay";
};
&pcie2x1l1 {
reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&rtl8111_isolate>;
status = "okay";
};
&pcie30phy {
rockchip,pcie30-phymode = <PHY_MODE_PCIE_AGGREGATION>;
status = "okay";
};
&pcie3x4 {
reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie30>;
status = "disabled";
};
&pinctrl {
headphone {
hp_det: hp-det {
rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
lcd {
lcd_rst_gpio: lcd-rst-gpio {
rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
rtl8111 {
rtl8111_isolate: rtl8111-isolate {
rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
touch {
touch_gpio: touch-gpio {
rockchip,pins =
<0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_up>,
<0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb-typec {
usbc0_int: usbc0-int {
rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>;
};
typec5v_pwren: typec5v-pwren {
rockchip,pins = <4 RK_PD0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
wireless-bluetooth {
uart8_gpios: uart8-gpios {
rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
};
bt_reset_gpio: bt-reset-gpio {
rockchip,pins = <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
};
bt_wake_gpio: bt-wake-gpio {
rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
};
bt_irq_gpio: bt-irq-gpio {
rockchip,pins = <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
wireless-wlan {
wifi_host_wake_irq: wifi-host-wake-irq {
rockchip,pins = <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
};
wifi_poweren_gpio: wifi-poweren-gpio {
rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
&pwm2 {
status = "okay";
};
&sata0 {
status = "okay";
};
&u2phy1_otg {
phy-supply = <&vcc5v0_host>;
};
&u2phy2_host {
phy-supply = <&vcc5v0_host>;
};
&u2phy3_host {
phy-supply = <&vcc5v0_host>;
};
&uart8 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&uart8m1_xfer &uart8m1_ctsn>;
};
&usbdp_phy0 {
orientation-switch;
svid = <0xff01>;
sbu1-dc-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
sbu2-dc-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>;
port {
#address-cells = <1>;
#size-cells = <0>;
usbdp_phy0_orientation_switch: endpoint@0 {
reg = <0>;
remote-endpoint = <&usbc0_orien_sw>;
};
usbdp_phy0_dp_altmode_mux: endpoint@1 {
reg = <1>;
remote-endpoint = <&dp_altmode_mux>;
};
};
};
&usbdp_phy1 {
rockchip,dp-lane-mux = <2 3>;
};
&usbdrd_dwc3_0 {
dr_mode = "otg";
usb-role-switch;
port {
#address-cells = <1>;
#size-cells = <0>;
dwc3_0_role_switch: endpoint@0 {
reg = <0>;
remote-endpoint = <&usbc0_role_sw>;
};
};
};
&usbhost3_0 {
status = "disabled";
};
&usbhost_dwc3_0 {
status = "disabled";
};
&nldo5_s0 {
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <750000>;
rregulator-name = "nldo5_s0";
regulator-state-mem {
regulator-off-in-suspend;
};
};

File diff suppressed because it is too large Load Diff