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https://github.com/hardkernel/linux.git
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@@ -755,8 +755,8 @@
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compatible = "rockchip-i2s";
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reg = <0xff890000 0x10000>;
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i2s-id = <0>;
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clocks = <&clk_i2s>, <&clk_i2s_out>, <&clk_gates10 8>, <&clk_gates4 3>;
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clock-names = "i2s_clk", "i2s_mclk", "i2s_hclk", "i2s_gclk";
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clocks = <&clk_i2s>, <&clk_i2s_out>;
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clock-names = "i2s_clk","i2s_mclk";
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interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&pdma0 0>,
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<&pdma0 1>;
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@@ -59,8 +59,7 @@ struct rk30_i2s_info {
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struct clk *i2s_clk;// i2s clk ,is bclk lrck
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struct clk *i2s_mclk;//i2s mclk,rk32xx can different i2s clk.
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struct clk *i2s_hclk;
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struct clk *i2s_gclk;
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struct snd_dmaengine_dai_dma_data capture_dma_data;
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struct snd_dmaengine_dai_dma_data playback_dma_data;
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@@ -550,21 +549,6 @@ static int rockchip_i2s_probe(struct platform_device *pdev)
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}
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rk30_i2s = i2s;
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i2s->i2s_hclk = clk_get(&pdev->dev, "i2s_hclk");
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if(IS_ERR(i2s->i2s_hclk) ) {
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dev_err(&pdev->dev, "get i2s_hclk failed.\n");
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} else{
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clk_prepare_enable(i2s->i2s_hclk);
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}
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i2s->i2s_gclk = clk_get(&pdev->dev, "i2s_gclk");
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if(IS_ERR(i2s->i2s_gclk)) {
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dev_err(&pdev->dev, "get i2s_gclk failed.\n");
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} else {
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clk_prepare_enable(i2s->i2s_gclk);
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}
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i2s->i2s_clk= clk_get(&pdev->dev, "i2s_clk");
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if (IS_ERR(i2s->i2s_clk)) {
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dev_err(&pdev->dev, "Can't retrieve i2s clock\n");
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