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[ARM] tegra: stingray: remove clock and powergate hacks

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Remove unpowergating of 3d on board init to let the host1x driver
handle it.

Remove enabling hw module clocks on board init for modules behind
host1x.

Keep pll_m clock force-enabled for now as the pll clk disable code
path is not fully functional.

Change-Id: I4721d117b736a591b3cf3ee9f8967b88212f88b8
Signed-off-by: Erik Gilling <konkers@android.com>
This commit is contained in:
Antti Hatala
2010-08-26 04:16:58 -07:00
committed by Colin Cross
parent cf853d9c88
commit edd4c87e4d
1 changed files with 1 additions and 15 deletions
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16
arch/arm/mach-tegra/board-stingray.c
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@@ -640,13 +640,8 @@ static __initdata struct tegra_clk_init_table stingray_clk_init_table[] = {
{ "uartb", "clk_m", 26000000, true},
{ "uartc", "pll_m", 600000000, false},
/*{ "emc", "pll_p", 0, true},
{ "pll_m", NULL, 600000000, true},
{ "emc", "pll_m", 600000000, false},*/
{ "host1x", "pll_m", 150000000, true},
{ "2d", "pll_m", 300000000, true},
{ "3d", "pll_m", 300000000, true},
{ "epp", "pll_m", 100000000, true},
{ "vi", "pll_m", 100000000, true},
{ "pll_m", NULL, 600000000, true},
{ "pll_a", NULL, 24000000, false},
{ "pll_a_out0", NULL, 24000000, false},
{ "i2s1", "pll_a_out0", 24000000, false},
@@ -981,15 +976,6 @@ static void __init tegra_stingray_init(void)
nvmap_add_carveout_heap(TEGRA_IRAM_BASE, TEGRA_IRAM_SIZE, "iram",
NVMEM_HEAP_CARVEOUT_IRAM);
clk = clk_get_sys("3d", NULL);
tegra_periph_reset_assert(clk);
writel(0x101, IO_ADDRESS(TEGRA_PMC_BASE) + 0x30);
clk_enable(clk);
udelay(10);
writel(1 << 1, IO_ADDRESS(TEGRA_PMC_BASE) + 0x34);
tegra_periph_reset_deassert(clk);
clk_put(clk);
init_das();
tegra_i2s_device1.dev.platform_data = &tegra_audio_pdata;
cpcap_device_register(&cpcap_audio_device);