audio: fixed dtv audio clk setting error in samesource [1/1]

PD#SWPL-9593

Problem:
dtv audio is heard slower in spk

Solution:
when mclk is changed, spdif clk changes correspondingly in samesource case

Verify:
X301

Change-Id: I15fcb598ba893762580f0a5aac856376af8c94ec
Signed-off-by: Zhe Wang <Zhe.Wang@amlogic.com>
This commit is contained in:
Zhe Wang
2019-06-11 13:55:04 +08:00
committed by Luan Yuan
parent 03a29446d6
commit ee002ef825
2 changed files with 15 additions and 5 deletions

View File

@@ -325,7 +325,6 @@ int spdifin_source_set_enum(
return 0;
}
int spdif_set_audio_clk(int id,
struct clk *clk_src, int rate, int same)
{
@@ -336,11 +335,14 @@ int spdif_set_audio_clk(int id,
return 0;
}
if (rate == 0)
return 0;
clk_set_parent(spdif_priv[id]->clk_spdifout, clk_src);
clk_set_rate(spdif_priv[id]->clk_spdifout, rate);
ret = clk_prepare_enable(spdif_priv[id]->clk_spdifout);
if (ret) {
pr_err("%s Can't enable clk_spdifout clock,ret %d\n",
pr_err("%s Can't enable clk_spdifout clock, ret %d\n",
__func__, ret);
}
return 0;
@@ -1043,7 +1045,7 @@ static int aml_dai_spdif_startup(
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
if (p_spdif->clk_cont) {
if (0/*p_spdif->clk_cont*/) {
pr_info("spdif_%s keep clk continuous\n",
(p_spdif->id == 0) ? "a":"b");
return 0;

View File

@@ -164,6 +164,9 @@ static int tdm_clk_set(struct snd_kcontrol *kcontrol,
}
mclk_rate += (value - 1000000);
mclk_rate >>= 1;
mclk_rate <<= 1;
aml_dai_set_tdm_sysclk(cpu_dai, 0, mclk_rate, 0);
return 0;
@@ -494,7 +497,8 @@ static int aml_dai_tdm_prepare(struct snd_pcm_substream *substream,
p_tdm->chipinfo->reset_reg_offset);
/* sharebuffer default uses spdif_a */
spdif_set_audio_clk(p_tdm->samesource_sel - 3,
p_tdm->clk, runtime->rate*128, 1);
p_tdm->clk,
(p_tdm->last_mclk_freq >> 1), 1);
}
/* i2s source to hdmix */
@@ -1344,6 +1348,7 @@ static int aml_set_default_tdm_clk(struct aml_tdm *tdm)
unsigned int mclk = 12288000;
unsigned int ratio = aml_mpll_mclk_ratio(mclk);
unsigned int lrclk_hi;
unsigned int pll = mclk * ratio;
/*set default i2s clk for codec sequence*/
tdm->setting.bclk_lrclk_ratio = 64;
@@ -1357,9 +1362,12 @@ static int aml_set_default_tdm_clk(struct aml_tdm *tdm)
tdm->clk_sel, lrclk_hi/2, lrclk_hi);
clk_prepare_enable(tdm->mclk);
clk_set_rate(tdm->clk, mclk*ratio);
clk_set_rate(tdm->clk, pll);
clk_set_rate(tdm->mclk, mclk);
tdm->last_mclk_freq = mclk;
tdm->last_mpll_freq = pll;
return 0;
}