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video: rockchip: rga3: add support Y8

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Change-Id: If3bebf93c67abeb62da51d7ffb5b79bfffdc80df
Signed-off-by: Yu Qiaowei <cerf.yu@rock-chips.com>
This commit is contained in:
Yu Qiaowei
2024-01-04 15:32:56 +08:00
committed by Tao Huang
parent c57af97268
commit ef299cd455
5 changed files with 31 additions and 7 deletions
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2
drivers/video/rockchip/rga3/include/rga.h
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@@ -221,6 +221,8 @@ enum rga_surf_format {
RGA_FORMAT_YCbCr_444_SP = 0x32,
RGA_FORMAT_YCrCb_444_SP = 0x33,
RGA_FORMAT_Y8 = 0x34,
RGA_FORMAT_UNKNOWN = 0x100,
};

23
drivers/video/rockchip/rga3/rga2_reg_info.c
View File

@@ -870,6 +870,7 @@ static void RGA2_set_reg_dst_info(u8 *base, struct rga2_req *msg)
u8 dst_fmt_yuv400_en = 0;
u8 dst_fmt_y4_en = 0;
u8 dst_fmt_y4_lut_en = 0;
u8 dst_nn_quantize_en = 0;
u32 reg = 0;
@@ -1193,6 +1194,15 @@ static void RGA2_set_reg_dst_info(u8 *base, struct rga2_req *msg)
case RGA_FORMAT_Y4:
dst_format = 0x8;
dst_fmt_y4_en = 1;
dst_fmt_y4_lut_en = 1;
dst_fmt_yuv400_en = 1;
x_div = 1;
y_div = 1;
break;
case RGA_FORMAT_Y8:
dst_format = 0x8;
dst_fmt_y4_lut_en = 1;
dst_fmt_yuv400_en = 1;
x_div = 1;
y_div = 1;
@@ -1306,7 +1316,8 @@ static void RGA2_set_reg_dst_info(u8 *base, struct rga2_req *msg)
reg = ((reg & (~m_RGA2_DST_INFO_SW_DST_UVVDS_MODE)) |
(s_RGA2_DST_INFO_SW_DST_UVVDS_MODE(msg->uvvds_mode)));
ydither_en = (msg->dst.format == RGA_FORMAT_Y4)
ydither_en = (msg->dst.format == RGA_FORMAT_Y4 ||
msg->dst.format == RGA_FORMAT_Y8)
&& ((msg->alpha_rop_flag >> 6) & 0x1);
*bRGA_DST_INFO = reg;
@@ -1337,11 +1348,11 @@ static void RGA2_set_reg_dst_info(u8 *base, struct rga2_req *msg)
pr_err("ydither mode do not support y dir scale\n");
}
if (dst_fmt_y4_en) {
if (dst_fmt_y4_lut_en) {
*RGA_DST_Y4MAP_LUT0 = (msg->gr_color.gr_x_r & 0xffff) |
(msg->gr_color.gr_x_g << 16);
(msg->gr_color.gr_x_g << 16);
*RGA_DST_Y4MAP_LUT1 = (msg->gr_color.gr_y_r & 0xffff) |
(msg->gr_color.gr_y_g << 16);
(msg->gr_color.gr_y_g << 16);
}
if (dst_nn_quantize_en) {
@@ -2199,8 +2210,8 @@ static int rga2_gen_reg_info(struct rga_scheduler_t *scheduler, u8 *base, struct
RGA2_set_reg_dst_info(base, msg);
dst_nn_quantize_en = (msg->alpha_rop_flag >> 8) & 0x1;
if (dst_nn_quantize_en != 1) {
if ((msg->dst.format !=
RGA_FORMAT_Y4)) {
if ((msg->dst.format != RGA_FORMAT_Y4) &&
(msg->dst.format != RGA_FORMAT_Y8)) {
RGA2_set_reg_alpha_info(base, msg);
RGA2_set_reg_rop_info(base, msg);
}

11
drivers/video/rockchip/rga3/rga_common.c
View File

@@ -43,6 +43,7 @@ bool rga_is_yuv_format(uint32_t format)
{
switch (format) {
case RGA_FORMAT_Y4:
case RGA_FORMAT_Y8:
case RGA_FORMAT_YCbCr_400:
case RGA_FORMAT_YCbCr_422_SP:
@@ -177,6 +178,7 @@ bool rga_is_yuv8bit_format(uint32_t format)
{
switch (format) {
case RGA_FORMAT_Y4:
case RGA_FORMAT_Y8:
case RGA_FORMAT_YCbCr_400:
case RGA_FORMAT_YCbCr_422_SP:
@@ -234,6 +236,7 @@ bool rga_is_only_y_format(uint32_t format)
switch (format) {
case RGA_FORMAT_YCbCr_400:
case RGA_FORMAT_Y4:
case RGA_FORMAT_Y8:
return true;
default:
return false;
@@ -321,7 +324,7 @@ const char *rga_get_format_name(uint32_t format)
case RGA_FORMAT_YCbCr_400:
return "YCbCr400";
case RGA_FORMAT_Y4:
return "y4";
return "Y4";
case RGA_FORMAT_ARGB_8888:
return "ARGB8888";
@@ -350,6 +353,9 @@ const char *rga_get_format_name(uint32_t format)
case RGA_FORMAT_YCrCb_444_SP:
return "YCrCb444SP";
case RGA_FORMAT_Y8:
return "Y8";
default:
return "UNF";
}
@@ -416,6 +422,7 @@ int rga_get_format_bits(uint32_t format)
case RGA_FORMAT_YCbCr_400:
case RGA_FORMAT_BPP8:
case RGA_FORMAT_A8:
case RGA_FORMAT_Y8:
bits = 8;
break;
case RGA_FORMAT_Y4:
@@ -497,6 +504,7 @@ int rga_get_pixel_stride_from_format(uint32_t format)
case RGA_FORMAT_YCbCr_422_P:
case RGA_FORMAT_YCrCb_422_SP:
case RGA_FORMAT_YCrCb_422_P:
case RGA_FORMAT_Y8:
pixel_stride = 8;
break;
case RGA_FORMAT_Y4:
@@ -765,6 +773,7 @@ int rga_image_size_cal(int w, int h, int format,
break;
case RGA_FORMAT_YCbCr_400:
case RGA_FORMAT_A8:
case RGA_FORMAT_Y8:
yrgb = w * h;
break;
case RGA_FORMAT_Y4:

1
drivers/video/rockchip/rga3/rga_dma_buf.c
View File

@@ -133,6 +133,7 @@ int rga_buf_size_cal(unsigned long yrgb_addr, unsigned long uv_addr,
pageCount = end - start;
break;
case RGA_FORMAT_YCbCr_400:
case RGA_FORMAT_Y8:
stride = (w + 3) & (~3);
size_yrgb = stride * h;
start = yrgb_addr >> PAGE_SHIFT;

1
drivers/video/rockchip/rga3/rga_hw_config.c
View File

@@ -274,6 +274,7 @@ const uint32_t rga2p_output_raster_format[] = {
RGA_FORMAT_YCbCr_422_SP_10B,
RGA_FORMAT_YCrCb_422_SP_10B,
RGA_FORMAT_Y4,
RGA_FORMAT_Y8,
RGA_FORMAT_YCbCr_400,
RGA_FORMAT_RGBA_5551,
RGA_FORMAT_BGRA_5551,