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osd: fix osd bootanimation shift [2/2]

Browse Source 
PD#SWPL-19862

Problem:
osd regs init are different with meson-hwc setting

Solution:
osd regs init are different with meson-hwc setting

Verify:
franklin

Change-Id: Ic9f19a82859e1e18e57084935873b10057436e3b
Signed-off-by: Pengcheng Chen <pengcheng.chen@amlogic.com>
This commit is contained in:
Pengcheng Chen
2020-03-02 15:40:20 +08:00
committed by Chris
parent 41363d31d9
commit f00ffd42a9
1 changed files with 21 additions and 17 deletions
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38
drivers/amlogic/media/osd/osd_hw.c
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@@ -3675,8 +3675,10 @@ void osd_switch_free_scale(
if (next_index == OSD1
&& osd_hw.osd_afbcd[next_index].enable
&& next_enable) {
osd_reg_write(VIU_SW_RESET, 0x80000000);
osd_reg_write(VIU_SW_RESET, 0);
if (osd_hw.osd_meson_dev.osd_ver == OSD_NORMAL) {
osd_reg_write(VIU_SW_RESET, 0x80000000);
osd_reg_write(VIU_SW_RESET, 0);
}
osd_afbc_dec_enable = 0;
osd_hw.reg[OSD_GBL_ALPHA].update_func(next_index);
}
@@ -3689,15 +3691,16 @@ void osd_switch_free_scale(
osd_hw.reg[DISP_FREESCALE_ENABLE].
update_func(pre_index);
osd_hw.reg[OSD_ENABLE].update_func(pre_index);
}
osd_hw.reg[OSD_COLOR_MODE].update_func(next_index);
if (next_scale)
osd_hw.reg
[OSD_FREESCALE_COEF].update_func(next_index);
osd_hw.reg[DISP_GEOMETRY].update_func(next_index);
osd_hw.reg[DISP_FREESCALE_ENABLE].update_func(next_index);
osd_hw.reg[OSD_ENABLE].update_func(next_index);
osd_hw.reg[OSD_COLOR_MODE].update_func(next_index);
if (next_scale)
osd_hw.reg[OSD_FREESCALE_COEF].
update_func(next_index);
osd_hw.reg[DISP_GEOMETRY].update_func(next_index);
osd_hw.reg[DISP_FREESCALE_ENABLE].
update_func(next_index);
osd_hw.reg[OSD_ENABLE].update_func(next_index);
}
spin_unlock_irqrestore(&osd_lock, lock_flags);
osd_wait_vsync_hw(next_index);
} else {
@@ -8711,15 +8714,15 @@ static int osd_setting_order(u32 output_index)
static void osd_setting_default_hwc(void)
{
u32 blend_hsize, blend_vsize;
u32 blend2_premult_en = 1, din_premult_en = 0;
u32 blend_din_en = 0x1;
u32 blend2_premult_en = 3, din_premult_en = 0;
u32 blend_din_en = 0x5;
/* blend_din0 input to blend0 */
u32 din0_byp_blend = 1;
u32 din0_byp_blend = 0;
/* blend1_dout to blend2 */
u32 din2_osd_sel = 1;
u32 din2_osd_sel = 0;
/* blend1_din3 input to blend1 */
u32 din3_osd_sel = 1;
u32 din_reoder_sel = 0x1;
u32 din3_osd_sel = 0;
u32 din_reoder_sel = 0x4441;
u32 postbld_src3_sel = 3, postbld_src4_sel = 0;
u32 postbld_osd1_premult = 0, postbld_osd2_premult = 0;
@@ -9581,6 +9584,8 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
for (idx = 0; idx < osd_hw.osd_meson_dev.viu1_osd_count; idx++)
osd_reg_write(
hw_osd_reg_array[idx].osd_ctrl_stat, data32);
if (osd_hw.osd_meson_dev.osd_ver == OSD_HIGH_ONE)
osd_setting_default_hwc();
}
if (osd_hw.osd_meson_dev.osd_ver <= OSD_NORMAL) {
osd_vpp_misc =
@@ -9693,7 +9698,6 @@ void osd_init_hw(u32 logo_loaded, u32 osd_probe,
#endif
osd_set_basic_urgent(true);
osd_set_two_ports(true);
osd_setting_default_hwc();
}
/* disable deband as default */
if (osd_hw.osd_meson_dev.has_deband)