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ARM: dts: sun8i-a23-a33: Move NAND controller device node to sort by address
[ Upstream commitd027521497] The NAND controller device node was inserted into the wrong position, probably due to a rebase or merge, as the file's structure does not provide enough context for git to accurately match the previous device node block. Fixes:d7b843df13("ARM: dts: sun8i: add NAND controller node for A23/A33") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
committed by
Greg Kroah-Hartman
parent
8dc15688b3
commit
f04e08f7c3
@@ -155,6 +155,19 @@
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#dma-cells = <1>;
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};
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nfc: nand@1c03000 {
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compatible = "allwinner,sun4i-a10-nand";
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reg = <0x01c03000 0x1000>;
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interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>;
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clock-names = "ahb", "mod";
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resets = <&ccu RST_BUS_NAND>;
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reset-names = "ahb";
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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mmc0: mmc@1c0f000 {
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compatible = "allwinner,sun7i-a20-mmc";
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reg = <0x01c0f000 0x1000>;
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@@ -212,21 +225,6 @@
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#size-cells = <0>;
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};
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nfc: nand@1c03000 {
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compatible = "allwinner,sun4i-a10-nand";
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reg = <0x01c03000 0x1000>;
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interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>;
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clock-names = "ahb", "mod";
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resets = <&ccu RST_BUS_NAND>;
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reset-names = "ahb";
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pinctrl-names = "default";
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pinctrl-0 = <&nand_pins &nand_pins_cs0 &nand_pins_rb0>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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usb_otg: usb@1c19000 {
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/* compatible gets set in SoC specific dtsi file */
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reg = <0x01c19000 0x0400>;
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