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pinctrl: fixed abnormal pulse signal problem

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PD#167713: pinctrl: fixed abnormal pulse signal problem

GPIO_O:   control output level, and available in output mode
GPIO_OEN: control output enable; GPIO_OEN=0: output, GPIO_OEN=1: input

Precondition:
- GPIO_OEN=1
- GPIO_O=1
- Low level on pin

if we use the interface below to set pin to output mode and output low
level, the pin will generate abnormal pulse signal with about 1us.

gpio_direction_output(pin, GPIOF_OUT_INIT_LOW)

  low      ->     high    ->   low
GPIO_OEN=1     GPIO_OEN=0    GPIO_OEN=0
GPIO_O=1       GPIO_O=1      GPIO_O=0

to solve the problem, we must ensure that the GPIO_O is set before the
GPIO_OEN.

  low      ->     low     ->   low
GPIO_OEN=1     GPIO_OEN=1    GPIO_OEN=0
GPIO_O=1       GPIO_O=0      GPIO_O=0

Change-Id: I02bdcc46a40aeb7378799ecbafda3825704d1003
Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com>
This commit is contained in:
Xingyu Chen
2018-06-04 16:53:44 +08:00
committed by Yixun Lan
parent 998d78aa91
commit f0c191798e
1 changed files with 5 additions and 5 deletions
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10
drivers/amlogic/pinctrl/pinctrl-meson.c
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@@ -447,14 +447,14 @@ static int meson_gpio_direction_output(struct gpio_chip *chip,
if (ret)
return ret;
meson_calc_reg_and_bit(bank, gpio, REG_DIR, &reg, &bit);
ret = regmap_update_bits(pc->reg_gpio, reg, BIT(bit), 0);
meson_calc_reg_and_bit(bank, gpio, REG_OUT, &reg, &bit);
ret = regmap_update_bits(pc->reg_gpio, reg, BIT(bit),
value ? BIT(bit) : 0);
if (ret)
return ret;
meson_calc_reg_and_bit(bank, gpio, REG_OUT, &reg, &bit);
return regmap_update_bits(pc->reg_gpio, reg, BIT(bit),
value ? BIT(bit) : 0);
meson_calc_reg_and_bit(bank, gpio, REG_DIR, &reg, &bit);
return regmap_update_bits(pc->reg_gpio, reg, BIT(bit), 0);
}
static void meson_gpio_set(struct gpio_chip *chip, unsigned int gpio,