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misc: rk628: fix 64-bit division error when compiling arm platform
Type: Fix Redmine ID: N/A Associated modifications: N/A Test: N/A Signed-off-by: Zhibin Huang <zhibin.huang@rock-chips.com> Change-Id: I1bf1319de734979735ff3af95bd83f12ffcd3c5c
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@@ -921,8 +921,7 @@ static void rk628_show_resolution(struct seq_file *s)
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src_vtotal = src_mode->vtotal;
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/* get fps */
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fps = clk_rx_read * 1000;
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do_div(fps, src_htotal * src_vtotal);
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fps = clk_rx_read * 1000 / (src_htotal * src_vtotal);
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/* print */
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DEBUG_PRINT(" Display mode: %dx%dp%d,dclk[%u]\n", src_hactive,
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@@ -955,7 +954,8 @@ static void rk628f_show_rgbrx_resolution(struct seq_file *s)
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imodet_clk = rk628_cru_clk_get_rate(rk628, CGU_CLK_IMODET);
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clk_rx_read = imodet_clk * rgb_rx_clkrate / (rgb_rx_eval_time + 1);
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clk_rx_read = imodet_clk * rgb_rx_clkrate;
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do_div(clk_rx_read, rgb_rx_eval_time + 1);
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do_div(clk_rx_read, 1000);
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/* get timing */
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@@ -976,8 +976,7 @@ static void rk628f_show_rgbrx_resolution(struct seq_file *s)
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src_vtotal = val & 0xffff;
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/* get fps */
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fps = clk_rx_read * 1000;
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do_div(fps, src_htotal * src_vtotal);
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fps = clk_rx_read * 1000 / (src_htotal * src_vtotal);
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/* print */
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DEBUG_PRINT(" Display mode: %dx%dp%d,dclk[%llu]\n", src_hactive,
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@@ -1028,8 +1027,7 @@ static void rk628_show_output_resolution(struct seq_file *s)
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dsp_vact_end = val & 0xfff;
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/* get fps */
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fps = sclk_vop * 1000;
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do_div(fps, dsp_vtotal * dsp_htotal);
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fps = sclk_vop * 1000 / (dsp_vtotal * dsp_htotal);
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/* print */
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DEBUG_PRINT(" Display mode: %dx%dp%d,dclk[%llu]\n",
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@@ -247,7 +247,8 @@ static void rk628_hdmirx_audio_clk_set_rate(struct rk628_hdmirx *hdmirx, u32 rat
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static void rk628_hdmirx_audio_clk_ppm_inc(struct rk628_hdmirx *hdmirx, int ppm)
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{
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int delta, rate, inc;
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u64 delta;
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int rate, inc;
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rate = hdmirx->audio_state.hdmirx_aud_clkrate;
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if (ppm < 0) {
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@@ -255,11 +256,13 @@ static void rk628_hdmirx_audio_clk_ppm_inc(struct rk628_hdmirx *hdmirx, int ppm)
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inc = -1;
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} else
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inc = 1;
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delta = (uint64_t)((uint64_t)rate * ppm + 500000) / 1000000;
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delta = (uint64_t)((uint64_t)rate * ppm + 500000);
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do_div(delta, 1000000);
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delta *= inc;
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rate += delta;
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rate += (int)delta;
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dev_dbg(hdmirx->rk628->dev, "%s: %u to %u(delta:%d)\n",
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__func__, hdmirx->audio_state.hdmirx_aud_clkrate, rate, delta);
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__func__, hdmirx->audio_state.hdmirx_aud_clkrate, rate, (int)delta);
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rk628_cru_clk_set_rate(hdmirx->rk628, CGU_CLK_HDMIRX_AUD, rate);
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hdmirx->audio_state.hdmirx_aud_clkrate = rate;
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}
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@@ -674,7 +677,7 @@ static void rk628_hdmirx_get_timing(struct rk628 *rk628)
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u64 tmp_data;
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u32 interlaced;
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u32 hfrontporch, hsync, hbackporch, vfrontporch, vsync, vbackporch;
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unsigned long long pixelclock;
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unsigned long long pixelclock, clock;
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unsigned long flags = 0;
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struct rk628_hdmirx *hdmirx = rk628->hdmirx;
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@@ -770,7 +773,10 @@ static void rk628_hdmirx_get_timing(struct rk628 *rk628)
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pixelclock /= 2;
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}
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hdmirx->mode.clock = pixelclock / 1000;
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clock = pixelclock;
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do_div(clock, 1000);
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hdmirx->mode.clock = clock;
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hdmirx->mode.hdisplay = hact;
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hdmirx->mode.hstart = hdmirx->mode.hdisplay + hfrontporch;
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hdmirx->mode.hend = hdmirx->mode.hstart + hsync;
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@@ -57,7 +57,8 @@ static int rk628_rgb_resolution_show(struct seq_file *s, void *data)
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rgb_rx_clkrate = val & RGB_RX_CLKRATE_MASK;
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ref_clk = rk628_cru_clk_get_rate(rk628, CGU_CLK_IMODET);
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pixel_clk = ref_clk * rgb_rx_clkrate / (rgb_rx_eval_time + 1);
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pixel_clk = ref_clk * rgb_rx_clkrate;
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do_div(pixel_clk, rgb_rx_eval_time + 1);
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if (rk628_input_is_rgb(rk628)) {
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rk628_i2c_read(rk628, GRF_RGB_RX_DBG_MEAS4, &val);
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