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wm8994 : Improve the quality of the recording
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@@ -1528,7 +1528,7 @@ struct wm8994_pdata wm8994_platdata = {
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.headset_normal_vol = -6,
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.BT_incall_vol = 0,
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.BT_incall_mic_vol = 0,
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.recorder_vol = 20,
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.recorder_vol = 30,
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};
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@@ -272,7 +272,7 @@ out:
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return -EIO;
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}
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static int wm8994_set_bit(unsigned short reg,unsigned short val)
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static int wm8994_set_bit(unsigned short reg,unsigned short mask, unsigned short val)
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{
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int ret;
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u16 r;
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@@ -280,7 +280,8 @@ static int wm8994_set_bit(unsigned short reg,unsigned short val)
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ret = wm8994_read(reg, &r);
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if (ret < 0)
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goto out;
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r &= ~mask;
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r |= val;
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ret = wm8994_write(reg, r);
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@@ -546,7 +547,7 @@ static int wm8994_sysclk_config(void)
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printk("wm8994->rate = %d!!!!\n",wm8994->rate);
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break;
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case 44100:
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wm8994_write(0x210, 0x0073); // SR=48KHz
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wm8994_write(0x210, 0x0073); // SR=44.1KHz
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break;
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case 48000:
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wm8994_write(0x210, 0x0083); // SR=48KHz
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@@ -794,17 +795,17 @@ void record_only(void)
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msleep(WM8994_DELAY);
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//clk
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wm8994_sysclk_config();
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wm8994_write(0x300, 0xC010); //AIF1ADCL_SRC=1, AIF1ADCR_SRC=1, AIF1_WL=00, AIF1_FMT=10
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// wm8994_write(0x300, 0xC050); // AIF1ADCL_SRC=1, AIF1ADCR_SRC=1, AIF1_WL=10, AIF1_FMT=10
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// wm8994_write(0x300, 0xC010); //AIF1ADCL_SRC=1, AIF1ADCR_SRC=1, AIF1_WL=00, AIF1_FMT=10
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wm8994_write(0x300, 0xC050); // AIF1ADCL_SRC=1, AIF1ADCR_SRC=1, AIF1_WL=10, AIF1_FMT=10
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//path
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wm8994_write(0x28, 0x0003); // IN1RP_TO_IN1R=1, IN1RN_TO_IN1R=1
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wm8994_write(0x2A, 0x0030); //IN1R_TO_MIXINR IN1R_MIXINR_VOL
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wm8994_write(0x2A, 0x0020); //IN1R_TO_MIXINR IN1R_MIXINR_VOL
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wm8994_write(0x606, 0x0002); // ADC1L_TO_AIF1ADC1L=1
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wm8994_write(0x607, 0x0002); // ADC1R_TO_AIF1ADC1R=1
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wm8994_write(0x620, 0x0000); //ADC_OSR128=0, DAC_OSR128=0
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//DRC
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wm8994_write(0x440, 0x01BF);
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wm8994_write(0x450, 0x01BF);
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wm8994_write(0x440, 0x01BB);
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wm8994_write(0x450, 0x01BB);
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//valume
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// wm8994_write(0x1A, 0x014B);//IN1_VU=1, IN1R_MUTE=0, IN1R_ZC=1, IN1R_VOL=0_1011
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wm8994_write(0x402, 0x01FF); // AIF1ADC1L_VOL [7:0]
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@@ -829,26 +830,33 @@ void recorder_add(void)
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if(wm8994_current_mode==wm8994_record_add)return;
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wm8994_current_mode=wm8994_record_add;
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//path
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wm8994_set_bit(0x28, 0x0003); // IN1RP_TO_IN1R=1, IN1RN_TO_IN1R=1
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wm8994_set_bit(0x2A, 0x0030); //IN1R_TO_MIXINR IN1R_MIXINR_VOL
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wm8994_set_bit(0x606, 0x0002); // ADC1L_TO_AIF1ADC1L=1
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wm8994_set_bit(0x607, 0x0002); // ADC1R_TO_AIF1ADC1R=1
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wm8994_set_bit(0x28, 0x0003 ,0x0003); // IN1RP_TO_IN1R=1, IN1RN_TO_IN1R=1
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wm8994_set_bit(0x2A, 0x0020 ,0x0020); //IN1R_TO_MIXINR IN1R_MIXINR_VOL
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wm8994_set_bit(0x606,0x0002 ,0x0002); // ADC1L_TO_AIF1ADC1L=1
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wm8994_set_bit(0x607,0x0002 ,0x0002); // ADC1R_TO_AIF1ADC1R=1
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//DRC
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wm8994_set_bit(0x440, 0x01BF);
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wm8994_set_bit(0x450, 0x01BF);
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wm8994_set_bit(0x440,0x01BB,0x01BB);
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wm8994_set_bit(0x450,0x01BB,0x01BB);
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//valume
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// wm8994_set_bit(0x1A, 0x014B);//IN1_VU=1, IN1R_MUTE=0, IN1R_ZC=1, IN1R_VOL=0_1011
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wm8994_set_bit(0x402, 0x01FF); // AIF1ADC1L_VOL [7:0]
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wm8994_set_bit(0x403, 0x01FF); // AIF1ADC1R_VOL [7:0]
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wm8994_set_bit(0x402,0x01FF,0x01FF); // AIF1ADC1L_VOL [7:0]
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wm8994_set_bit(0x403,0x01FF,0x01FF); // AIF1ADC1R_VOL [7:0]
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//power
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wm8994_set_bit(0x02, 0x6110); // TSHUT_ENA=1, TSHUT_OPDIS=1, MIXINR_ENA=1,IN1R_ENA=1
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wm8994_set_bit(0x04, 0x0303); // AIF1ADC1L_ENA=1, AIF1ADC1R_ENA=1, ADCL_ENA=1, ADCR_ENA=1
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wm8994_set_bit(0x01, 0x0033);
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wm8994_set_bit(0x02, 0x6110,0x6110); // TSHUT_ENA=1, TSHUT_OPDIS=1, MIXINR_ENA=1,IN1R_ENA=1
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wm8994_set_bit(0x04, 0x0303,0x0303); // AIF1ADC1L_ENA=1, AIF1ADC1R_ENA=1, ADCL_ENA=1, ADCR_ENA=1
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wm8994_set_bit(0x01, 0x0033,0x0033);
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out:
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MAX_MIN(-16,pdata->recorder_vol,60);
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DBG("recorder_vol = %ddB \n",pdata->recorder_vol);
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wm8994_write(0x1A, 320+(pdata->recorder_vol+16)*10/15); //mic vol
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if(pdata->recorder_vol <= 30)
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wm8994_set_bit(0x1A, 0x1FF , 320+(pdata->recorder_vol+16)*10/15); //mic vol
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else
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{
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pdata->recorder_vol -= 30;
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wm8994_set_bit(0x2A, 0x0010, 0x0010); //IN1R_TO_MIXINR IN1R_MIXINR_VOL
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wm8994_set_bit(0x1A, 0x1FF , 320+(pdata->recorder_vol+16)*10/15); //mic vol
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}
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}
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void AP_to_speakers_and_headset(void)
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@@ -1696,6 +1704,7 @@ int snd_soc_put_route(struct snd_kcontrol *kcontrol,
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PA_ctrl(GPIO_LOW);
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break;
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}
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//set rount
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switch(route)
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{
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