shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-07 19:30:30 +09:00
Code Issues Packages Projects Releases Wiki Activity

emmc: modify the emmc device driver strength to type 0 [1/1]

Browse Source 
PD#SWPL-8806

Problem:
the driver strength is type 1 on sm1

Solution:
modify sm1 dts

Verify:
passed on sm1_ac213

Change-Id: Iea5093541dc0bbd08954e78827309a45a84efc60
Signed-off-by: Ruixuan Li <ruixuan.li@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
This commit is contained in:
Ruixuan Li
2019-05-21 19:32:48 +08:00
committed by Luan Yuan
parent a07f7d93d2
commit f209f97be5
10 changed files with 20 additions and 10 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/boot/dts/amlogic/sm1_s905d3_ac200.dts
View File

@@ -1705,7 +1705,8 @@
/* "MMC_CAP_1_8V_DDR", */
"MMC_CAP_HW_RESET",
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
"MMC_CAP_CMD23",
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <200000000>;

3
arch/arm/boot/dts/amlogic/sm1_s905d3_ac202.dts
View File

@@ -1718,7 +1718,8 @@
/* "MMC_CAP_1_8V_DDR", */
"MMC_CAP_HW_RESET",
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
"MMC_CAP_CMD23",
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <200000000>;

3
arch/arm/boot/dts/amlogic/sm1_s905d3_ac202_1g.dts
View File

@@ -1718,7 +1718,8 @@
/* "MMC_CAP_1_8V_DDR", */
"MMC_CAP_HW_RESET",
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
"MMC_CAP_CMD23",
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <200000000>;

3
arch/arm/boot/dts/amlogic/sm1_s905d3_skt.dts
View File

@@ -1703,7 +1703,8 @@
/* "MMC_CAP_1_8V_DDR", */
"MMC_CAP_HW_RESET",
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
"MMC_CAP_CMD23",
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200";
/* "MMC_CAP2_HS400";*/
f_min = <400000>;

3
arch/arm/boot/dts/amlogic/sm1_s905x3_ac213.dts
View File

@@ -1635,7 +1635,8 @@
/* "MMC_CAP_1_8V_DDR", */
"MMC_CAP_HW_RESET",
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
"MMC_CAP_CMD23",
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <200000000>;

3
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts
View File

@@ -1692,7 +1692,8 @@
/* "MMC_CAP_1_8V_DDR", */
"MMC_CAP_HW_RESET",
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
"MMC_CAP_CMD23",
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <200000000>;

3
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac202.dts
View File

@@ -1704,7 +1704,8 @@
/* "MMC_CAP_1_8V_DDR", */
"MMC_CAP_HW_RESET",
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
"MMC_CAP_CMD23",
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <200000000>;

3
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac202_1g.dts
View File

@@ -1705,7 +1705,8 @@
/* "MMC_CAP_1_8V_DDR", */
"MMC_CAP_HW_RESET",
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
"MMC_CAP_CMD23",
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <200000000>;

3
arch/arm64/boot/dts/amlogic/sm1_s905d3_skt.dts
View File

@@ -1701,7 +1701,8 @@
/* "MMC_CAP_1_8V_DDR", */
"MMC_CAP_HW_RESET",
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
"MMC_CAP_CMD23",
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200";
/* "MMC_CAP2_HS400";*/
f_min = <400000>;

3
arch/arm64/boot/dts/amlogic/sm1_s905x3_ac213.dts
View File

@@ -1711,7 +1711,8 @@
/* "MMC_CAP_1_8V_DDR", */
"MMC_CAP_HW_RESET",
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
"MMC_CAP_CMD23",
"MMC_CAP_DRIVER_TYPE_D";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <400000>;
f_max = <200000000>;