shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-08 11:50:43 +09:00
Code Issues Packages Projects Releases Wiki Activity

modify time sequence of fpga firmware loading

Browse Source
This commit is contained in:
luowei
2010-10-13 11:02:03 +08:00
parent 58a46b553c
commit f2364dedad
3 changed files with 15 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/mach-rk2818/iomux.c
View File

@@ -69,7 +69,7 @@ MUX_CFG(GPIOB3_U0RTSN_SEL_NAME, B, 13, 1, 0, DEFAULT) /* 0 : gpio_b3 1
MUX_CFG(GPIOB2_U0CTSN_SEL_NAME, B, 12, 1, 0, DEFAULT) /* 0 : gpio_b2 1 : uart0_cts_n */
MUX_CFG(GPIOF2_APWM0_SEL_NAME, B, 11, 1, 0, INITIAL) /* 0 : gpio_f2 1 : pwm0 */
MUX_CFG(GPIOC_LCDC16BIT_SEL_NAME, B, 10, 1, 1, INITIAL) /* 0 : gpio_d0 ~ gpio_d7 1 : lcdc_data8 ~ lcdc_data15 */
MUX_CFG(GPIOC_LCDC24BIT_SEL_NAME, B, 9, 1, 1, INITIAL) /* 0 : gpio_c2 ~ gpio_c7 1 : lcdc_data18 ~ lcdc_data23 */
MUX_CFG(GPIOC_LCDC24BIT_SEL_NAME, B, 9, 1, 0, INITIAL) /* 0 : gpio_c2 ~ gpio_c7 1 : lcdc_data18 ~ lcdc_data23 */
MUX_CFG(GPIOC_LCDC18BIT_SEL_NAME, B, 8, 1, 1, INITIAL) /* 0 : gpio_c0/c1 1 : lcdc_data16 ~ lcdc_data17 */
MUX_CFG(CXGPIO_LCDDEN_SEL_NAME, B, 7, 1, 1, INITIAL) /* 0 : gpio2_26 1 : lcdc_denable */
MUX_CFG(CXGPIO_LCDVSYNC_SEL_NAME, B, 6, 1, 1, INITIAL) /* 0 : gpio2_25 1 : lcdc_vsync */

14
drivers/fpga/spi_fpga_fw.c
View File

@@ -165,13 +165,13 @@ static void __init spi_fpga_dlfw(unsigned char * fpga_fw, unsigned int fpga_fw_l
//step 2
FPGA_CRESET_HIGH();
udelay(500); //delay >= 300us for clear internal memory
mdelay(2); //delay >= 300us for clear internal memory
//step 3
//spi_fpga_wait(8); //need ???
//step 4
//FPGA_CS_HIGH();
FPGA_CS_HIGH();
spi_fpga_wait(8);
//step 5
@@ -180,7 +180,7 @@ static void __init spi_fpga_dlfw(unsigned char * fpga_fw, unsigned int fpga_fw_l
//step 6
//FPGA_CS_HIGH();
FPGA_CS_HIGH();
spi_fpga_wait(13000);
//step 7
@@ -189,7 +189,7 @@ static void __init spi_fpga_dlfw(unsigned char * fpga_fw, unsigned int fpga_fw_l
//step 8
//FPGA_CS_HIGH();
FPGA_CS_HIGH();
spi_fpga_wait(8);
//step 9
@@ -198,7 +198,7 @@ static void __init spi_fpga_dlfw(unsigned char * fpga_fw, unsigned int fpga_fw_l
//step 10
//FPGA_CS_HIGH();
FPGA_CS_HIGH();
spi_fpga_wait(8);
//step 11
@@ -207,11 +207,11 @@ static void __init spi_fpga_dlfw(unsigned char * fpga_fw, unsigned int fpga_fw_l
//step 12
//FPGA_CS_HIGH();
FPGA_CS_HIGH();
spi_fpga_wait(8);
//step 13
//FPGA_CS_HIGH();
FPGA_CS_HIGH();
spi_fpga_send_bytes(fpga_fw, fpga_fw_len);
//step 14

8
drivers/fpga/spi_i2c.c
View File

@@ -66,6 +66,9 @@ int spi_i2c_handle_irq(struct spi_fpga_port *port,unsigned char channel)
}
else if(INT_I2C_READ_NACK ==(ret & 0x07))
{
#if SPI_FPGA_I2C_EVENT
wake_up(&port->i2c.wait_r);
#endif
printk("Error::read no ack!!check the I2C slave device ret=%d \n",ret);
}
else if(INT_I2C_WRITE_ACK == (ret & 0x07))
@@ -77,6 +80,9 @@ int spi_i2c_handle_irq(struct spi_fpga_port *port,unsigned char channel)
}
else if(INT_I2C_WRITE_NACK == (ret & 0x07))
{
#if SPI_FPGA_I2C_EVENT
wake_up(&port->i2c.wait_w);
#endif
printk("Error::write no ack!!check the I2C slave device ret=%d \n",ret);
}
else
@@ -247,7 +253,7 @@ int spi_i2c_writebuf(struct spi_fpga_port *port ,struct i2c_msg *pmsg,int ch)
if(ret == 0)
{
printk("%s:60ms time out!\n",__FUNCTION__);
return -1;
continue;
}
spin_lock(&port->i2c.i2c_lock);
port->i2c.interrupt &= INT_I2C_WRITE_MASK;