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sd: add sd_uart support

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PD#149976: add sd to uart support
modify emmc init min clk freq to 400k.

Change-Id: I204d68668497a1a6a1f37f5e06d944a2687412ff
Signed-off-by: Nan Li <nan.li@amlogic.com>
This commit is contained in:
Nan Li
2017-09-05 10:39:24 +08:00
committed by Jianxin Pan
parent 587e8e99f7
commit f2ce8a4f04
23 changed files with 660 additions and 225 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm64/boot/dts/amlogic/axg_a113d_skt.dts
View File

@@ -548,7 +548,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
/*caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";*/
f_min = <300000>;
f_min = <400000>;
f_max = <100000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;

2
arch/arm64/boot/dts/amlogic/axg_a113x_skt.dts
View File

@@ -495,7 +495,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
/*caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";*/
f_min = <300000>;
f_min = <400000>;
f_max = <100000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;

2
arch/arm64/boot/dts/amlogic/axg_s400.dts
View File

@@ -630,7 +630,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <300000>;
f_min = <400000>;
f_max = <200000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;

2
arch/arm64/boot/dts/amlogic/axg_s400_v03.dts
View File

@@ -630,7 +630,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <300000>;
f_min = <400000>;
f_max = <200000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;

2
arch/arm64/boot/dts/amlogic/axg_s420.dts
View File

@@ -498,7 +498,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
/*caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";*/
f_min = <300000>;
f_min = <400000>;
f_max = <100000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;

2
arch/arm64/boot/dts/amlogic/axg_s420_128m.dts
View File

@@ -497,7 +497,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
/*caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";*/
f_min = <300000>;
f_min = <400000>;
f_max = <100000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;

2
arch/arm64/boot/dts/amlogic/axg_s420_v03.dts
View File

@@ -499,7 +499,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
/*caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";*/
f_min = <300000>;
f_min = <400000>;
f_max = <100000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;

20
arch/arm64/boot/dts/amlogic/gxl_p212_1g.dts
View File

@@ -200,7 +200,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <300000>;
f_min = <400000>;
f_max = <100000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
@@ -219,14 +219,24 @@
interrupts = <0 217 1>;
pinctrl-names = "sd_all_pins",
"sd_clk_cmd_pins",
"sd_1bit_pins",
"sd_clk_cmd_uart_pins",
"sd_1bit_uart_pins",
"sd_to_ao_uart_pins",
"ao_to_sd_uart_pins";
"ao_to_sd_uart_pins",
"ao_to_sd_jtag_pins",
"sd_to_ao_jtag_pins";
pinctrl-0 = <&sd_all_pins>;
pinctrl-1 = <&sd_clk_cmd_pins>;
pinctrl-2 = <&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-3 = <&sd_to_ao_uart_pins>;
pinctrl-4 = <&ao_to_sd_uart_pins>;
pinctrl-2 = <&sd_1bit_pins>;
pinctrl-3 = <&sd_to_ao_uart_clr_pins
&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-4 = <&sd_to_ao_uart_clr_pins
&sd_1bit_pins &ao_to_sd_uart_pins>;
pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
clocks = <&clkc CLKID_SD_EMMC_B>,
<&clkc CLKID_SD_EMMC_B_P0_COMP>,
<&clkc CLKID_FCLK_DIV2>;

20
arch/arm64/boot/dts/amlogic/gxl_p212_1g_buildroot.dts
View File

@@ -199,7 +199,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <300000>;
f_min = <400000>;
f_max = <100000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
@@ -218,14 +218,24 @@
interrupts = <0 217 1>;
pinctrl-names = "sd_all_pins",
"sd_clk_cmd_pins",
"sd_1bit_pins",
"sd_clk_cmd_uart_pins",
"sd_1bit_uart_pins",
"sd_to_ao_uart_pins",
"ao_to_sd_uart_pins";
"ao_to_sd_uart_pins",
"ao_to_sd_jtag_pins",
"sd_to_ao_jtag_pins";
pinctrl-0 = <&sd_all_pins>;
pinctrl-1 = <&sd_clk_cmd_pins>;
pinctrl-2 = <&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-3 = <&sd_to_ao_uart_pins>;
pinctrl-4 = <&ao_to_sd_uart_pins>;
pinctrl-2 = <&sd_1bit_pins>;
pinctrl-3 = <&sd_to_ao_uart_clr_pins
&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-4 = <&sd_to_ao_uart_clr_pins
&sd_1bit_pins &ao_to_sd_uart_pins>;
pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
clocks = <&clkc CLKID_SD_EMMC_B>,
<&clkc CLKID_SD_EMMC_B_P0_COMP>,
<&clkc CLKID_FCLK_DIV2>;

20
arch/arm64/boot/dts/amlogic/gxl_p212_2g.dts
View File

@@ -209,7 +209,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <300000>;
f_min = <400000>;
f_max = <100000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
@@ -228,14 +228,24 @@
interrupts = <0 217 1>;
pinctrl-names = "sd_all_pins",
"sd_clk_cmd_pins",
"sd_1bit_pins",
"sd_clk_cmd_uart_pins",
"sd_1bit_uart_pins",
"sd_to_ao_uart_pins",
"ao_to_sd_uart_pins";
"ao_to_sd_uart_pins",
"ao_to_sd_jtag_pins",
"sd_to_ao_jtag_pins";
pinctrl-0 = <&sd_all_pins>;
pinctrl-1 = <&sd_clk_cmd_pins>;
pinctrl-2 = <&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-3 = <&sd_to_ao_uart_pins>;
pinctrl-4 = <&ao_to_sd_uart_pins>;
pinctrl-2 = <&sd_1bit_pins>;
pinctrl-3 = <&sd_to_ao_uart_clr_pins
&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-4 = <&sd_to_ao_uart_clr_pins
&sd_1bit_pins &ao_to_sd_uart_pins>;
pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
clocks = <&clkc CLKID_SD_EMMC_B>,
<&clkc CLKID_SD_EMMC_B_P0_COMP>,
<&clkc CLKID_FCLK_DIV2>;

21
arch/arm64/boot/dts/amlogic/gxl_p212_2g_buildroot.dts
View File

@@ -201,7 +201,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <300000>;
f_min = <400000>;
f_max = <100000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
@@ -220,14 +220,24 @@
interrupts = <0 217 1>;
pinctrl-names = "sd_all_pins",
"sd_clk_cmd_pins",
"sd_1bit_pins",
"sd_clk_cmd_uart_pins",
"sd_1bit_uart_pins",
"sd_to_ao_uart_pins",
"ao_to_sd_uart_pins";
"ao_to_sd_uart_pins",
"ao_to_sd_jtag_pins",
"sd_to_ao_jtag_pins";
pinctrl-0 = <&sd_all_pins>;
pinctrl-1 = <&sd_clk_cmd_pins>;
pinctrl-2 = <&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-3 = <&sd_to_ao_uart_pins>;
pinctrl-4 = <&ao_to_sd_uart_pins>;
pinctrl-2 = <&sd_1bit_pins>;
pinctrl-3 = <&sd_to_ao_uart_clr_pins
&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-4 = <&sd_to_ao_uart_clr_pins
&sd_1bit_pins &ao_to_sd_uart_pins>;
pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
clocks = <&clkc CLKID_SD_EMMC_B>,
<&clkc CLKID_SD_EMMC_B_P0_COMP>,
<&clkc CLKID_FCLK_DIV2>;
@@ -1205,3 +1215,4 @@
&audio_data{
status = "okay";
};

20
arch/arm64/boot/dts/amlogic/gxl_p230_2g.dts
View File

@@ -195,7 +195,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <300000>;
f_min = <400000>;
f_max = <100000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
@@ -214,14 +214,24 @@
interrupts = <0 217 1>;
pinctrl-names = "sd_all_pins",
"sd_clk_cmd_pins",
"sd_1bit_pins",
"sd_clk_cmd_uart_pins",
"sd_1bit_uart_pins",
"sd_to_ao_uart_pins",
"ao_to_sd_uart_pins";
"ao_to_sd_uart_pins",
"ao_to_sd_jtag_pins",
"sd_to_ao_jtag_pins";
pinctrl-0 = <&sd_all_pins>;
pinctrl-1 = <&sd_clk_cmd_pins>;
pinctrl-2 = <&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-3 = <&sd_to_ao_uart_pins>;
pinctrl-4 = <&ao_to_sd_uart_pins>;
pinctrl-2 = <&sd_1bit_pins>;
pinctrl-3 = <&sd_to_ao_uart_clr_pins
&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-4 = <&sd_to_ao_uart_clr_pins
&sd_1bit_pins &ao_to_sd_uart_pins>;
pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
clocks = <&clkc CLKID_SD_EMMC_B>,
<&clkc CLKID_SD_EMMC_B_P0_COMP>,
<&clkc CLKID_FCLK_DIV2>;

20
arch/arm64/boot/dts/amlogic/gxl_p231_1g.dts
View File

@@ -200,7 +200,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <300000>;
f_min = <400000>;
f_max = <100000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
@@ -219,14 +219,24 @@
interrupts = <0 217 1>;
pinctrl-names = "sd_all_pins",
"sd_clk_cmd_pins",
"sd_1bit_pins",
"sd_clk_cmd_uart_pins",
"sd_1bit_uart_pins",
"sd_to_ao_uart_pins",
"ao_to_sd_uart_pins";
"ao_to_sd_uart_pins",
"ao_to_sd_jtag_pins",
"sd_to_ao_jtag_pins";
pinctrl-0 = <&sd_all_pins>;
pinctrl-1 = <&sd_clk_cmd_pins>;
pinctrl-2 = <&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-3 = <&sd_to_ao_uart_pins>;
pinctrl-4 = <&ao_to_sd_uart_pins>;
pinctrl-2 = <&sd_1bit_pins>;
pinctrl-3 = <&sd_to_ao_uart_clr_pins
&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-4 = <&sd_to_ao_uart_clr_pins
&sd_1bit_pins &ao_to_sd_uart_pins>;
pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
clocks = <&clkc CLKID_SD_EMMC_B>,
<&clkc CLKID_SD_EMMC_B_P0_COMP>,
<&clkc CLKID_FCLK_DIV2>;

20
arch/arm64/boot/dts/amlogic/gxl_p231_2g.dts
View File

@@ -200,7 +200,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <300000>;
f_min = <400000>;
f_max = <100000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
@@ -219,14 +219,24 @@
interrupts = <0 217 1>;
pinctrl-names = "sd_all_pins",
"sd_clk_cmd_pins",
"sd_1bit_pins",
"sd_clk_cmd_uart_pins",
"sd_1bit_uart_pins",
"sd_to_ao_uart_pins",
"ao_to_sd_uart_pins";
"ao_to_sd_uart_pins",
"ao_to_sd_jtag_pins",
"sd_to_ao_jtag_pins";
pinctrl-0 = <&sd_all_pins>;
pinctrl-1 = <&sd_clk_cmd_pins>;
pinctrl-2 = <&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-3 = <&sd_to_ao_uart_pins>;
pinctrl-4 = <&ao_to_sd_uart_pins>;
pinctrl-2 = <&sd_1bit_pins>;
pinctrl-3 = <&sd_to_ao_uart_clr_pins
&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-4 = <&sd_to_ao_uart_clr_pins
&sd_1bit_pins &ao_to_sd_uart_pins>;
pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
clocks = <&clkc CLKID_SD_EMMC_B>,
<&clkc CLKID_SD_EMMC_B_P0_COMP>,
<&clkc CLKID_FCLK_DIV2>;

20
arch/arm64/boot/dts/amlogic/gxl_p231_2g_buildroot.dts
View File

@@ -201,7 +201,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <300000>;
f_min = <400000>;
f_max = <100000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
@@ -220,14 +220,24 @@
interrupts = <0 217 1>;
pinctrl-names = "sd_all_pins",
"sd_clk_cmd_pins",
"sd_1bit_pins",
"sd_clk_cmd_uart_pins",
"sd_1bit_uart_pins",
"sd_to_ao_uart_pins",
"ao_to_sd_uart_pins";
"ao_to_sd_uart_pins",
"ao_to_sd_jtag_pins",
"sd_to_ao_jtag_pins";
pinctrl-0 = <&sd_all_pins>;
pinctrl-1 = <&sd_clk_cmd_pins>;
pinctrl-2 = <&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-3 = <&sd_to_ao_uart_pins>;
pinctrl-4 = <&ao_to_sd_uart_pins>;
pinctrl-2 = <&sd_1bit_pins>;
pinctrl-3 = <&sd_to_ao_uart_clr_pins
&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-4 = <&sd_to_ao_uart_clr_pins
&sd_1bit_pins &ao_to_sd_uart_pins>;
pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
clocks = <&clkc CLKID_SD_EMMC_B>,
<&clkc CLKID_SD_EMMC_B_P0_COMP>,
<&clkc CLKID_FCLK_DIV2>;

20
arch/arm64/boot/dts/amlogic/gxl_p400_2g.dts
View File

@@ -131,7 +131,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <300000>;
f_min = <400000>;
f_max = <100000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
@@ -150,14 +150,24 @@
interrupts = <0 217 1>;
pinctrl-names = "sd_all_pins",
"sd_clk_cmd_pins",
"sd_1bit_pins",
"sd_clk_cmd_uart_pins",
"sd_1bit_uart_pins",
"sd_to_ao_uart_pins",
"ao_to_sd_uart_pins";
"ao_to_sd_uart_pins",
"ao_to_sd_jtag_pins",
"sd_to_ao_jtag_pins";
pinctrl-0 = <&sd_all_pins>;
pinctrl-1 = <&sd_clk_cmd_pins>;
pinctrl-2 = <&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-3 = <&sd_to_ao_uart_pins>;
pinctrl-4 = <&ao_to_sd_uart_pins>;
pinctrl-2 = <&sd_1bit_pins>;
pinctrl-3 = <&sd_to_ao_uart_clr_pins
&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-4 = <&sd_to_ao_uart_clr_pins
&sd_1bit_pins &ao_to_sd_uart_pins>;
pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
clocks = <&clkc CLKID_SD_EMMC_B>,
<&clkc CLKID_SD_EMMC_B_P0_COMP>,
<&clkc CLKID_FCLK_DIV2>;

20
arch/arm64/boot/dts/amlogic/gxl_p401_2g.dts
View File

@@ -131,7 +131,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <300000>;
f_min = <400000>;
f_max = <100000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
@@ -150,14 +150,24 @@
interrupts = <0 217 1>;
pinctrl-names = "sd_all_pins",
"sd_clk_cmd_pins",
"sd_1bit_pins",
"sd_clk_cmd_uart_pins",
"sd_1bit_uart_pins",
"sd_to_ao_uart_pins",
"ao_to_sd_uart_pins";
"ao_to_sd_uart_pins",
"ao_to_sd_jtag_pins",
"sd_to_ao_jtag_pins";
pinctrl-0 = <&sd_all_pins>;
pinctrl-1 = <&sd_clk_cmd_pins>;
pinctrl-2 = <&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-3 = <&sd_to_ao_uart_pins>;
pinctrl-4 = <&ao_to_sd_uart_pins>;
pinctrl-2 = <&sd_1bit_pins>;
pinctrl-3 = <&sd_to_ao_uart_clr_pins
&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-4 = <&sd_to_ao_uart_clr_pins
&sd_1bit_pins &ao_to_sd_uart_pins>;
pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
clocks = <&clkc CLKID_SD_EMMC_B>,
<&clkc CLKID_SD_EMMC_B_P0_COMP>,
<&clkc CLKID_FCLK_DIV2>;

20
arch/arm64/boot/dts/amlogic/gxl_skt.dts
View File

@@ -191,7 +191,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <300000>;
f_min = <400000>;
f_max = <100000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
@@ -210,14 +210,24 @@
interrupts = <0 217 1>;
pinctrl-names = "sd_all_pins",
"sd_clk_cmd_pins",
"sd_1bit_pins",
"sd_clk_cmd_uart_pins",
"sd_1bit_uart_pins",
"sd_to_ao_uart_pins",
"ao_to_sd_uart_pins";
"ao_to_sd_uart_pins",
"ao_to_sd_jtag_pins",
"sd_to_ao_jtag_pins";
pinctrl-0 = <&sd_all_pins>;
pinctrl-1 = <&sd_clk_cmd_pins>;
pinctrl-2 = <&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-3 = <&sd_to_ao_uart_pins>;
pinctrl-4 = <&ao_to_sd_uart_pins>;
pinctrl-2 = <&sd_1bit_pins>;
pinctrl-3 = <&sd_to_ao_uart_clr_pins
&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-4 = <&sd_to_ao_uart_clr_pins
&sd_1bit_pins &ao_to_sd_uart_pins>;
pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
clocks = <&clkc CLKID_SD_EMMC_B>,
<&clkc CLKID_SD_EMMC_B_P0_COMP>,
<&clkc CLKID_FCLK_DIV2>;

20
arch/arm64/boot/dts/amlogic/gxm_q200_2g.dts
View File

@@ -192,7 +192,7 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <300000>;
f_min = <400000>;
f_max = <100000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
@@ -211,14 +211,24 @@
interrupts = <0 217 1>;
pinctrl-names = "sd_all_pins",
"sd_clk_cmd_pins",
"sd_1bit_pins",
"sd_clk_cmd_uart_pins",
"sd_1bit_uart_pins",
"sd_to_ao_uart_pins",
"ao_to_sd_uart_pins";
"ao_to_sd_uart_pins",
"ao_to_sd_jtag_pins",
"sd_to_ao_jtag_pins";
pinctrl-0 = <&sd_all_pins>;
pinctrl-1 = <&sd_clk_cmd_pins>;
pinctrl-2 = <&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-3 = <&sd_to_ao_uart_pins>;
pinctrl-4 = <&ao_to_sd_uart_pins>;
pinctrl-2 = <&sd_1bit_pins>;
pinctrl-3 = <&sd_to_ao_uart_clr_pins
&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-4 = <&sd_to_ao_uart_clr_pins
&sd_1bit_pins &ao_to_sd_uart_pins>;
pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
clocks = <&clkc CLKID_SD_EMMC_B>,
<&clkc CLKID_SD_EMMC_B_P0_COMP>,
<&clkc CLKID_FCLK_DIV2>;

21
arch/arm64/boot/dts/amlogic/gxm_skt.dts
View File

@@ -166,9 +166,10 @@
"MMC_CAP_ERASE",
"MMC_CAP_CMD23";
caps2 = "MMC_CAP2_HS200", "MMC_CAP2_HS400";
f_min = <300000>;
f_min = <400000>;
f_max = <100000000>;
max_req_size = <0x20000>; /**128KB*/
gpio_dat3 = <&gpio BOOT_3 GPIO_ACTIVE_HIGH>;
hw_reset = <&gpio BOOT_9 GPIO_ACTIVE_HIGH>;
card_type = <1>;
/* 1:mmc card(include eMMC),
@@ -184,14 +185,24 @@
interrupts = <0 217 1>;
pinctrl-names = "sd_all_pins",
"sd_clk_cmd_pins",
"sd_1bit_pins",
"sd_clk_cmd_uart_pins",
"sd_1bit_uart_pins",
"sd_to_ao_uart_pins",
"ao_to_sd_uart_pins";
"ao_to_sd_uart_pins",
"ao_to_sd_jtag_pins",
"sd_to_ao_jtag_pins";
pinctrl-0 = <&sd_all_pins>;
pinctrl-1 = <&sd_clk_cmd_pins>;
pinctrl-2 = <&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-3 = <&sd_to_ao_uart_pins>;
pinctrl-4 = <&ao_to_sd_uart_pins>;
pinctrl-2 = <&sd_1bit_pins>;
pinctrl-3 = <&sd_to_ao_uart_clr_pins
&sd_clk_cmd_pins &ao_to_sd_uart_pins>;
pinctrl-4 = <&sd_to_ao_uart_clr_pins
&sd_1bit_pins &ao_to_sd_uart_pins>;
pinctrl-5 = <&sd_all_pins &sd_to_ao_uart_pins>;
pinctrl-6 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-7 = <&sd_to_ao_uart_clr_pins &ao_to_sd_uart_pins>;
pinctrl-8 = <&sd_all_pins &sd_to_ao_uart_pins>;
clocks = <&clkc CLKID_SD_EMMC_B>,
<&clkc CLKID_SD_EMMC_B_P0_COMP>,
<&clkc CLKID_FCLK_DIV2>;

51
arch/arm64/boot/dts/amlogic/mesongxl.dtsi
View File

@@ -304,7 +304,7 @@
xtal_tick_en = <1>;
fifosize = < 64 >;
pinctrl-names = "default";
pinctrl-0 = <&ao_uart_pins>;
/*pinctrl-0 = <&ao_uart_pins>;*/
support-sysrq = <0>; /* 0 not support , 1 support */
};
@@ -554,6 +554,14 @@ i2c_ao: i2c@c8100500{ /*I2C-AO*/
};
};
sd_to_ao_uart_clr_pins:sd_to_ao_uart_clr_pins {
mux {
groups = "GPIOAO_0",
"GPIOAO_1";
function = "gpio_aobus";
};
};
sd_to_ao_uart_pins:sd_to_ao_uart_pins {
mux {
groups = "uart_tx_ao_a_0",
@@ -685,24 +693,43 @@ i2c_ao: i2c@c8100500{ /*I2C-AO*/
* };
* sd_all_pins:sd_all_pins {
* };
* sd_1bit_pins:sd_1bit_pins{
* sd_1bit_uart_pins:sd_1bit_uart_pins{
* };
* sd_clk_cmd_uart_pins:sd_clk_cmd_uart_pins {
* };
* sd_1bit_uart_pins:sd_1bit_uart_pins {
* };
* sd_to_ao_jtag_pins:sd_to_ao_jtag_pins{
* };
*/
ao_to_sd_uart_pins:ao_to_sd_uart_pins {
mux {
groups = "uart_tx_ao_a_card4",
"uart_rx_ao_a_card5";
function = "uart_ao_a_card";
bias-pull-up;
input-enable;
};
ao_to_sd_uart_clr_pins:ao_to_sd_uart_clr_pins {
mux {
groups = "sdcard_d2",
"sdcard_d3";
function = "sdcard";
input-enable;
bias-pull-up;
};
};
sd_1bit_pins:sd_1bit_pins {
mux {
groups = "sdcard_d0",
"sdcard_cmd",
"sdcard_clk";
function = "sdcard";
input-enable;
bias-pull-up;
};
};
ao_to_sd_uart_pins:ao_to_sd_uart_pins {
mux {
groups = "uart_tx_ao_a_card4",
"uart_rx_ao_a_card5";
function = "uart_ao_a_card";
bias-pull-up;
input-enable;
};
};
emmc_clk_cmd_pins:emmc_clk_cmd_pins {
mux {

57
arch/arm64/boot/dts/amlogic/mesongxm.dtsi
View File

@@ -388,7 +388,7 @@
xtal_tick_en = <1>;
fifosize = < 64 >;
pinctrl-names = "default";
pinctrl-0 = <&ao_uart_pins>;
/*pinctrl-0 = <&ao_uart_pins>;*/
support-sysrq = <0>; /* 0 not support , 1 support */
};
@@ -638,6 +638,14 @@
};
};
sd_to_ao_uart_clr_pins:sd_to_ao_uart_clr_pins {
mux {
groups = "GPIOAO_0",
"GPIOAO_1";
function = "gpio_aobus";
};
};
sd_to_ao_uart_pins:sd_to_ao_uart_pins {
mux {
groups = "uart_tx_ao_a_0",
@@ -768,25 +776,44 @@
* sd_clk_cmd_pins:sd_clk_cmd_pins{
* };
* sd_all_pins:sd_all_pins {
* };
* sd_1bit_pins:sd_1bit_pins{
* };
* sd_clk_cmd_uart_pins:sd_clk_cmd_uart_pins {
* };
* sd_1bit_uart_pins:sd_1bit_uart_pins {
* };
* sd_1bit_uart_pins:sd_1bit_uart_pins{
* };
* sd_clk_cmd_uart_pins:sd_clk_cmd_uart_pins {
* };
* sd_to_ao_jtag_pins:sd_to_ao_jtag_pins{
* };
*/
ao_to_sd_uart_pins:ao_to_sd_uart_pins {
mux {
groups = "uart_tx_ao_a_card4",
"uart_rx_ao_a_card5";
function = "uart_ao_a_card";
bias-pull-up;
input-enable;
};
ao_to_sd_uart_clr_pins:ao_to_sd_uart_clr_pins {
mux {
groups = "sdcard_d2",
"sdcard_d3";
function = "sdcard";
input-enable;
bias-pull-up;
};
};
sd_1bit_pins:sd_1bit_pins {
mux {
groups = "sdcard_d0",
"sdcard_cmd",
"sdcard_clk";
function = "sdcard";
input-enable;
bias-pull-up;
};
};
ao_to_sd_uart_pins:ao_to_sd_uart_pins {
mux {
groups = "uart_tx_ao_a_card4",
"uart_rx_ao_a_card5";
function = "uart_ao_a_card";
bias-pull-up;
input-enable;
};
};
emmc_clk_cmd_pins:emmc_clk_cmd_pins {
mux {

501
drivers/amlogic/mmc/amlsd.c
View File

@@ -34,8 +34,10 @@
#include <linux/amlogic/sd.h>
#include <linux/amlogic/iomap.h>
#include <linux/amlogic/cpu_version.h>
#include <linux/amlogic/jtag.h>
#include <linux/highmem.h>
#include <linux/of.h>
#include <linux/arm-smccc.h>
#include <linux/pinctrl/consumer.h>
#include <linux/amlogic/amlsd.h>
#ifdef CONFIG_AMLOGIC_M8B_MMC
@@ -84,123 +86,6 @@ void aml_mmc_ver_msg_show(void)
}
}
static int aml_is_card_insert(struct amlsd_platform *pdata)
{
int ret = 0, in_count = 0, out_count = 0, i;
if (pdata->gpio_cd) {
mdelay(pdata->card_in_delay);
for (i = 0; i < 200; i++) {
ret = gpio_get_value(pdata->gpio_cd);
if (ret)
out_count++;
in_count++;
if ((out_count > 100) || (in_count > 100))
break;
}
if (out_count > 100)
ret = 1;
else if (in_count > 100)
ret = 0;
}
sdio_err("card %s\n", ret?"OUT":"IN");
if (!pdata->gpio_cd_level)
ret = !ret; /* reverse, so ---- 0: no inserted 1: inserted */
return ret;
}
#ifdef CONFIG_AMLOGIC_M8B_MMC
int aml_sd_uart_detect(struct amlsd_platform *pdata)
#else
int aml_sd_uart_detect(struct amlsd_host *host)
#endif
{
#ifdef CONFIG_AMLOGIC_M8B_MMC
struct mmc_host *mmc = pdata->mmc;
#else
struct amlsd_platform *pdata = host->pdata;
struct mmc_host *mmc = host->mmc;
#endif
if (aml_is_card_insert(pdata)) {
if (pdata->is_in)
return 1;
pdata->is_in = true;
pr_info("normal card in\n");
if (pdata->caps & MMC_CAP_4_BIT_DATA)
mmc->caps |= MMC_CAP_4_BIT_DATA;
} else {
if (!pdata->is_in)
return 1;
pdata->is_in = false;
pr_info("card out\n");
pdata->is_tuned = false;
if (mmc && mmc->card)
mmc_card_set_removed(mmc->card);
/* switch to 3.3V */
aml_sd_voltage_switch(mmc,
MMC_SIGNAL_VOLTAGE_330);
if (pdata->caps & MMC_CAP_4_BIT_DATA)
mmc->caps |= MMC_CAP_4_BIT_DATA;
}
return 0;
}
static int card_dealed;
irqreturn_t aml_irq_cd_thread(int irq, void *data)
{
#ifdef CONFIG_AMLOGIC_M8B_MMC
struct amlsd_platform *pdata = (struct amlsd_platform *)data;
struct mmc_host *mmc = pdata->mmc;
struct amlsd_host *host = pdata->host;
#else
struct amlsd_host *host = (struct amlsd_host *)data;
struct amlsd_platform *pdata = host->pdata;
struct mmc_host *mmc = host->mmc;
#endif
int ret = 0;
mutex_lock(&pdata->in_out_lock);
if (card_dealed == 1) {
card_dealed = 0;
mutex_unlock(&pdata->in_out_lock);
return IRQ_HANDLED;
}
#ifdef CONFIG_AMLOGIC_M8B_MMC
ret = aml_sd_uart_detect(pdata);
#else
ret = aml_sd_uart_detect(host);
#endif
if (ret == 1) {/* the same as the last*/
mutex_unlock(&pdata->in_out_lock);
return IRQ_HANDLED;
}
card_dealed = 1;
if ((pdata->is_in == 0) && aml_card_type_non_sdio(pdata))
host->init_flag = 0;
mutex_unlock(&pdata->in_out_lock);
/* mdelay(500); */
if (pdata->is_in)
mmc_detect_change(mmc, msecs_to_jiffies(100));
else
mmc_detect_change(mmc, msecs_to_jiffies(0));
card_dealed = 0;
return IRQ_HANDLED;
}
irqreturn_t aml_sd_irq_cd(int irq, void *dev_id)
{
/* pr_info("cd dev_id %x\n", (unsigned)dev_id); */
return IRQ_WAKE_THREAD;
}
static int aml_cmd_invalid(struct mmc_host *mmc, struct mmc_request *mrq)
{
#ifdef CONFIG_AMLOGIC_M8B_MMC
@@ -449,6 +334,22 @@ void sdio_reinit(void)
}
EXPORT_SYMBOL(sdio_reinit);
void of_amlsd_pwr_prepare(struct amlsd_platform *pdata)
{
}
void of_amlsd_pwr_on(struct amlsd_platform *pdata)
{
if (pdata->gpio_power)
gpio_set_value(pdata->gpio_power, pdata->power_level);
}
void of_amlsd_pwr_off(struct amlsd_platform *pdata)
{
if (pdata->gpio_power)
gpio_set_value(pdata->gpio_power, !pdata->power_level);
}
void of_amlsd_irq_init(struct amlsd_platform *pdata)
{
if (aml_card_type_non_sdio(pdata))
@@ -568,13 +469,22 @@ void of_amlsd_xfer_pre(struct mmc_host *mmc)
|| (strcmp(pdata->pinname, "sd"))
|| (mmc->caps & MMC_CAP_8_BIT_DATA))
aml_snprint(&p, &size, "%s_all_pins", pdata->pinname);
else {
if (pdata->is_sduart && (!strcmp(pdata->pinname, "sd")))
aml_snprint(&p, &size,
"%s_1bit_uart_pins",
pdata->pinname);
else
aml_snprint(&p, &size,
"%s_1bit_pins", pdata->pinname);
}
} else { /* MMC_CS_HIGH */
if (pdata->is_sduart && (!strcmp(pdata->pinname, "sd"))) {
aml_snprint(&p, &size,
"%s_clk_cmd_uart_pins", pdata->pinname);
"%s_clk_cmd_uart_pins", pdata->pinname);
} else {
aml_snprint(&p, &size,
"%s_clk_cmd_pins", pdata->pinname);
"%s_clk_cmd_pins", pdata->pinname);
}
}
@@ -663,11 +573,13 @@ void aml_cs_high(struct mmc_host *mmc) /* chip select high */
ret = gpio_direction_output(pdata->gpio_dat3, 1);
CHECK_RET(ret);
}
gpio_free(pdata->gpio_dat3);
}
}
void aml_cs_dont_care(struct mmc_host *mmc)
{
#if 0
#ifdef CONFIG_AMLOGIC_M8B_MMC
struct amlsd_platform *pdata = mmc_priv(mmc);
#else
@@ -679,22 +591,359 @@ void aml_cs_dont_care(struct mmc_host *mmc)
&& (pdata->gpio_dat3 != 0)
&& (gpio_get_value(pdata->gpio_dat3) >= 0))
gpio_free(pdata->gpio_dat3);
#endif
}
void of_amlsd_pwr_prepare(struct amlsd_platform *pdata)
static int aml_is_card_insert(struct amlsd_platform *pdata)
{
int ret = 0, in_count = 0, out_count = 0, i;
if (pdata->gpio_cd) {
mdelay(pdata->card_in_delay);
for (i = 0; i < 200; i++) {
ret = gpio_get_value(pdata->gpio_cd);
if (ret)
out_count++;
in_count++;
if ((out_count > 100) || (in_count > 100))
break;
}
if (out_count > 100)
ret = 1;
else if (in_count > 100)
ret = 0;
}
sdio_err("card %s\n", ret?"OUT":"IN");
if (!pdata->gpio_cd_level)
ret = !ret; /* reverse, so ---- 0: no inserted 1: inserted */
return ret;
}
void of_amlsd_pwr_on(struct amlsd_platform *pdata)
#ifdef CONFIG_AMLOGIC_M8B_MMC
static int aml_is_sdjtag(struct amlsd_platform *pdata)
#else
static int aml_is_sdjtag(struct amlsd_host *host)
#endif
{
if (pdata->gpio_power)
gpio_set_value(pdata->gpio_power, pdata->power_level);
int in = 0, i;
int high_cnt = 0, low_cnt = 0;
u32 vstat = 0;
struct sd_emmc_status *ista = (struct sd_emmc_status *)&vstat;
#ifdef CONFIG_AMLOGIC_M8B_MMC
struct amlsd_host *host = pdata->host;
#endif
for (i = 0; ; i++) {
mdelay(1);
vstat = readl(host->base + SD_EMMC_STATUS) & 0xffffffff;
if (ista->dat_i & 0x2) {
high_cnt++;
low_cnt = 0;
} else {
low_cnt++;
high_cnt = 0;
}
if ((high_cnt > 50) || (low_cnt > 50))
break;
}
if (low_cnt > 50)
in = 1;
return !in;
}
void of_amlsd_pwr_off(struct amlsd_platform *pdata)
#ifdef CONFIG_AMLOGIC_M8B_MMC
static int aml_is_sduart(struct amlsd_platform *pdata)
#else
static int aml_is_sduart(struct amlsd_host *host)
#endif
{
if (pdata->gpio_power)
gpio_set_value(pdata->gpio_power, !pdata->power_level);
#ifdef CONFIG_MESON_CPU_EMULATOR
return 0;
#else
int in = 0, i;
int high_cnt = 0, low_cnt = 0;
struct pinctrl *pc;
u32 vstat = 0;
struct sd_emmc_status *ista = (struct sd_emmc_status *)&vstat;
#ifdef CONFIG_AMLOGIC_M8B_MMC
struct amlsd_host *host = pdata->host;
#endif
mutex_lock(&host->pinmux_lock);
pc = aml_devm_pinctrl_get_select(host, "sd_to_ao_uart_pins");
mdelay(1);
for (i = 0; ; i++) {
mdelay(1);
vstat = readl(host->base + SD_EMMC_STATUS) & 0xffffffff;
if (ista->dat_i & 0x8) {
high_cnt++;
low_cnt = 0;
} else {
low_cnt++;
high_cnt = 0;
}
if ((high_cnt > 100) || (low_cnt > 100))
break;
}
if (low_cnt > 100)
in = 1;
mutex_unlock(&host->pinmux_lock);
return in;
#endif
}
/* int n=0; */
#ifdef CONFIG_AMLOGIC_M8B_MMC
static int aml_uart_switch(struct amlsd_platform *pdata, bool on)
#else
static int aml_uart_switch(struct amlsd_host *host, bool on)
#endif
{
struct pinctrl *pc;
char *name[2] = {
"sd_to_ao_uart_pins",
"ao_to_sd_uart_pins",
};
#ifdef CONFIG_AMLOGIC_M8B_MMC
struct amlsd_host *host = pdata->host;
#else
struct amlsd_platform *pdata = host->pdata;
#endif
pdata->is_sduart = on;
mutex_lock(&host->pinmux_lock);
pc = aml_devm_pinctrl_get_select(host, name[on]);
mutex_unlock(&host->pinmux_lock);
return on;
}
/* #endif */
/* clear detect information */
void aml_sd_uart_detect_clr(struct amlsd_platform *pdata)
{
pdata->is_sduart = 0;
pdata->is_in = 0;
}
/*
* setup jtag on/off, and setup ao/ee jtag
*
* @state: must be JTAG_STATE_ON/JTAG_STATE_OFF
* @select: mest be JTAG_DISABLE/JTAG_A53_AO/JTAG_A53_EE
*/
#ifdef CONFIG_ARM64
void jtag_set_state(unsigned int state, unsigned int select)
{
unsigned int command;
struct arm_smccc_res res;
if (state == AMLOGIC_JTAG_STATE_ON)
command = AMLOGIC_JTAG_ON;
else
command = AMLOGIC_JTAG_OFF;
asm __volatile__("" : : : "memory");
arm_smccc_smc(command, select, 0, 0, 0, 0, 0, 0, &res);
}
void jtag_select_ao(void)
{
set_cpus_allowed_ptr(current, cpumask_of(0));
jtag_set_state(AMLOGIC_JTAG_STATE_ON, AMLOGIC_JTAG_APAO);
set_cpus_allowed_ptr(current, cpu_all_mask);
}
void jtag_select_sd(void)
{
set_cpus_allowed_ptr(current, cpumask_of(0));
jtag_set_state(AMLOGIC_JTAG_STATE_ON, AMLOGIC_JTAG_APEE);
set_cpus_allowed_ptr(current, cpu_all_mask);
}
#endif
#ifdef CONFIG_AMLOGIC_M8B_MMC
static void aml_jtag_switch_sd(struct amlsd_platform *pdata)
#else
static void aml_jtag_switch_sd(struct amlsd_host *host)
#endif
{
struct pinctrl *pc;
int i;
#ifdef CONFIG_AMLOGIC_M8B_MMC
struct amlsd_host *host = pdata->host;
#endif
for (i = 0; i < 100; i++) {
mutex_lock(&host->pinmux_lock);
pc = aml_devm_pinctrl_get_select(host,
"ao_to_sd_jtag_pins");
mutex_unlock(&host->pinmux_lock);
if (!IS_ERR(pc))
break;
mdelay(1);
}
if (is_jtag_apee()) {
#ifdef CONFIG_ARM64
jtag_select_sd();
#endif
pr_info("setup apee\n");
}
}
#ifdef CONFIG_AMLOGIC_M8B_MMC
static void aml_jtag_switch_ao(struct amlsd_platform *pdata)
#else
static void aml_jtag_switch_ao(struct amlsd_host *host)
#endif
{
struct pinctrl *pc;
int i;
#ifdef CONFIG_AMLOGIC_M8B_MMC
struct amlsd_host *host = pdata->host;
#endif
for (i = 0; i < 100; i++) {
mutex_lock(&host->pinmux_lock);
pc = aml_devm_pinctrl_get_select(host,
"sd_to_ao_jtag_pins");
mutex_unlock(&host->pinmux_lock);
if (!IS_ERR(pc))
break;
mdelay(1);
}
}
#ifdef CONFIG_AMLOGIC_M8B_MMC
int aml_sd_uart_detect(struct amlsd_platform *pdata)
#else
int aml_sd_uart_detect(struct amlsd_host *host)
#endif
{
static bool is_jtag;
#ifdef CONFIG_AMLOGIC_M8B_MMC
struct mmc_host *mmc = pdata->mmc;
#else
struct amlsd_platform *pdata = host->pdata;
struct mmc_host *mmc = host->mmc;
#endif
if (aml_is_card_insert(pdata)) {
if (pdata->is_in)
return 1;
pdata->is_in = true;
#ifdef CONFIG_AMLOGIC_M8B_MMC
if (aml_is_sduart(pdata)) {
aml_uart_switch(pdata, 1);
#else
if (aml_is_sduart(host)) {
aml_uart_switch(host, 1);
#endif
pr_info("Uart in\n");
mmc->caps &= ~MMC_CAP_4_BIT_DATA;
#ifdef CONFIG_AMLOGIC_M8B_MMC
if (aml_is_sdjtag(pdata)) {
aml_jtag_switch_sd(pdata);
#else
if (aml_is_sdjtag(host)) {
aml_jtag_switch_sd(host);
#endif
is_jtag = true;
pdata->is_in = false;
pr_info("JTAG in\n");
return 0;
}
} else {
pr_info("normal card in\n");
#ifdef CONFIG_AMLOGIC_M8B_MMC
aml_uart_switch(pdata, 0);
aml_jtag_switch_ao(pdata);
#else
aml_uart_switch(host, 0);
aml_jtag_switch_ao(host);
#endif
if (pdata->caps & MMC_CAP_4_BIT_DATA)
mmc->caps |= MMC_CAP_4_BIT_DATA;
}
} else {
if ((!pdata->is_in) && (pdata->is_sduart == false))
return 1;
pdata->is_in = false;
if (is_jtag) {
is_jtag = false;
pr_info("JTAG OUT\n");
} else
pr_info("card out\n");
pdata->is_tuned = false;
if (mmc && mmc->card)
mmc_card_set_removed(mmc->card);
#ifdef CONFIG_AMLOGIC_M8B_MMC
aml_uart_switch(pdata, 0);
aml_jtag_switch_ao(pdata);
#else
aml_uart_switch(host, 0);
aml_jtag_switch_ao(host);
#endif
/* switch to 3.3V */
aml_sd_voltage_switch(mmc,
MMC_SIGNAL_VOLTAGE_330);
if (pdata->caps & MMC_CAP_4_BIT_DATA)
mmc->caps |= MMC_CAP_4_BIT_DATA;
}
return 0;
}
static int card_dealed;
irqreturn_t aml_irq_cd_thread(int irq, void *data)
{
#ifdef CONFIG_AMLOGIC_M8B_MMC
struct amlsd_platform *pdata = (struct amlsd_platform *)data;
struct mmc_host *mmc = pdata->mmc;
struct amlsd_host *host = pdata->host;
#else
struct amlsd_host *host = (struct amlsd_host *)data;
struct amlsd_platform *pdata = host->pdata;
struct mmc_host *mmc = host->mmc;
#endif
int ret = 0;
mutex_lock(&pdata->in_out_lock);
if (card_dealed == 1) {
card_dealed = 0;
mutex_unlock(&pdata->in_out_lock);
return IRQ_HANDLED;
}
#ifdef CONFIG_AMLOGIC_M8B_MMC
ret = aml_sd_uart_detect(pdata);
#else
ret = aml_sd_uart_detect(host);
#endif
if (ret == 1) {/* the same as the last*/
mutex_unlock(&pdata->in_out_lock);
return IRQ_HANDLED;
}
card_dealed = 1;
if ((pdata->is_in == 0) && aml_card_type_non_sdio(pdata))
host->init_flag = 0;
mutex_unlock(&pdata->in_out_lock);
/* mdelay(500); */
if (pdata->is_in)
mmc_detect_change(mmc, msecs_to_jiffies(100));
else
mmc_detect_change(mmc, msecs_to_jiffies(0));
card_dealed = 0;
return IRQ_HANDLED;
}
irqreturn_t aml_sd_irq_cd(int irq, void *dev_id)
{
/* pr_info("cd dev_id %x\n", (unsigned)dev_id); */
return IRQ_WAKE_THREAD;
}
#ifdef CONFIG_AMLOGIC_M8B_MMC