usb: host: tegra: Fix a possible int storm on resume from lp0

usbcore will reenable usb interrupts later once the bus has been
resumed.

Change-Id: If78088bc86710f50293d84234d764655f4bba979
Signed-off-by: Benoit Goby <benoit@android.com>
This commit is contained in:
Benoit Goby
2011-01-04 17:40:30 -08:00
parent b4c92f36c0
commit f2e67ec3c3

View File

@@ -35,7 +35,6 @@
struct tegra_ehci_context {
bool valid;
u32 command;
u32 intr_enable;
u32 frame_list;
u32 async_next;
u32 txfilltunning;
@@ -215,9 +214,6 @@ static void tegra_ehci_restart(struct usb_hcd *hcd)
/* flush posted writes */
ehci_readl(ehci, &ehci->regs->command);
up_write(&ehci_cf_port_reset_rwsem);
/* Turn On Interrupts */
ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable);
}
static int tegra_usb_suspend(struct usb_hcd *hcd)
@@ -237,7 +233,6 @@ static int tegra_usb_suspend(struct usb_hcd *hcd)
context->valid = false;
} else {
context->command = readl(&hw->command);
context->intr_enable = readl(&hw->intr_enable);
context->frame_list = readl(&hw->frame_list);
context->async_next = readl(&hw->async_next);
context->txfilltunning = readl(&hw->reserved[2]);
@@ -333,10 +328,6 @@ static int tegra_usb_resume(struct usb_hcd *hcd)
}
}
/* Restore interrupt register */
writel(context->intr_enable, &hw->intr_enable);
udelay(10);
return 0;
restart: