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arm64: dts: rockchip: rk3588-vehicle-evb-maxim-max9671(/2)2-d(c)phy0(/3).dtsi: support i2c-mux
Signed-off-by: Cai Wenzhong <cwz@rock-chips.com> Change-Id: I56f1d8722f956c627b0a12576b8470717e67e0ad
This commit is contained in:
Cai Wenzhong
@@ -35,17 +35,25 @@
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vin-supply = <&vcc_3v3_s3>;
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};
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max96712_dcphy0_poc: max96712-dcphy0-poc {
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max96712_dcphy0_pwdn_regulator: max96712-dcphy0-pwdn-regulator {
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compatible = "regulator-fixed";
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regulator-name = "max96712_dcphy0_pwdn";
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gpio = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&max96712_dcphy0_pwdn>;
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enable-active-high;
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startup-delay-us = <10000>;
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off-on-delay-us = <5000>;
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vin-supply = <&max96712_dcphy0_vcc1v8>;
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};
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max96712_dcphy0_poc_regulator: max96712-dcphy0-poc-regulator {
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compatible = "regulator-fixed";
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regulator-name = "max96712_dcphy0_poc";
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regulator-boot-on;
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regulator-always-on;
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regulator-min-microvolt = <12000000>;
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regulator-max-microvolt = <12000000>;
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enable-active-high;
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gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
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startup-delay-us = <1050>;
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off-on-delay-us = <515000>;
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enable-active-high;
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startup-delay-us = <10000>;
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off-on-delay-us = <5000>;
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vin-supply = <&vcc12v_dcin>;
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};
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};
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@@ -96,14 +104,13 @@
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clock-names = "xvclk";
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clocks = <&max96712_dcphy0_osc 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&max96712_dcphy0_pwdn>, <&max96712_dcphy0_errb>, <&max96712_dcphy0_lock>;
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pinctrl-0 = <&max96712_dcphy0_errb>, <&max96712_dcphy0_lock>;
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power-domains = <&power RK3588_PD_VI>;
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rockchip,grf = <&sys_grf>;
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pwdn-gpios = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
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lock-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
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vcc1v2-supply = <&max96712_dcphy0_vcc1v2>;
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vcc1v8-supply = <&max96712_dcphy0_vcc1v8>;
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poc-supply = <&max96712_dcphy0_poc>;
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pwdn-supply = <&max96712_dcphy0_pwdn_regulator>;
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lock-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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@@ -152,11 +159,7 @@
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link-rx-rate = <0>;
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link-tx-rate = <0>;
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port {
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max96712_dcphy0_link0_in: endpoint {
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remote-endpoint = <&max96712_dcphy0_remote0_out>;
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};
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};
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link-remote-cam = <&max96712_dcphy0_cam0>; // remote camera
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link-init-sequence {
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seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
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@@ -183,11 +186,7 @@
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link-rx-rate = <0>;
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link-tx-rate = <0>;
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port {
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max96712_dcphy0_link1_in: endpoint {
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remote-endpoint = <&max96712_dcphy0_remote1_out>;
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};
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};
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link-remote-cam = <&max96712_dcphy0_cam1>; // remote camera
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link-init-sequence {
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seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
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@@ -214,11 +213,7 @@
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link-rx-rate = <0>;
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link-tx-rate = <0>;
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port {
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max96712_dcphy0_link2_in: endpoint {
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remote-endpoint = <&max96712_dcphy0_remote2_out>;
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};
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};
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link-remote-cam = <&max96712_dcphy0_cam2>; // remote camera
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link-init-sequence {
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seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
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@@ -245,11 +240,7 @@
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link-rx-rate = <0>;
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link-tx-rate = <0>;
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port {
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max96712_dcphy0_link3_in: endpoint {
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remote-endpoint = <&max96712_dcphy0_remote3_out>;
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};
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};
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link-remote-cam = <&max96712_dcphy0_cam3>; // remote camera
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link-init-sequence {
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seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
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@@ -457,199 +448,296 @@
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};
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/* serdes local device end */
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/* serdes remote device start */
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serdes-remote-device-0 {
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compatible = "maxim4c,link0,max96715";
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status = "okay";
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/* i2c-mux start */
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i2c-mux {
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#address-cells = <1>;
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#size-cells = <0>;
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remote-id = <0>; // Same as Link ID: 0/1/2/3
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i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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// Serializer i2c 7bit address remap
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ser-i2c-addr-def = <0x40>;
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ser-i2c-addr-map = <0x41>; // 0: disable remap
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// Note: Serializer node defined before camera node
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max96712_dcphy0_ser0: max96715@41 {
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compatible = "maxim,ser,max96715";
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reg = <0x41>;
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port {
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max96712_dcphy0_remote0_out: endpoint {
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remote-endpoint = <&max96712_dcphy0_link0_in>;
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ser-i2c-addr-def = <0x40>;
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ser-init-sequence {
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seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
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reg-addr-len = <1>; // 1: 8bits, 2: 16bits
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reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
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// reg_addr reg_val val_mask delay
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init-sequence = [
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07 84 00 00
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67 c4 00 00
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0F bf 00 00
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3F 08 00 00
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40 2d 00 00
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20 10 00 00
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21 11 00 00
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22 12 00 00
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23 13 00 00
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24 14 00 00
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25 15 00 00
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26 16 00 00
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27 17 00 00
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30 00 00 00
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31 01 00 00
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32 02 00 00
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33 03 00 00
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34 04 00 00
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35 05 00 00
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36 06 00 00
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37 07 00 00
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];
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};
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};
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max96712_dcphy0_cam0: ox01f10@31 {
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compatible = "maxim,ovti,ox01f10";
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reg = <0x31>;
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cam-i2c-addr-def = <0x36>;
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cam-remote-ser = <&max96712_dcphy0_ser0>; // remote serializer
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poc-supply = <&max96712_dcphy0_poc_regulator>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "ox01f10";
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rockchip,camera-module-lens-name = "ox01f10";
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/* port config start */
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port {
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max96712_dcphy0_cam0_out: endpoint {
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/* remote endpoint: rkcif_mipi_lvds_sditf */
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//remote-endpoint = <&mipi_lvds_sditf_in>;
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data-lanes = <1 2 3 4>;
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};
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};
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/* port config end */
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};
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};
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remote-init-sequence {
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seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
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reg-addr-len = <1>; // 1: 8bits, 2: 16bits
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reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
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i2c@1 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <1>;
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// reg_addr reg_val val_mask delay
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init-sequence = [
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07 84 00 00
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67 c4 00 00
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0F bf 00 00
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3F 08 00 00
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40 2d 00 00
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20 10 00 00
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21 11 00 00
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22 12 00 00
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23 13 00 00
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24 14 00 00
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25 15 00 00
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26 16 00 00
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27 17 00 00
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30 00 00 00
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31 01 00 00
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32 02 00 00
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33 03 00 00
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34 04 00 00
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35 05 00 00
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36 06 00 00
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37 07 00 00
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];
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};
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};
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// Note: Serializer node defined before camera node
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max96712_dcphy0_ser1: max96715@41 {
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compatible = "maxim,ser,max96715";
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reg = <0x41>;
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serdes-remote-device-1 {
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compatible = "maxim4c,link1,max96715";
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status = "okay";
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ser-i2c-addr-def = <0x40>;
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remote-id = <1>; // Same as Link ID: 0/1/2/3
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ser-init-sequence {
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seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
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reg-addr-len = <1>; // 1: 8bits, 2: 16bits
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reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
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// Serializer i2c 7bit address remap
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ser-i2c-addr-def = <0x40>;
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ser-i2c-addr-map = <0x42>; // 0: disable remap
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// reg_addr reg_val val_mask delay
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init-sequence = [
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07 84 00 00
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67 c4 00 00
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0F bf 00 00
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3F 08 00 00
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40 2d 00 00
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20 10 00 00
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21 11 00 00
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22 12 00 00
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23 13 00 00
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24 14 00 00
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25 15 00 00
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26 16 00 00
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27 17 00 00
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30 00 00 00
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31 01 00 00
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32 02 00 00
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33 03 00 00
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34 04 00 00
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35 05 00 00
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36 06 00 00
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37 07 00 00
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];
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};
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};
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port {
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max96712_dcphy0_remote1_out: endpoint {
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remote-endpoint = <&max96712_dcphy0_link1_in>;
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max96712_dcphy0_cam1: ox01f10@32 {
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compatible = "maxim,ovti,ox01f10";
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reg = <0x32>;
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cam-i2c-addr-def = <0x36>;
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cam-remote-ser = <&max96712_dcphy0_ser1>; // remote serializer
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poc-supply = <&max96712_dcphy0_poc_regulator>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "ox01f10";
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rockchip,camera-module-lens-name = "ox01f10";
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/* port config start */
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port {
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max96712_dcphy0_cam1_out: endpoint {
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/* remote endpoint: rkcif_mipi_lvds_sditf_vir1 */
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//remote-endpoint = <&mipi_lvds_sditf_vir1_in>;
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data-lanes = <1 2 3 4>;
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};
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};
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/* port config end */
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};
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};
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remote-init-sequence {
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seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
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reg-addr-len = <1>; // 1: 8bits, 2: 16bits
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reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
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i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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// reg_addr reg_val val_mask delay
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init-sequence = [
|
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07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
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};
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// Note: Serializer node defined before camera node
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max96712_dcphy0_ser2: max96715@43 {
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compatible = "maxim,ser,max96715";
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reg = <0x43>;
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serdes-remote-device-2 {
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compatible = "maxim4c,link2,max96715";
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status = "okay";
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ser-i2c-addr-def = <0x40>;
|
||||
|
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remote-id = <2>; // Same as Link ID: 0/1/2/3
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ser-init-sequence {
|
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seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
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// Serializer i2c 7bit address remap
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
ser-i2c-addr-map = <0x43>; // 0: disable remap
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
port {
|
||||
max96712_dcphy0_remote2_out: endpoint {
|
||||
remote-endpoint = <&max96712_dcphy0_link2_in>;
|
||||
max96712_dcphy0_cam2: ox01f10@33 {
|
||||
compatible = "maxim,ovti,ox01f10";
|
||||
reg = <0x33>;
|
||||
|
||||
cam-i2c-addr-def = <0x36>;
|
||||
|
||||
cam-remote-ser = <&max96712_dcphy0_ser2>; // remote serializer
|
||||
|
||||
poc-supply = <&max96712_dcphy0_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <2>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "ox01f10";
|
||||
rockchip,camera-module-lens-name = "ox01f10";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96712_dcphy0_cam2_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf_vir2 */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_vir2_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
|
||||
remote-init-sequence {
|
||||
seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
i2c@3 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <3>;
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
// Note: Serializer node defined before camera node
|
||||
max96712_dcphy0_ser3: max96715@44 {
|
||||
compatible = "maxim,ser,max96715";
|
||||
reg = <0x44>;
|
||||
|
||||
serdes-remote-device-3 {
|
||||
compatible = "maxim4c,link3,max96715";
|
||||
status = "okay";
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
|
||||
remote-id = <3>; // Same as Link ID: 0/1/2/3
|
||||
ser-init-sequence {
|
||||
seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// Serializer i2c 7bit address remap
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
ser-i2c-addr-map = <0x44>; // 0: disable remap
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
port {
|
||||
max96712_dcphy0_remote3_out: endpoint {
|
||||
remote-endpoint = <&max96712_dcphy0_link3_in>;
|
||||
max96712_dcphy0_cam3: ox01f10@34 {
|
||||
compatible = "maxim,ovti,ox01f10";
|
||||
reg = <0x34>;
|
||||
|
||||
cam-i2c-addr-def = <0x36>;
|
||||
|
||||
cam-remote-ser = <&max96712_dcphy0_ser3>; // remote serializer
|
||||
|
||||
poc-supply = <&max96712_dcphy0_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <3>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "ox01f10";
|
||||
rockchip,camera-module-lens-name = "ox01f10";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96712_dcphy0_cam3_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf_vir3 */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_vir3_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
|
||||
remote-init-sequence {
|
||||
seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
/* serdes remote device end */
|
||||
/* i2c-mux end */
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -35,17 +35,25 @@
|
||||
vin-supply = <&vcc_3v3_s3>;
|
||||
};
|
||||
|
||||
max96712_dcphy1_poc: max96712-dcphy1-poc {
|
||||
max96712_dcphy1_pwdn_regulator: max96712-dcphy1-pwdn-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "max96712_dcphy1_pwdn";
|
||||
gpio = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&max96712_dcphy1_pwdn>;
|
||||
enable-active-high;
|
||||
startup-delay-us = <10000>;
|
||||
off-on-delay-us = <5000>;
|
||||
vin-supply = <&max96712_dcphy1_vcc1v8>;
|
||||
};
|
||||
|
||||
max96712_dcphy1_poc_regulator: max96712-dcphy1-poc-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "max96712_dcphy1_poc";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio3 RK_PA7 GPIO_ACTIVE_HIGH>;
|
||||
startup-delay-us = <1050>;
|
||||
off-on-delay-us = <515000>;
|
||||
enable-active-high;
|
||||
startup-delay-us = <10000>;
|
||||
off-on-delay-us = <5000>;
|
||||
vin-supply = <&vcc12v_dcin>;
|
||||
};
|
||||
};
|
||||
@@ -96,14 +104,13 @@
|
||||
clock-names = "xvclk";
|
||||
clocks = <&max96712_dcphy1_osc 0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&max96712_dcphy1_pwdn>, <&max96712_dcphy1_errb>, <&max96712_dcphy1_lock>;
|
||||
pinctrl-0 = <&max96712_dcphy1_errb>, <&max96712_dcphy1_lock>;
|
||||
power-domains = <&power RK3588_PD_VI>;
|
||||
rockchip,grf = <&sys_grf>;
|
||||
pwdn-gpios = <&gpio4 RK_PD1 GPIO_ACTIVE_HIGH>;
|
||||
lock-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
|
||||
vcc1v2-supply = <&max96712_dcphy1_vcc1v2>;
|
||||
vcc1v8-supply = <&max96712_dcphy1_vcc1v8>;
|
||||
poc-supply = <&max96712_dcphy1_poc>;
|
||||
pwdn-supply = <&max96712_dcphy1_pwdn_regulator>;
|
||||
lock-gpios = <&gpio4 RK_PD3 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
@@ -152,11 +159,7 @@
|
||||
link-rx-rate = <0>;
|
||||
link-tx-rate = <0>;
|
||||
|
||||
port {
|
||||
max96712_dcphy1_link0_in: endpoint {
|
||||
remote-endpoint = <&max96712_dcphy1_remote0_out>;
|
||||
};
|
||||
};
|
||||
link-remote-cam = <&max96712_dcphy1_cam0>; // remote camera
|
||||
|
||||
link-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
@@ -180,11 +183,7 @@
|
||||
link-rx-rate = <0>;
|
||||
link-tx-rate = <0>;
|
||||
|
||||
port {
|
||||
max96712_dcphy1_link1_in: endpoint {
|
||||
remote-endpoint = <&max96712_dcphy1_remote1_out>;
|
||||
};
|
||||
};
|
||||
link-remote-cam = <&max96712_dcphy1_cam1>; // remote camera
|
||||
|
||||
link-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
@@ -335,91 +334,142 @@
|
||||
};
|
||||
/* serdes local device end */
|
||||
|
||||
/* serdes remote device start */
|
||||
serdes-remote-device-0 {
|
||||
compatible = "maxim4c,link0,max9295";
|
||||
status = "okay";
|
||||
/* i2c-mux start */
|
||||
i2c-mux {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
remote-id = <0>; // Same as Link ID: 0/1/2/3
|
||||
i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
// Serializer i2c 7bit address remap
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
ser-i2c-addr-map = <0x41>; // 0: disable remap
|
||||
// Note: Serializer node defined before camera node
|
||||
max96712_dcphy1_ser0: max9295@41 {
|
||||
compatible = "maxim,ser,max9295";
|
||||
reg = <0x41>;
|
||||
|
||||
port {
|
||||
max96712_dcphy1_remote0_out: endpoint {
|
||||
remote-endpoint = <&max96712_dcphy1_link0_in>;
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
|
||||
ser-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
00 01 04 00 00 // RX_RATE: 187.5Mbps, TX_RATE: 3Gbps
|
||||
00 11 03 00 00 // Coax Drive
|
||||
02 D6 03 00 00 // MFP8: GPIO_OUT_DIS = 1, GPIO_TX_EN = 1
|
||||
03 F0 51 00 00 // RCLK: 27MHz/24MHz (ALT),Enable reference-generation PLL, Enable pre-defined clock setting for reference-generation PLL
|
||||
00 03 07 00 00 // RCLK: Enable RCLK output from altermative MFP pin, RCLKOUT clock select reference PLL
|
||||
00 06 b1 00 00 // RCLK: GMSL2, Enable RCLK output, i2c selected
|
||||
02 C1 10 00 00 // MFP1: GPIO_OUT pin output is driven to 1 when GPIO_RX_EN = 0
|
||||
02 C2 60 00 00 // MFP1: OUT_TYPE = 1: Push-pull, PULL_UPDN_SEL[1:0] = 0b01: Pullup
|
||||
00 07 07 00 00 // Enable Parallel video input, Parallel HS and VS Enable
|
||||
00 10 05 00 00 // AUTO_LINK = 0, LINK_CFG = 1: LinkA is selected, REG_ENABLE = 1: Regulator enabled
|
||||
00 12 14 00 00 // REG_MNL = 1: Enable LDO on/off state controlled by REG_ENABLE
|
||||
01 00 62 00 00 // Video X, Line CRC enabled, ENC_MODE = 2: HS, VS, DE encoding on, color bits sent only when DE is high
|
||||
01 01 50 00 00 // Video X, BPP = 0x10
|
||||
00 53 10 00 00 // Video X, TX_STR_SEL = 0: Stream ID = 0 for packets from this channel
|
||||
00 02 13 00 00 // Video transmit enable for Port X
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
max96712_dcphy1_cam0: ov2311@31 {
|
||||
compatible = "maxim,ovti,ov2311";
|
||||
reg = <0x31>;
|
||||
|
||||
cam-i2c-addr-def = <0x30>;
|
||||
|
||||
cam-remote-ser = <&max96712_dcphy1_ser0>; // remote serializer
|
||||
|
||||
poc-supply = <&max96712_dcphy1_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "ov2311";
|
||||
rockchip,camera-module-lens-name = "ov2311";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96712_dcphy1_cam0_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
|
||||
remote-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
00 01 04 00 00 // RX_RATE: 187.5Mbps, TX_RATE: 3Gbps
|
||||
00 11 03 00 00 // Coax Drive
|
||||
02 D6 03 00 00 // MFP8: GPIO_OUT_DIS = 1, GPIO_TX_EN = 1
|
||||
03 F0 51 00 00 // RCLK: 27MHz/24MHz (ALT),Enable reference-generation PLL, Enable pre-defined clock setting for reference-generation PLL
|
||||
00 03 07 00 00 // RCLK: Enable RCLK output from altermative MFP pin, RCLKOUT clock select reference PLL
|
||||
00 06 b1 00 00 // RCLK: GMSL2, Enable RCLK output, i2c selected
|
||||
02 C1 10 00 00 // MFP1: GPIO_OUT pin output is driven to 1 when GPIO_RX_EN = 0
|
||||
02 C2 60 00 00 // MFP1: OUT_TYPE = 1: Push-pull, PULL_UPDN_SEL[1:0] = 0b01: Pullup
|
||||
00 07 07 00 00 // Enable Parallel video input, Parallel HS and VS Enable
|
||||
00 10 05 00 00 // AUTO_LINK = 0, LINK_CFG = 1: LinkA is selected, REG_ENABLE = 1: Regulator enabled
|
||||
00 12 14 00 00 // REG_MNL = 1: Enable LDO on/off state controlled by REG_ENABLE
|
||||
01 00 62 00 00 // Video X, Line CRC enabled, ENC_MODE = 2: HS, VS, DE encoding on, color bits sent only when DE is high
|
||||
01 01 50 00 00 // Video X, BPP = 0x10
|
||||
00 53 10 00 00 // Video X, TX_STR_SEL = 0: Stream ID = 0 for packets from this channel
|
||||
00 02 13 00 00 // Video transmit enable for Port X
|
||||
];
|
||||
};
|
||||
};
|
||||
// Note: Serializer node defined before camera node
|
||||
max96712_dcphy1_ser1: max9295@42 {
|
||||
compatible = "maxim,ser,max9295";
|
||||
reg = <0x42>;
|
||||
|
||||
serdes-remote-device-1 {
|
||||
compatible = "maxim4c,link1,max9295";
|
||||
status = "okay";
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
|
||||
remote-id = <1>; // Same as Link ID: 0/1/2/3
|
||||
ser-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// Serializer i2c 7bit address remap
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
ser-i2c-addr-map = <0x42>; // 0: disable remap
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
00 01 04 00 00 // RX_RATE: 187.5Mbps, TX_RATE: 3Gbps
|
||||
00 11 03 00 00 // Coax Drive
|
||||
02 D6 03 00 00 // MFP8: GPIO_OUT_DIS = 1, GPIO_TX_EN = 1
|
||||
03 F0 51 00 00 // RCLK: 27MHz/24MHz (ALT),Enable reference-generation PLL, Enable pre-defined clock setting for reference-generation PLL
|
||||
00 03 07 00 00 // RCLK: Enable RCLK output from altermative MFP pin, RCLKOUT clock select reference PLL
|
||||
00 06 b1 00 00 // RCLK: GMSL2, Enable RCLK output, i2c selected
|
||||
02 C1 10 00 00 // MFP1: GPIO_OUT pin output is driven to 1 when GPIO_RX_EN = 0
|
||||
02 C2 60 00 00 // MFP1: OUT_TYPE = 1: Push-pull, PULL_UPDN_SEL[1:0] = 0b01: Pullup
|
||||
00 07 07 00 00 // Enable Parallel video input, Parallel HS and VS Enable
|
||||
00 10 05 00 00 // AUTO_LINK = 0, LINK_CFG = 1: LinkA is selected, REG_ENABLE = 1: Regulator enabled
|
||||
00 12 14 00 00 // REG_MNL = 1: Enable LDO on/off state controlled by REG_ENABLE
|
||||
01 00 62 00 00 // Video X, Line CRC enabled, ENC_MODE = 2: HS, VS, DE encoding on, color bits sent only when DE is high
|
||||
01 01 50 00 00 // Video X, BPP = 0x10
|
||||
00 53 10 00 00 // Video X, TX_STR_SEL = 0: Stream ID = 0 for packets from this channel
|
||||
00 02 13 00 00 // Video transmit enable for Port X
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
port {
|
||||
max96712_dcphy1_remote1_out: endpoint {
|
||||
remote-endpoint = <&max96712_dcphy1_link1_in>;
|
||||
max96712_dcphy1_cam1: ov2312@32 {
|
||||
compatible = "maxim,ovti,ov2312";
|
||||
reg = <0x32>;
|
||||
|
||||
cam-i2c-addr-def = <0x30>;
|
||||
|
||||
cam-remote-ser = <&max96712_dcphy1_ser1>; // remote serializer
|
||||
|
||||
poc-supply = <&max96712_dcphy1_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <1>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "ov2312";
|
||||
rockchip,camera-module-lens-name = "ov2312";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96712_dcphy1_cam1_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf_vir1 */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_vir1_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
|
||||
remote-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
00 01 04 00 00 // RX_RATE: 187.5Mbps, TX_RATE: 3Gbps
|
||||
00 11 03 00 00 // Coax Drive
|
||||
02 D6 03 00 00 // MFP8: GPIO_OUT_DIS = 1, GPIO_TX_EN = 1
|
||||
03 F0 51 00 00 // RCLK: 27MHz/24MHz (ALT),Enable reference-generation PLL, Enable pre-defined clock setting for reference-generation PLL
|
||||
00 03 07 00 00 // RCLK: Enable RCLK output from altermative MFP pin, RCLKOUT clock select reference PLL
|
||||
00 06 b1 00 00 // RCLK: GMSL2, Enable RCLK output, i2c selected
|
||||
02 C1 10 00 00 // MFP1: GPIO_OUT pin output is driven to 1 when GPIO_RX_EN = 0
|
||||
02 C2 60 00 00 // MFP1: OUT_TYPE = 1: Push-pull, PULL_UPDN_SEL[1:0] = 0b01: Pullup
|
||||
00 07 07 00 00 // Enable Parallel video input, Parallel HS and VS Enable
|
||||
00 10 05 00 00 // AUTO_LINK = 0, LINK_CFG = 1: LinkA is selected, REG_ENABLE = 1: Regulator enabled
|
||||
00 12 14 00 00 // REG_MNL = 1: Enable LDO on/off state controlled by REG_ENABLE
|
||||
01 00 62 00 00 // Video X, Line CRC enabled, ENC_MODE = 2: HS, VS, DE encoding on, color bits sent only when DE is high
|
||||
01 01 50 00 00 // Video X, BPP = 0x10
|
||||
00 53 10 00 00 // Video X, TX_STR_SEL = 0: Stream ID = 0 for packets from this channel
|
||||
00 02 13 00 00 // Video transmit enable for Port X
|
||||
];
|
||||
};
|
||||
};
|
||||
/* serdes remote device end */
|
||||
/* i2c-mux end */
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -35,17 +35,25 @@
|
||||
vin-supply = <&vcc_3v3_s3>;
|
||||
};
|
||||
|
||||
max96712_dphy0_poc: max96712-dphy0-poc {
|
||||
max96712_dphy0_pwdn_regulator: max96712-dphy0-pwdn-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "max96712_dphy0_pwdn";
|
||||
gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&max96712_dphy0_pwdn>;
|
||||
enable-active-high;
|
||||
startup-delay-us = <10000>;
|
||||
off-on-delay-us = <5000>;
|
||||
vin-supply = <&max96712_dphy0_vcc1v8>;
|
||||
};
|
||||
|
||||
max96712_dphy0_poc_regulator: max96712-dphy0-poc-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "max96712_dphy0_poc";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
|
||||
startup-delay-us = <1050>;
|
||||
off-on-delay-us = <515000>;
|
||||
enable-active-high;
|
||||
startup-delay-us = <10000>;
|
||||
off-on-delay-us = <5000>;
|
||||
vin-supply = <&vcc12v_dcin>;
|
||||
};
|
||||
};
|
||||
@@ -96,14 +104,13 @@
|
||||
clock-names = "xvclk";
|
||||
clocks = <&max96712_dphy0_osc0 0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&max96712_dphy0_pwdn>, <&max96712_dphy0_errb>, <&max96712_dphy0_lock>;
|
||||
pinctrl-0 = <&max96712_dphy0_errb>, <&max96712_dphy0_lock>;
|
||||
power-domains = <&power RK3588_PD_VI>;
|
||||
rockchip,grf = <&sys_grf>;
|
||||
pwdn-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
lock-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||||
vcc1v2-supply = <&max96712_dphy0_vcc1v2>;
|
||||
vcc1v8-supply = <&max96712_dphy0_vcc1v8>;
|
||||
poc-supply = <&max96712_dphy0_poc>;
|
||||
pwdn-supply = <&max96712_dphy0_pwdn_regulator>;
|
||||
lock-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
@@ -152,11 +159,7 @@
|
||||
link-rx-rate = <0>;
|
||||
link-tx-rate = <0>;
|
||||
|
||||
port {
|
||||
max96712_dphy0_link0_in: endpoint {
|
||||
remote-endpoint = <&max96712_dphy0_remote0_out>;
|
||||
};
|
||||
};
|
||||
link-remote-cam = <&max96712_dphy0_cam0>; // remote camera
|
||||
|
||||
link-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
@@ -183,11 +186,7 @@
|
||||
link-rx-rate = <0>;
|
||||
link-tx-rate = <0>;
|
||||
|
||||
port {
|
||||
max96712_dphy0_link1_in: endpoint {
|
||||
remote-endpoint = <&max96712_dphy0_remote1_out>;
|
||||
};
|
||||
};
|
||||
link-remote-cam = <&max96712_dphy0_cam1>; // remote camera
|
||||
|
||||
link-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
@@ -214,11 +213,7 @@
|
||||
link-rx-rate = <0>;
|
||||
link-tx-rate = <0>;
|
||||
|
||||
port {
|
||||
max96712_dphy0_link2_in: endpoint {
|
||||
remote-endpoint = <&max96712_dphy0_remote2_out>;
|
||||
};
|
||||
};
|
||||
link-remote-cam = <&max96712_dphy0_cam2>; // remote camera
|
||||
|
||||
link-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
@@ -245,11 +240,7 @@
|
||||
link-rx-rate = <0>;
|
||||
link-tx-rate = <0>;
|
||||
|
||||
port {
|
||||
max96712_dphy0_link3_in: endpoint {
|
||||
remote-endpoint = <&max96712_dphy0_remote3_out>;
|
||||
};
|
||||
};
|
||||
link-remote-cam = <&max96712_dphy0_cam3>; // remote camera
|
||||
|
||||
link-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
@@ -469,199 +460,296 @@
|
||||
};
|
||||
/* serdes local device end */
|
||||
|
||||
/* serdes remote device start */
|
||||
serdes-remote-device-0 {
|
||||
compatible = "maxim4c,link0,max96715";
|
||||
status = "okay";
|
||||
/* i2c-mux start */
|
||||
i2c-mux {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
remote-id = <0>; // Same as Link ID: 0/1/2/3
|
||||
i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
// Serializer i2c 7bit address remap
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
ser-i2c-addr-map = <0x41>; // 0: disable remap
|
||||
// Note: Serializer node defined before camera node
|
||||
max96712_dphy0_ser0: max96715@41 {
|
||||
compatible = "maxim,ser,max96715";
|
||||
reg = <0x41>;
|
||||
|
||||
port {
|
||||
max96712_dphy0_remote0_out: endpoint {
|
||||
remote-endpoint = <&max96712_dphy0_link0_in>;
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
|
||||
ser-init-sequence {
|
||||
seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
max96712_dphy0_cam0: ox01f10@31 {
|
||||
compatible = "maxim,ovti,ox01f10";
|
||||
reg = <0x31>;
|
||||
|
||||
cam-i2c-addr-def = <0x36>;
|
||||
|
||||
cam-remote-ser = <&max96712_dphy0_ser0>; // remote serializer
|
||||
|
||||
poc-supply = <&max96712_dphy0_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "ox01f10";
|
||||
rockchip,camera-module-lens-name = "ox01f10";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96712_dphy0_cam0_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
|
||||
remote-init-sequence {
|
||||
seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
// Note: Serializer node defined before camera node
|
||||
max96712_dphy0_ser1: max96715@41 {
|
||||
compatible = "maxim,ser,max96715";
|
||||
reg = <0x41>;
|
||||
|
||||
serdes-remote-device-1 {
|
||||
compatible = "maxim4c,link1,max96715";
|
||||
status = "okay";
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
|
||||
remote-id = <1>; // Same as Link ID: 0/1/2/3
|
||||
ser-init-sequence {
|
||||
seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// Serializer i2c 7bit address remap
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
ser-i2c-addr-map = <0x42>; // 0: disable remap
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
port {
|
||||
max96712_dphy0_remote1_out: endpoint {
|
||||
remote-endpoint = <&max96712_dphy0_link1_in>;
|
||||
max96712_dphy0_cam1: ox01f10@32 {
|
||||
compatible = "maxim,ovti,ox01f10";
|
||||
reg = <0x32>;
|
||||
|
||||
cam-i2c-addr-def = <0x36>;
|
||||
|
||||
cam-remote-ser = <&max96712_dphy0_ser1>; // remote serializer
|
||||
|
||||
poc-supply = <&max96712_dphy0_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "ox01f10";
|
||||
rockchip,camera-module-lens-name = "ox01f10";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96712_dphy0_cam1_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf_vir1 */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_vir1_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
|
||||
remote-init-sequence {
|
||||
seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
i2c@2 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <2>;
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
// Note: Serializer node defined before camera node
|
||||
max96712_dphy0_ser2: max96715@43 {
|
||||
compatible = "maxim,ser,max96715";
|
||||
reg = <0x43>;
|
||||
|
||||
serdes-remote-device-2 {
|
||||
compatible = "maxim4c,link2,max96715";
|
||||
status = "okay";
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
|
||||
remote-id = <2>; // Same as Link ID: 0/1/2/3
|
||||
ser-init-sequence {
|
||||
seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// Serializer i2c 7bit address remap
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
ser-i2c-addr-map = <0x43>; // 0: disable remap
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
port {
|
||||
max96712_dphy0_remote2_out: endpoint {
|
||||
remote-endpoint = <&max96712_dphy0_link2_in>;
|
||||
max96712_dphy0_cam2: ox01f10@33 {
|
||||
compatible = "maxim,ovti,ox01f10";
|
||||
reg = <0x33>;
|
||||
|
||||
cam-i2c-addr-def = <0x36>;
|
||||
|
||||
cam-remote-ser = <&max96712_dphy0_ser2>; // remote serializer
|
||||
|
||||
poc-supply = <&max96712_dphy0_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <2>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "ox01f10";
|
||||
rockchip,camera-module-lens-name = "ox01f10";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96712_dphy0_cam2_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf_vir2 */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_vir2_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
|
||||
remote-init-sequence {
|
||||
seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
i2c@3 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <3>;
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
// Note: Serializer node defined before camera node
|
||||
max96712_dphy0_ser3: max96715@44 {
|
||||
compatible = "maxim,ser,max96715";
|
||||
reg = <0x44>;
|
||||
|
||||
serdes-remote-device-3 {
|
||||
compatible = "maxim4c,link3,max96715";
|
||||
status = "okay";
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
|
||||
remote-id = <3>; // Same as Link ID: 0/1/2/3
|
||||
ser-init-sequence {
|
||||
seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// Serializer i2c 7bit address remap
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
ser-i2c-addr-map = <0x44>; // 0: disable remap
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
port {
|
||||
max96712_dphy0_remote3_out: endpoint {
|
||||
remote-endpoint = <&max96712_dphy0_link3_in>;
|
||||
max96712_dphy0_cam3: ox01f10@34 {
|
||||
compatible = "maxim,ovti,ox01f10";
|
||||
reg = <0x34>;
|
||||
|
||||
cam-i2c-addr-def = <0x36>;
|
||||
|
||||
cam-remote-ser = <&max96712_dphy0_ser3>; // remote serializer
|
||||
|
||||
poc-supply = <&max96712_dphy0_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <3>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "ox01f10";
|
||||
rockchip,camera-module-lens-name = "ox01f10";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96712_dphy0_cam3_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf_vir3 */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_vir3_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
|
||||
remote-init-sequence {
|
||||
seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
/* serdes remote device end */
|
||||
/* i2c-mux end */
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -35,16 +35,25 @@
|
||||
vin-supply = <&vcc_3v3_s3>;
|
||||
};
|
||||
|
||||
max96712_dphy3_poc: max96712-dphy3-poc {
|
||||
max96712_dphy3_pwdn_regulator: max96712-dphy3-pwdn-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "max96712_dphy3_pwdn";
|
||||
gpio = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&max96712_dphy3_pwdn>;
|
||||
enable-active-high;
|
||||
startup-delay-us = <10000>;
|
||||
off-on-delay-us = <5000>;
|
||||
vin-supply = <&max96712_dphy3_vcc1v8>;
|
||||
};
|
||||
|
||||
max96712_dphy3_poc_regulator: max96712-dphy3-poc-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "max96712_dphy3_poc";
|
||||
regulator-boot-on;
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>;
|
||||
startup-delay-us = <1050>;
|
||||
off-on-delay-us = <515000>;
|
||||
enable-active-high;
|
||||
startup-delay-us = <10000>;
|
||||
off-on-delay-us = <5000>;
|
||||
vin-supply = <&vcc12v_dcin>;
|
||||
};
|
||||
};
|
||||
@@ -95,14 +104,13 @@
|
||||
clock-names = "xvclk";
|
||||
clocks = <&max96712_dphy3_osc0 0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&max96712_dphy3_pwdn>, <&max96712_dphy3_errb>, <&max96712_dphy3_lock>;
|
||||
pinctrl-0 = <&max96712_dphy3_errb>, <&max96712_dphy3_lock>;
|
||||
power-domains = <&power RK3588_PD_VI>;
|
||||
rockchip,grf = <&sys_grf>;
|
||||
pwdn-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
|
||||
lock-gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
|
||||
vcc1v2-supply = <&max96712_dphy3_vcc1v2>;
|
||||
vcc1v8-supply = <&max96712_dphy3_vcc1v8>;
|
||||
poc-supply = <&max96712_dphy3_poc>;
|
||||
pwdn-supply = <&max96712_dphy3_pwdn_regulator>;
|
||||
lock-gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
@@ -151,11 +159,7 @@
|
||||
link-rx-rate = <1>;
|
||||
link-tx-rate = <0>;
|
||||
|
||||
port {
|
||||
max96712_dphy3_link0_in: endpoint {
|
||||
remote-endpoint = <&max96712_dphy3_remote0_out>;
|
||||
};
|
||||
};
|
||||
link-remote-cam = <&max96712_dphy3_cam0>; // remote camera
|
||||
|
||||
link-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
@@ -179,11 +183,7 @@
|
||||
link-rx-rate = <1>;
|
||||
link-tx-rate = <0>;
|
||||
|
||||
port {
|
||||
max96712_dphy3_link1_in: endpoint {
|
||||
remote-endpoint = <&max96712_dphy3_remote1_out>;
|
||||
};
|
||||
};
|
||||
link-remote-cam = <&max96712_dphy3_cam1>; // remote camera
|
||||
|
||||
link-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
@@ -207,11 +207,7 @@
|
||||
link-rx-rate = <1>;
|
||||
link-tx-rate = <0>;
|
||||
|
||||
port {
|
||||
max96712_dphy3_link2_in: endpoint {
|
||||
remote-endpoint = <&max96712_dphy3_remote2_out>;
|
||||
};
|
||||
};
|
||||
link-remote-cam = <&max96712_dphy3_cam2>; // remote camera
|
||||
|
||||
link-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
@@ -235,11 +231,7 @@
|
||||
link-rx-rate = <1>;
|
||||
link-tx-rate = <0>;
|
||||
|
||||
port {
|
||||
max96712_dphy3_link3_in: endpoint {
|
||||
remote-endpoint = <&max96712_dphy3_remote3_out>;
|
||||
};
|
||||
};
|
||||
link-remote-cam = <&max96712_dphy3_cam3>; // remote camera
|
||||
|
||||
link-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
@@ -429,143 +421,225 @@
|
||||
};
|
||||
/* serdes local device end */
|
||||
|
||||
/* serdes remote device start */
|
||||
serdes-remote-device-0 {
|
||||
compatible = "maxim4c,link0,max96717";
|
||||
status = "okay";
|
||||
/* i2c-mux start */
|
||||
i2c-mux {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
remote-id = <0>; // Same as Link ID: 0/1/2/3
|
||||
i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
// Serializer i2c 7bit address remap
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
ser-i2c-addr-map = <0x41>; // 0: disable remap
|
||||
// Note: Serializer node defined before camera node
|
||||
max96712_dphy3_ser0: max96717@41 {
|
||||
compatible = "maxim,ser,max96717";
|
||||
reg = <0x41>;
|
||||
|
||||
// Camera i2c 7bit address remap
|
||||
cam-i2c-addr-def = <0x30>;
|
||||
cam-i2c-addr-map = <0x31>; // 0: disable remap
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
|
||||
port {
|
||||
max96712_dphy3_remote0_out: endpoint {
|
||||
remote-endpoint = <&max96712_dphy3_link0_in>;
|
||||
ser-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
03 02 10 00 00
|
||||
14 17 00 00 00
|
||||
14 32 7f 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
max96712_dphy3_cam0: sc320at@31 {
|
||||
compatible = "maxim,smartsens,sc320at";
|
||||
reg = <0x31>;
|
||||
|
||||
cam-i2c-addr-def = <0x30>;
|
||||
|
||||
cam-remote-ser = <&max96712_dphy3_ser0>; // remote serializer
|
||||
|
||||
poc-supply = <&max96712_dphy3_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "sc320at";
|
||||
rockchip,camera-module-lens-name = "sc320at";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96712_dphy3_cam0_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
|
||||
remote-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
03 02 10 00 00
|
||||
14 17 00 00 00
|
||||
14 32 7f 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
// Note: Serializer node defined before camera node
|
||||
max96712_dphy3_ser1: max96717@42 {
|
||||
compatible = "maxim,ser,max96717";
|
||||
reg = <0x42>;
|
||||
|
||||
serdes-remote-device-1 {
|
||||
compatible = "maxim4c,link1,max96717";
|
||||
status = "okay";
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
|
||||
remote-id = <1>; // Same as Link ID: 0/1/2/3
|
||||
ser-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// Serializer i2c 7bit address remap
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
ser-i2c-addr-map = <0x42>; // 0: disable remap
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
03 02 10 00 00
|
||||
14 17 00 00 00
|
||||
14 32 7f 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
// Camera i2c 7bit address remap
|
||||
cam-i2c-addr-def = <0x30>;
|
||||
cam-i2c-addr-map = <0x32>; // 0: disable remap
|
||||
// Note: Serializer node defined before camera node
|
||||
max96712_dphy3_cam1: sc320at@32 {
|
||||
compatible = "maxim,smartsens,sc320at";
|
||||
reg = <0x32>;
|
||||
|
||||
port {
|
||||
max96712_dphy3_remote1_out: endpoint {
|
||||
remote-endpoint = <&max96712_dphy3_link1_in>;
|
||||
cam-i2c-addr-def = <0x30>;
|
||||
|
||||
cam-remote-ser = <&max96712_dphy3_ser1>; // remote serializer
|
||||
|
||||
poc-supply = <&max96712_dphy3_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <1>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "sc320at";
|
||||
rockchip,camera-module-lens-name = "sc320at";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96712_dphy3_cam1_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf_vir1 */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_vir1_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
|
||||
remote-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
i2c@2 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <2>;
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
03 02 10 00 00
|
||||
14 17 00 00 00
|
||||
14 32 7f 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
// Note: Serializer node defined before camera node
|
||||
max96712_dphy3_ser2: max96717@43 {
|
||||
compatible = "maxim,ser,max96717";
|
||||
reg = <0x43>;
|
||||
|
||||
serdes-remote-device-2 {
|
||||
compatible = "maxim4c,link2,max96717";
|
||||
status = "okay";
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
|
||||
remote-id = <2>; // Same as Link ID: 0/1/2/3
|
||||
ser-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// Serializer i2c 7bit address remap
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
ser-i2c-addr-map = <0x43>; // 0: disable remap
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
03 02 10 00 00
|
||||
14 17 00 00 00
|
||||
14 32 7f 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
// Camera i2c 7bit address remap
|
||||
cam-i2c-addr-def = <0x30>;
|
||||
cam-i2c-addr-map = <0x33>; // 0: disable remap
|
||||
max96712_dphy3_cam2: sc320at@33 {
|
||||
compatible = "maxim,smartsens,sc320at";
|
||||
reg = <0x33>;
|
||||
|
||||
port {
|
||||
max96712_dphy3_remote2_out: endpoint {
|
||||
remote-endpoint = <&max96712_dphy3_link2_in>;
|
||||
cam-i2c-addr-def = <0x30>;
|
||||
|
||||
cam-remote-ser = <&max96712_dphy3_ser2>; // remote serializer
|
||||
|
||||
poc-supply = <&max96712_dphy3_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <2>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "sc320at";
|
||||
rockchip,camera-module-lens-name = "sc320at";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96712_dphy3_cam2_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf_vir2 */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_vir2_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
|
||||
remote-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
i2c@3 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <3>;
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
03 02 10 00 00
|
||||
14 17 00 00 00
|
||||
14 32 7f 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
// Note: Serializer node defined before camera node
|
||||
max96712_dphy3_ser3: max96717@44 {
|
||||
compatible = "maxim,ser,max96717";
|
||||
reg = <0x44>;
|
||||
|
||||
serdes-remote-device-3 {
|
||||
compatible = "maxim4c,link3,max96717";
|
||||
status = "okay";
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
|
||||
remote-id = <3>; // Same as Link ID: 0/1/2/3
|
||||
ser-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// Serializer i2c 7bit address remap
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
ser-i2c-addr-map = <0x44>; // 0: disable remap
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
03 02 10 00 00
|
||||
14 17 00 00 00
|
||||
14 32 7f 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
// Camera i2c 7bit address remap
|
||||
cam-i2c-addr-def = <0x30>;
|
||||
cam-i2c-addr-map = <0x34>; // 0: disable remap
|
||||
max96712_dphy3_cam3: sc320at@34 {
|
||||
compatible = "maxim,smartsens,sc320at";
|
||||
reg = <0x34>;
|
||||
|
||||
port {
|
||||
max96712_dphy3_remote3_out: endpoint {
|
||||
remote-endpoint = <&max96712_dphy3_link3_in>;
|
||||
cam-i2c-addr-def = <0x30>;
|
||||
|
||||
cam-remote-ser = <&max96712_dphy3_ser3>; // remote serializer
|
||||
|
||||
poc-supply = <&max96712_dphy3_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <3>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "sc320at";
|
||||
rockchip,camera-module-lens-name = "sc320at";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96712_dphy3_cam3_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf_vir3 */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_vir3_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
|
||||
remote-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
03 02 10 00 00
|
||||
14 17 00 00 00
|
||||
14 32 7f 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
/* serdes remote device end */
|
||||
/* i2c-mux end */
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -0,0 +1,511 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* Copyright (c) 2023 Rockchip Electronics Co., Ltd.
|
||||
*
|
||||
*/
|
||||
#include <dt-bindings/display/media-bus-format.h>
|
||||
|
||||
/ {
|
||||
max96722_dcphy0_osc: max96722-dcphy0-oscillator {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <1>;
|
||||
clock-frequency = <25000000>;
|
||||
clock-output-names = "max96722-dcphy0-osc";
|
||||
};
|
||||
|
||||
max96722_dcphy0_vcc1v2: max96722-dcphy0-vcc1v2 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "max96722_dcphy0_vcc1v2";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1200000>;
|
||||
regulator-max-microvolt = <1200000>;
|
||||
startup-delay-us = <850>;
|
||||
vin-supply = <&vcc5v0_sys>;
|
||||
};
|
||||
|
||||
max96722_dcphy0_vcc1v8: max96722-dcphy0-vcc1v8 {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "max96722_dcphy0_vcc1v8";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
startup-delay-us = <200>;
|
||||
vin-supply = <&vcc_3v3_s3>;
|
||||
};
|
||||
|
||||
max96722_dcphy0_pwdn_regulator: max96722-dcphy0-pwdn-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "max96722_dcphy0_pwdn";
|
||||
gpio = <&gpio4 RK_PA4 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&max96722_dcphy0_pwdn>;
|
||||
enable-active-high;
|
||||
startup-delay-us = <10000>;
|
||||
off-on-delay-us = <5000>;
|
||||
vin-supply = <&max96722_dcphy0_vcc1v8>;
|
||||
};
|
||||
|
||||
max96722_dcphy0_poc_regulator: max96722-dcphy0-poc-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "max96722_dcphy0_poc";
|
||||
gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
startup-delay-us = <10000>;
|
||||
off-on-delay-us = <5000>;
|
||||
vin-supply = <&vcc12v_dcin>;
|
||||
};
|
||||
};
|
||||
|
||||
&mipi_dcphy0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&csi2_dcphy0 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi_dcphy0_in_max96722: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&max96722_dcphy0_out>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
csidcphy0_out: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&mipi0_csi2_input>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c8 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c8m2_xfer>;
|
||||
|
||||
max96722_dcphy0: max96722@29 {
|
||||
compatible = "maxim4c,max96722";
|
||||
status = "okay";
|
||||
reg = <0x29>;
|
||||
clock-names = "xvclk";
|
||||
clocks = <&max96722_dcphy0_osc 0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&max96722_dcphy0_errb>, <&max96722_dcphy0_lock>;
|
||||
power-domains = <&power RK3588_PD_VI>;
|
||||
rockchip,grf = <&sys_grf>;
|
||||
vcc1v2-supply = <&max96722_dcphy0_vcc1v2>;
|
||||
vcc1v8-supply = <&max96722_dcphy0_vcc1v8>;
|
||||
pwdn-supply = <&max96722_dcphy0_pwdn_regulator>;
|
||||
lock-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "max96722";
|
||||
rockchip,camera-module-lens-name = "max96722";
|
||||
|
||||
port {
|
||||
max96722_dcphy0_out: endpoint {
|
||||
remote-endpoint = <&mipi_dcphy0_in_max96722>;
|
||||
data-lanes = <1 2>;
|
||||
};
|
||||
};
|
||||
|
||||
/* support mode config start */
|
||||
support-mode-config {
|
||||
status = "okay";
|
||||
|
||||
bus-format = <MEDIA_BUS_FMT_UYVY8_2X8>;
|
||||
sensor-width = <1920>;
|
||||
sensor-height = <1080>;
|
||||
max-fps-numerator = <10000>;
|
||||
max-fps-denominator = <300000>;
|
||||
bpp = <16>;
|
||||
link-freq-idx = <24>;
|
||||
vc-array = <0x10 0x20 0x40 0x80>; // VC0~3: bit4~7
|
||||
};
|
||||
/* support mode config end */
|
||||
|
||||
/* serdes local device start */
|
||||
serdes-local-device {
|
||||
status = "okay";
|
||||
|
||||
/* GMSL LINK config start */
|
||||
gmsl-links {
|
||||
status = "okay";
|
||||
|
||||
link-vdd-ldo1-en = <1>;
|
||||
link-vdd-ldo2-en = <1>;
|
||||
|
||||
// Link A: link-id = 0
|
||||
gmsl-link-config-0 {
|
||||
status = "okay";
|
||||
link-id = <0>; // Link ID: 0/1/2/3
|
||||
|
||||
link-type = <1>;
|
||||
link-rx-rate = <0>;
|
||||
link-tx-rate = <0>;
|
||||
|
||||
link-remote-cam = <&max96722_dcphy0_cam0>; // remote camera
|
||||
|
||||
link-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
14 D1 03 00 00 // VGAHiGain
|
||||
14 45 00 00 00 // Disable SSC
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
// Link B: link-id = 1
|
||||
gmsl-link-config-1 {
|
||||
status = "okay";
|
||||
link-id = <1>; // Link ID: 0/1/2/3
|
||||
|
||||
link-type = <1>;
|
||||
link-rx-rate = <0>;
|
||||
link-tx-rate = <0>;
|
||||
|
||||
link-remote-cam = <&max96722_dcphy0_cam1>; // remote camera
|
||||
|
||||
link-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
15 D1 03 00 00 // VGAHiGain
|
||||
15 45 00 00 00 // Disable SSC
|
||||
];
|
||||
};
|
||||
};
|
||||
};
|
||||
/* GMSL LINK config end */
|
||||
|
||||
/* VIDEO PIPE config start */
|
||||
video-pipes {
|
||||
status = "okay";
|
||||
|
||||
// Video Pipe 0
|
||||
video-pipe-config-0 {
|
||||
status = "okay";
|
||||
pipe-id = <0>; // Video Pipe ID: 0/1/2/3/4/5/6/7
|
||||
|
||||
pipe-idx = <2>; // Video Pipe X/Y/Z/U: 0/1/2/3
|
||||
link-idx = <0>; // Link A/B/C/D: 0/1/2/3
|
||||
|
||||
pipe-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
// Send YUV422, FS, and FE from Video Pipe 0 to Controller 0
|
||||
09 0B 07 00 00 // Enable 0/1/2 SRC/DST Mappings
|
||||
09 2D 00 00 00 // SRC/DST 0/1/2 -> CSI2 Controller 0;
|
||||
// For the following MSB 2 bits = VC, LSB 6 bits = DT
|
||||
09 0D 1e 00 00 // SRC0 VC = 0, DT = YUV422 8bit
|
||||
09 0E 1e 00 00 // DST0 VC = 0, DT = YUV422 8bit
|
||||
09 0F 00 00 00 // SRC1 VC = 0, DT = Frame Start
|
||||
09 10 00 00 00 // DST1 VC = 0, DT = Frame Start
|
||||
09 11 01 00 00 // SRC2 VC = 0, DT = Frame End
|
||||
09 12 01 00 00 // DST2 VC = 0, DT = Frame End
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
// Video Pipe 1
|
||||
video-pipe-config-1 {
|
||||
status = "okay";
|
||||
pipe-id = <1>; // Video Pipe 1: pipe-id = 1
|
||||
|
||||
pipe-idx = <2>; // Video Pipe X/Y/Z/U: 0/1/2/3
|
||||
link-idx = <1>; // Link A/B/C/D: 0/1/2/3
|
||||
|
||||
pipe-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
// Send YUV422, FS, and FE from Video Pipe 1 to Controller 0
|
||||
09 4B 07 00 00 // Enable 0/1/2 SRC/DST Mappings
|
||||
09 6D 00 00 00 // SRC/DST 0/1/2 -> CSI2 Controller 0;
|
||||
// For the following MSB 2 bits = VC, LSB 6 bits = DT
|
||||
09 4D 1e 00 00 // SRC0 VC = 0, DT = YUV422 8bit
|
||||
09 4E 5e 00 00 // DST0 VC = 1, DT = YUV422 8bit
|
||||
09 4F 00 00 00 // SRC1 VC = 0, DT = Frame Start
|
||||
09 50 40 00 00 // DST1 VC = 1, DT = Frame Start
|
||||
09 51 01 00 00 // SRC2 VC = 0, DT = Frame End
|
||||
09 52 41 00 00 // DST2 VC = 1, DT = Frame End
|
||||
];
|
||||
};
|
||||
};
|
||||
};
|
||||
/* VIDEO PIPE config end */
|
||||
|
||||
/* MIPI TXPHY config start */
|
||||
mipi-txphys {
|
||||
status = "okay";
|
||||
|
||||
phy-mode = <1>;
|
||||
phy-force-clock-out = <1>;
|
||||
phy-force-clk0-en = <0>;
|
||||
phy-force-clk3-en = <0>;
|
||||
|
||||
// MIPI TXPHY A: phy-id = 0
|
||||
mipi-txphy-config-0 {
|
||||
status = "okay";
|
||||
phy-id = <0>; // MIPI TXPHY ID: 0/1/2/3
|
||||
|
||||
phy-type = <0>;
|
||||
auto-deskew = <0x00>;
|
||||
data-lane-num = <2>;
|
||||
data-lane-map = <0x4>;
|
||||
vc-ext-en = <0>;
|
||||
};
|
||||
};
|
||||
/* MIPI TXPHY config end */
|
||||
|
||||
/* local device extra init sequence */
|
||||
extra-init-sequence {
|
||||
status = "disabled";
|
||||
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
// common init sequence such as fsync / gpio and so on
|
||||
];
|
||||
};
|
||||
};
|
||||
/* serdes local device end */
|
||||
|
||||
/* i2c-mux start */
|
||||
i2c-mux {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
// Note: Serializer node defined before camera node
|
||||
max96722_dcphy0_ser0: max96717@41 {
|
||||
compatible = "maxim,ser,max96717";
|
||||
reg = <0x41>;
|
||||
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
|
||||
ser-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
02 BE 00 00 01 // MFP0 GPIO_OUT = 0: MFP0 output is driven to 0
|
||||
03 02 10 00 00 // Improve CMU voltage performance to improve link robustness
|
||||
14 17 00 00 00 // RLMS17 = 0x00: disable AGC/DFE adaptation
|
||||
14 32 7f 00 00 // RLMS32 = 0x7F: change OSN loop mode
|
||||
03 F0 59 00 00 // REFGEN_PREDEF_FREQ_ALT = 1: Alternative table, REFGEN_PREDEF_FREQ = 0x1
|
||||
00 03 03 00 00 // RCLKSEL = 0x3: Reference PLL output
|
||||
00 06 B1 00 01 // RCLKEN = 1: RCLK output is enabled
|
||||
02 BE 10 00 00 // MFP0 GPIO_OUT = 1: MFP0 output is driven to 1
|
||||
02 BF 40 00 00 // MFP0 PULL_UPDN_SEL = 1: Pullup
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
max96722_dcphy0_cam0: ox03j10@31 {
|
||||
compatible = "maxim,ovti,ox03j10";
|
||||
reg = <0x31>;
|
||||
|
||||
cam-i2c-addr-def = <0x36>;
|
||||
|
||||
cam-remote-ser = <&max96722_dcphy0_ser0>; // remote serializer
|
||||
|
||||
poc-supply = <&max96722_dcphy0_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "ox03j10";
|
||||
rockchip,camera-module-lens-name = "ox03j10";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96722_dcphy0_cam0_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
|
||||
i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
|
||||
// Note: Serializer node defined before camera node
|
||||
max96722_dcphy0_ser1: max96717@41 {
|
||||
compatible = "maxim,ser,max96717";
|
||||
reg = <0x41>;
|
||||
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
|
||||
ser-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
02 BE 00 00 01 // MFP0 GPIO_OUT = 0: MFP0 output is driven to 0
|
||||
03 02 10 00 00 // Improve CMU voltage performance to improve link robustness
|
||||
14 17 00 00 00 // RLMS17 = 0x00: disable AGC/DFE adaptation
|
||||
14 32 7f 00 00 // RLMS32 = 0x7F: change OSN loop mode
|
||||
03 F0 59 00 00 // REFGEN_PREDEF_FREQ_ALT = 1: Alternative table, REFGEN_PREDEF_FREQ = 0x1
|
||||
00 03 03 00 00 // RCLKSEL = 0x3: Reference PLL output
|
||||
00 06 B1 00 01 // RCLKEN = 1: RCLK output is enabled
|
||||
02 BE 10 00 00 // MFP0 GPIO_OUT = 1: MFP0 output is driven to 1
|
||||
02 BF 40 00 00 // MFP0 PULL_UPDN_SEL = 1: Pullup
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
max96722_dcphy0_cam1: ox03j10@32 {
|
||||
compatible = "maxim,ovti,ox03j10";
|
||||
reg = <0x32>;
|
||||
|
||||
cam-i2c-addr-def = <0x36>;
|
||||
|
||||
cam-remote-ser = <&max96722_dcphy0_ser1>; // remote serializer
|
||||
|
||||
poc-supply = <&max96722_dcphy0_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "ox03j10";
|
||||
rockchip,camera-module-lens-name = "ox03j10";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96722_dcphy0_cam1_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf_vir1 */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_vir1_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
};
|
||||
/* i2c-mux end */
|
||||
};
|
||||
};
|
||||
|
||||
&mipi0_csi2 {
|
||||
status = "okay";
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi0_csi2_input: endpoint@1 {
|
||||
reg = <1>;
|
||||
remote-endpoint = <&csidcphy0_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
mipi0_csi2_output: endpoint@0 {
|
||||
reg = <0>;
|
||||
remote-endpoint = <&cif_mipi0_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif_mipi_lvds {
|
||||
status = "okay";
|
||||
/* parameters for do cif reset detecting:
|
||||
* index0: monitor mode,
|
||||
0 for idle,
|
||||
1 for continue,
|
||||
2 for trigger,
|
||||
3 for hotplug (for nextchip)
|
||||
* index1: the frame id to start timer,
|
||||
min is 2
|
||||
* index2: frame num of monitoring cycle
|
||||
* index3: err time for keep monitoring
|
||||
after finding out err (ms)
|
||||
* index4: csi2 err reference val for resetting
|
||||
*/
|
||||
rockchip,cif-monitor = <3 2 1 1000 5>;
|
||||
|
||||
port {
|
||||
cif_mipi0_in: endpoint {
|
||||
remote-endpoint = <&mipi0_csi2_output>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&rkcif {
|
||||
status = "okay";
|
||||
rockchip,android-usb-camerahal-enable;
|
||||
};
|
||||
|
||||
&rkcif_mmu {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pinctrl {
|
||||
max96722-dcphy0 {
|
||||
max96722_dcphy0_pwdn: max96722-dcphy0-pwdn {
|
||||
rockchip,pins = <4 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
|
||||
};
|
||||
|
||||
max96722_dcphy0_errb: max96722-dcphy0-errb {
|
||||
rockchip,pins = <4 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none_smt>;
|
||||
};
|
||||
|
||||
max96722_dcphy0_lock: max96722-dcphy0-lock {
|
||||
rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none_smt>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -35,17 +35,25 @@
|
||||
vin-supply = <&vcc_3v3_s3>;
|
||||
};
|
||||
|
||||
max96722_dphy0_poc: max96722-dphy0-poc {
|
||||
max96722_dphy0_pwdn_regulator: max96722-dphy0-pwdn-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "max96722_dphy0_pwdn";
|
||||
gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&max96722_dphy0_pwdn>;
|
||||
enable-active-high;
|
||||
startup-delay-us = <10000>;
|
||||
off-on-delay-us = <5000>;
|
||||
vin-supply = <&max96722_dphy0_vcc1v8>;
|
||||
};
|
||||
|
||||
max96722_dphy0_poc_regulator: max96722-dphy0-poc-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "max96722_dphy0_poc";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
|
||||
startup-delay-us = <1050>;
|
||||
off-on-delay-us = <515000>;
|
||||
enable-active-high;
|
||||
startup-delay-us = <10000>;
|
||||
off-on-delay-us = <5000>;
|
||||
vin-supply = <&vcc12v_dcin>;
|
||||
};
|
||||
};
|
||||
@@ -96,14 +104,13 @@
|
||||
clock-names = "xvclk";
|
||||
clocks = <&max96722_dphy0_osc0 0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&max96722_dphy0_pwdn>, <&max96722_dphy0_errb>, <&max96722_dphy0_lock>;
|
||||
pinctrl-0 = <&max96722_dphy0_errb>, <&max96722_dphy0_lock>;
|
||||
power-domains = <&power RK3588_PD_VI>;
|
||||
rockchip,grf = <&sys_grf>;
|
||||
pwdn-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>;
|
||||
lock-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||||
vcc1v2-supply = <&max96722_dphy0_vcc1v2>;
|
||||
vcc1v8-supply = <&max96722_dphy0_vcc1v8>;
|
||||
poc-supply = <&max96722_dphy0_poc>;
|
||||
pwdn-supply = <&max96722_dphy0_pwdn_regulator>;
|
||||
lock-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
@@ -152,11 +159,7 @@
|
||||
link-rx-rate = <0>;
|
||||
link-tx-rate = <0>;
|
||||
|
||||
port {
|
||||
max96722_dphy0_link0_in: endpoint {
|
||||
remote-endpoint = <&max96722_dphy0_remote0_out>;
|
||||
};
|
||||
};
|
||||
link-remote-cam = <&max96722_dphy0_cam0>; // remote camera
|
||||
|
||||
link-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
@@ -183,11 +186,7 @@
|
||||
link-rx-rate = <0>;
|
||||
link-tx-rate = <0>;
|
||||
|
||||
port {
|
||||
max96722_dphy0_link1_in: endpoint {
|
||||
remote-endpoint = <&max96722_dphy0_remote1_out>;
|
||||
};
|
||||
};
|
||||
link-remote-cam = <&max96722_dphy0_cam1>; // remote camera
|
||||
|
||||
link-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
@@ -214,11 +213,7 @@
|
||||
link-rx-rate = <0>;
|
||||
link-tx-rate = <0>;
|
||||
|
||||
port {
|
||||
max96722_dphy0_link2_in: endpoint {
|
||||
remote-endpoint = <&max96722_dphy0_remote2_out>;
|
||||
};
|
||||
};
|
||||
link-remote-cam = <&max96722_dphy0_cam2>; // remote camera
|
||||
|
||||
link-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
@@ -245,11 +240,7 @@
|
||||
link-rx-rate = <0>;
|
||||
link-tx-rate = <0>;
|
||||
|
||||
port {
|
||||
max96722_dphy0_link3_in: endpoint {
|
||||
remote-endpoint = <&max96722_dphy0_remote3_out>;
|
||||
};
|
||||
};
|
||||
link-remote-cam = <&max96722_dphy0_cam3>; // remote camera
|
||||
|
||||
link-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
@@ -469,199 +460,296 @@
|
||||
};
|
||||
/* serdes local device end */
|
||||
|
||||
/* serdes remote device start */
|
||||
serdes-remote-device-0 {
|
||||
compatible = "maxim4c,link0,max96715";
|
||||
status = "okay";
|
||||
/* i2c-mux start */
|
||||
i2c-mux {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
remote-id = <0>; // Same as Link ID: 0/1/2/3
|
||||
i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
// Serializer i2c 7bit address remap
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
ser-i2c-addr-map = <0x41>; // 0: disable remap
|
||||
// Note: Serializer node defined before camera node
|
||||
max96722_dphy0_ser0: max96715@41 {
|
||||
compatible = "maxim,ser,max96715";
|
||||
reg = <0x41>;
|
||||
|
||||
port {
|
||||
max96722_dphy0_remote0_out: endpoint {
|
||||
remote-endpoint = <&max96722_dphy0_link0_in>;
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
|
||||
ser-init-sequence {
|
||||
seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
max96722_dphy0_cam0: ox01f10@31 {
|
||||
compatible = "maxim,ovti,ox01f10";
|
||||
reg = <0x31>;
|
||||
|
||||
cam-i2c-addr-def = <0x36>;
|
||||
|
||||
cam-remote-ser = <&max96722_dphy0_ser0>; // remote serializer
|
||||
|
||||
poc-supply = <&max96722_dphy0_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "ox01f10";
|
||||
rockchip,camera-module-lens-name = "ox01f10";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96722_dphy0_cam0_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
|
||||
remote-init-sequence {
|
||||
seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
// Note: Serializer node defined before camera node
|
||||
max96722_dphy0_ser1: max96715@42 {
|
||||
compatible = "maxim,ser,max96715";
|
||||
reg = <0x42>;
|
||||
|
||||
serdes-remote-device-1 {
|
||||
compatible = "maxim4c,link1,max96715";
|
||||
status = "okay";
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
|
||||
remote-id = <1>; // Same as Link ID: 0/1/2/3
|
||||
ser-init-sequence {
|
||||
seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// Serializer i2c 7bit address remap
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
ser-i2c-addr-map = <0x42>; // 0: disable remap
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
port {
|
||||
max96722_dphy0_remote1_out: endpoint {
|
||||
remote-endpoint = <&max96722_dphy0_link1_in>;
|
||||
max96722_dphy0_cam1: ox01f10@32 {
|
||||
compatible = "maxim,ovti,ox01f10";
|
||||
reg = <0x32>;
|
||||
|
||||
cam-i2c-addr-def = <0x36>;
|
||||
|
||||
cam-remote-ser = <&max96722_dphy0_ser1>; // remote serializer
|
||||
|
||||
poc-supply = <&max96722_dphy0_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "ox01f10";
|
||||
rockchip,camera-module-lens-name = "ox01f10";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96722_dphy0_cam1_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf_vir1 */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_vir1_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
|
||||
remote-init-sequence {
|
||||
seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
i2c@2 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <2>;
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
// Note: Serializer node defined before camera node
|
||||
max96722_dphy0_ser2: max96715@43 {
|
||||
compatible = "maxim,ser,max96715";
|
||||
reg = <0x43>;
|
||||
|
||||
serdes-remote-device-2 {
|
||||
compatible = "maxim4c,link2,max96715";
|
||||
status = "okay";
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
|
||||
remote-id = <2>; // Same as Link ID: 0/1/2/3
|
||||
ser-init-sequence {
|
||||
seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// Serializer i2c 7bit address remap
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
ser-i2c-addr-map = <0x43>; // 0: disable remap
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
port {
|
||||
max96722_dphy0_remote2_out: endpoint {
|
||||
remote-endpoint = <&max96722_dphy0_link2_in>;
|
||||
max96722_dphy0_cam2: ox01f10@33 {
|
||||
compatible = "maxim,ovti,ox01f10";
|
||||
reg = <0x33>;
|
||||
|
||||
cam-i2c-addr-def = <0x36>;
|
||||
|
||||
cam-remote-ser = <&max96722_dphy0_ser2>; // remote serializer
|
||||
|
||||
poc-supply = <&max96722_dphy0_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <2>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "ox01f10";
|
||||
rockchip,camera-module-lens-name = "ox01f10";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96722_dphy0_cam2_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf_vir2 */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_vir2_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
|
||||
remote-init-sequence {
|
||||
seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
i2c@3 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <3>;
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
// Note: Serializer node defined before camera node
|
||||
max96722_dphy0_ser3: max96715@44 {
|
||||
compatible = "maxim,ser,max96715";
|
||||
reg = <0x44>;
|
||||
|
||||
serdes-remote-device-3 {
|
||||
compatible = "maxim4c,link3,max96715";
|
||||
status = "okay";
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
|
||||
remote-id = <3>; // Same as Link ID: 0/1/2/3
|
||||
ser-init-sequence {
|
||||
seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// Serializer i2c 7bit address remap
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
ser-i2c-addr-map = <0x44>; // 0: disable remap
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
port {
|
||||
max96722_dphy0_remote3_out: endpoint {
|
||||
remote-endpoint = <&max96722_dphy0_link3_in>;
|
||||
max96722_dphy0_cam3: ox01f10@34 {
|
||||
compatible = "maxim,ovti,ox01f10";
|
||||
reg = <0x34>;
|
||||
|
||||
cam-i2c-addr-def = <0x36>;
|
||||
|
||||
cam-remote-ser = <&max96722_dphy0_ser3>; // remote serializer
|
||||
|
||||
poc-supply = <&max96722_dphy0_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <3>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "ox01f10";
|
||||
rockchip,camera-module-lens-name = "ox01f10";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96722_dphy0_cam3_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf_vir3 */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_vir3_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
|
||||
remote-init-sequence {
|
||||
seq-item-size = <4>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <1>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
07 84 00 00
|
||||
67 c4 00 00
|
||||
0F bf 00 00
|
||||
3F 08 00 00
|
||||
40 2d 00 00
|
||||
20 10 00 00
|
||||
21 11 00 00
|
||||
22 12 00 00
|
||||
23 13 00 00
|
||||
24 14 00 00
|
||||
25 15 00 00
|
||||
26 16 00 00
|
||||
27 17 00 00
|
||||
30 00 00 00
|
||||
31 01 00 00
|
||||
32 02 00 00
|
||||
33 03 00 00
|
||||
34 04 00 00
|
||||
35 05 00 00
|
||||
36 06 00 00
|
||||
37 07 00 00
|
||||
];
|
||||
};
|
||||
};
|
||||
/* serdes remote device end */
|
||||
/* i2c-mux end */
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -35,17 +35,25 @@
|
||||
vin-supply = <&vcc_3v3_s3>;
|
||||
};
|
||||
|
||||
max96722_dphy3_poc: max96722-dphy3-poc {
|
||||
max96722_dphy3_pwdn_regulator: max96722-dphy3-pwdn-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "max96722_dphy3_pwdn";
|
||||
gpio = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&max96722_dphy3_pwdn>;
|
||||
enable-active-high;
|
||||
startup-delay-us = <10000>;
|
||||
off-on-delay-us = <5000>;
|
||||
vin-supply = <&max96722_dphy3_vcc1v8>;
|
||||
};
|
||||
|
||||
max96722_dphy3_poc_regulator: max96722-dphy3-poc-regulator {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "max96722_dphy3_poc";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
regulator-min-microvolt = <12000000>;
|
||||
regulator-max-microvolt = <12000000>;
|
||||
enable-active-high;
|
||||
gpio = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>;
|
||||
startup-delay-us = <1050>;
|
||||
off-on-delay-us = <515000>;
|
||||
enable-active-high;
|
||||
startup-delay-us = <10000>;
|
||||
off-on-delay-us = <5000>;
|
||||
vin-supply = <&vcc12v_dcin>;
|
||||
};
|
||||
};
|
||||
@@ -96,14 +104,13 @@
|
||||
clock-names = "xvclk";
|
||||
clocks = <&max96722_dphy3_osc0 0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&max96722_dphy3_pwdn>, <&max96722_dphy3_errb>, <&max96722_dphy3_lock>;
|
||||
pinctrl-0 = <&max96722_dphy3_errb>, <&max96722_dphy3_lock>;
|
||||
power-domains = <&power RK3588_PD_VI>;
|
||||
rockchip,grf = <&sys_grf>;
|
||||
pwdn-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>;
|
||||
lock-gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
|
||||
vcc1v2-supply = <&max96722_dphy3_vcc1v2>;
|
||||
vcc1v8-supply = <&max96722_dphy3_vcc1v8>;
|
||||
poc-supply = <&max96722_dphy3_poc>;
|
||||
pwdn-supply = <&max96722_dphy3_pwdn_regulator>;
|
||||
lock-gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
@@ -152,11 +159,7 @@
|
||||
link-rx-rate = <0>;
|
||||
link-tx-rate = <0>;
|
||||
|
||||
port {
|
||||
max96722_dphy3_link0_in: endpoint {
|
||||
remote-endpoint = <&max96722_dphy3_remote0_out>;
|
||||
};
|
||||
};
|
||||
link-remote-cam = <&max96722_dphy3_cam0>; // remote camera
|
||||
|
||||
link-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
@@ -180,11 +183,7 @@
|
||||
link-rx-rate = <0>;
|
||||
link-tx-rate = <0>;
|
||||
|
||||
port {
|
||||
max96722_dphy3_link1_in: endpoint {
|
||||
remote-endpoint = <&max96722_dphy3_remote1_out>;
|
||||
};
|
||||
};
|
||||
link-remote-cam = <&max96722_dphy3_cam1>; // remote camera
|
||||
|
||||
link-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
@@ -347,91 +346,142 @@
|
||||
};
|
||||
/* serdes local device end */
|
||||
|
||||
/* serdes remote device start */
|
||||
serdes-remote-device-0 {
|
||||
compatible = "maxim4c,link0,max9295";
|
||||
status = "okay";
|
||||
/* i2c-mux start */
|
||||
i2c-mux {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
remote-id = <0>; // Same as Link ID: 0/1/2/3
|
||||
i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
// Serializer i2c 7bit address remap
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
ser-i2c-addr-map = <0x41>; // 0: disable remap
|
||||
// Note: Serializer node defined before camera node
|
||||
max96722_dphy3_ser0: max9295@41 {
|
||||
compatible = "maxim,ser,max9295";
|
||||
reg = <0x41>;
|
||||
|
||||
port {
|
||||
max96722_dphy3_remote0_out: endpoint {
|
||||
remote-endpoint = <&max96722_dphy3_link0_in>;
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
|
||||
ser-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
00 01 04 00 00 // RX_RATE: 187.5Mbps, TX_RATE: 3Gbps
|
||||
00 11 03 00 00 // Coax Drive
|
||||
02 D6 03 00 00 // MFP8: GPIO_OUT_DIS = 1, GPIO_TX_EN = 1
|
||||
03 F0 51 00 00 // RCLK: 27MHz/24MHz (ALT),Enable reference-generation PLL, Enable pre-defined clock setting for reference-generation PLL
|
||||
00 03 07 00 00 // RCLK: Enable RCLK output from altermative MFP pin, RCLKOUT clock select reference PLL
|
||||
00 06 b1 00 00 // RCLK: GMSL2, Enable RCLK output, i2c selected
|
||||
02 C1 10 00 00 // MFP1: GPIO_OUT pin output is driven to 1 when GPIO_RX_EN = 0
|
||||
02 C2 60 00 00 // MFP1: OUT_TYPE = 1: Push-pull, PULL_UPDN_SEL[1:0] = 0b01: Pullup
|
||||
00 07 07 00 00 // Enable Parallel video input, Parallel HS and VS Enable
|
||||
00 10 05 00 00 // AUTO_LINK = 0, LINK_CFG = 1: LinkA is selected, REG_ENABLE = 1: Regulator enabled
|
||||
00 12 14 00 00 // REG_MNL = 1: Enable LDO on/off state controlled by REG_ENABLE
|
||||
01 00 62 00 00 // Video X, Line CRC enabled, ENC_MODE = 2: HS, VS, DE encoding on, color bits sent only when DE is high
|
||||
01 01 50 00 00 // Video X, BPP = 0x10
|
||||
00 53 10 00 00 // Video X, TX_STR_SEL = 0: Stream ID = 0 for packets from this channel
|
||||
00 02 13 00 00 // Video transmit enable for Port X
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
max96722_dphy3_cam0: ov2311@31 {
|
||||
compatible = "maxim,ovti,ov2311";
|
||||
reg = <0x31>;
|
||||
|
||||
cam-i2c-addr-def = <0x30>;
|
||||
|
||||
cam-remote-ser = <&max96722_dphy3_ser0>; // remote serializer
|
||||
|
||||
poc-supply = <&max96722_dphy3_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <0>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "ov2311";
|
||||
rockchip,camera-module-lens-name = "ov2311";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96722_dphy3_cam0_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
|
||||
remote-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
00 01 04 00 00 // RX_RATE: 187.5Mbps, TX_RATE: 3Gbps
|
||||
00 11 03 00 00 // Coax Drive
|
||||
02 D6 03 00 00 // MFP8: GPIO_OUT_DIS = 1, GPIO_TX_EN = 1
|
||||
03 F0 51 00 00 // RCLK: 27MHz/24MHz (ALT),Enable reference-generation PLL, Enable pre-defined clock setting for reference-generation PLL
|
||||
00 03 07 00 00 // RCLK: Enable RCLK output from altermative MFP pin, RCLKOUT clock select reference PLL
|
||||
00 06 b1 00 00 // RCLK: GMSL2, Enable RCLK output, i2c selected
|
||||
02 C1 10 00 00 // MFP1: GPIO_OUT pin output is driven to 1 when GPIO_RX_EN = 0
|
||||
02 C2 60 00 00 // MFP1: OUT_TYPE = 1: Push-pull, PULL_UPDN_SEL[1:0] = 0b01: Pullup
|
||||
00 07 07 00 00 // Enable Parallel video input, Parallel HS and VS Enable
|
||||
00 10 05 00 00 // AUTO_LINK = 0, LINK_CFG = 1: LinkA is selected, REG_ENABLE = 1: Regulator enabled
|
||||
00 12 14 00 00 // REG_MNL = 1: Enable LDO on/off state controlled by REG_ENABLE
|
||||
01 00 62 00 00 // Video X, Line CRC enabled, ENC_MODE = 2: HS, VS, DE encoding on, color bits sent only when DE is high
|
||||
01 01 50 00 00 // Video X, BPP = 0x10
|
||||
00 53 10 00 00 // Video X, TX_STR_SEL = 0: Stream ID = 0 for packets from this channel
|
||||
00 02 13 00 00 // Video transmit enable for Port X
|
||||
];
|
||||
};
|
||||
};
|
||||
// Note: Serializer node defined before camera node
|
||||
max96722_dphy3_ser1: max9295@42 {
|
||||
compatible = "maxim,ser,max9295";
|
||||
reg = <0x42>;
|
||||
|
||||
serdes-remote-device-1 {
|
||||
compatible = "maxim4c,link1,max9295";
|
||||
status = "okay";
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
|
||||
remote-id = <1>; // Same as Link ID: 0/1/2/3
|
||||
ser-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// Serializer i2c 7bit address remap
|
||||
ser-i2c-addr-def = <0x40>;
|
||||
ser-i2c-addr-map = <0x42>; // 0: disable remap
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
00 01 04 00 00 // RX_RATE: 187.5Mbps, TX_RATE: 3Gbps
|
||||
00 11 03 00 00 // Coax Drive
|
||||
02 D6 03 00 00 // MFP8: GPIO_OUT_DIS = 1, GPIO_TX_EN = 1
|
||||
03 F0 51 00 00 // RCLK: 27MHz/24MHz (ALT),Enable reference-generation PLL, Enable pre-defined clock setting for reference-generation PLL
|
||||
00 03 07 00 00 // RCLK: Enable RCLK output from altermative MFP pin, RCLKOUT clock select reference PLL
|
||||
00 06 b1 00 00 // RCLK: GMSL2, Enable RCLK output, i2c selected
|
||||
02 C1 10 00 00 // MFP1: GPIO_OUT pin output is driven to 1 when GPIO_RX_EN = 0
|
||||
02 C2 60 00 00 // MFP1: OUT_TYPE = 1: Push-pull, PULL_UPDN_SEL[1:0] = 0b01: Pullup
|
||||
00 07 07 00 00 // Enable Parallel video input, Parallel HS and VS Enable
|
||||
00 10 05 00 00 // AUTO_LINK = 0, LINK_CFG = 1: LinkA is selected, REG_ENABLE = 1: Regulator enabled
|
||||
00 12 14 00 00 // REG_MNL = 1: Enable LDO on/off state controlled by REG_ENABLE
|
||||
01 00 62 00 00 // Video X, Line CRC enabled, ENC_MODE = 2: HS, VS, DE encoding on, color bits sent only when DE is high
|
||||
01 01 50 00 00 // Video X, BPP = 0x10
|
||||
00 53 10 00 00 // Video X, TX_STR_SEL = 0: Stream ID = 0 for packets from this channel
|
||||
00 02 13 00 00 // Video transmit enable for Port X
|
||||
];
|
||||
};
|
||||
};
|
||||
|
||||
port {
|
||||
max96722_dphy3_remote1_out: endpoint {
|
||||
remote-endpoint = <&max96722_dphy3_link1_in>;
|
||||
max96722_dphy3_cam1: ov2312@32 {
|
||||
compatible = "maxim,ovti,ov2312";
|
||||
reg = <0x32>;
|
||||
|
||||
cam-i2c-addr-def = <0x30>;
|
||||
|
||||
cam-remote-ser = <&max96722_dphy3_ser1>; // remote serializer
|
||||
|
||||
poc-supply = <&max96722_dphy3_poc_regulator>;
|
||||
|
||||
rockchip,camera-module-index = <1>;
|
||||
rockchip,camera-module-facing = "back";
|
||||
rockchip,camera-module-name = "ov2312";
|
||||
rockchip,camera-module-lens-name = "ov2312";
|
||||
|
||||
/* port config start */
|
||||
port {
|
||||
max96722_dphy3_cam1_out: endpoint {
|
||||
/* remote endpoint: rkcif_mipi_lvds_sditf_vir1 */
|
||||
//remote-endpoint = <&mipi_lvds_sditf_vir1_in>;
|
||||
data-lanes = <1 2 3 4>;
|
||||
};
|
||||
};
|
||||
/* port config end */
|
||||
};
|
||||
};
|
||||
|
||||
remote-init-sequence {
|
||||
seq-item-size = <5>; // reg-addr-len + reg-val-len * 2 + 1
|
||||
reg-addr-len = <2>; // 1: 8bits, 2: 16bits
|
||||
reg-val-len = <1>; // 1: 8bits, 2: 16bits, 3: 24bits
|
||||
|
||||
// reg_addr reg_val val_mask delay
|
||||
init-sequence = [
|
||||
00 01 04 00 00 // RX_RATE: 187.5Mbps, TX_RATE: 3Gbps
|
||||
00 11 03 00 00 // Coax Drive
|
||||
02 D6 03 00 00 // MFP8: GPIO_OUT_DIS = 1, GPIO_TX_EN = 1
|
||||
03 F0 51 00 00 // RCLK: 27MHz/24MHz (ALT),Enable reference-generation PLL, Enable pre-defined clock setting for reference-generation PLL
|
||||
00 03 07 00 00 // RCLK: Enable RCLK output from altermative MFP pin, RCLKOUT clock select reference PLL
|
||||
00 06 b1 00 00 // RCLK: GMSL2, Enable RCLK output, i2c selected
|
||||
02 C1 10 00 00 // MFP1: GPIO_OUT pin output is driven to 1 when GPIO_RX_EN = 0
|
||||
02 C2 60 00 00 // MFP1: OUT_TYPE = 1: Push-pull, PULL_UPDN_SEL[1:0] = 0b01: Pullup
|
||||
00 07 07 00 00 // Enable Parallel video input, Parallel HS and VS Enable
|
||||
00 10 05 00 00 // AUTO_LINK = 0, LINK_CFG = 1: LinkA is selected, REG_ENABLE = 1: Regulator enabled
|
||||
00 12 14 00 00 // REG_MNL = 1: Enable LDO on/off state controlled by REG_ENABLE
|
||||
01 00 62 00 00 // Video X, Line CRC enabled, ENC_MODE = 2: HS, VS, DE encoding on, color bits sent only when DE is high
|
||||
01 01 50 00 00 // Video X, BPP = 0x10
|
||||
00 53 10 00 00 // Video X, TX_STR_SEL = 0: Stream ID = 0 for packets from this channel
|
||||
00 02 13 00 00 // Video transmit enable for Port X
|
||||
];
|
||||
};
|
||||
};
|
||||
/* serdes remote device end */
|
||||
/* i2c-mux end */
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@@ -345,7 +345,7 @@
|
||||
vin-supply = <&vcc5v0_buck>;
|
||||
};
|
||||
|
||||
&max96712_dphy3_poc {
|
||||
&max96712_dphy3_poc_regulator {
|
||||
vin-supply = <&dphy3_vcc12v_buck>;
|
||||
};
|
||||
|
||||
|
||||
Reference in New Issue
Block a user