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KVM: x86: Move setting of sregs during vCPU RESET/INIT to common x86
Move the setting of CR0, CR4, EFER, RFLAGS, and RIP from vendor code to common x86. VMX and SVM now have near-identical sequences, the only difference being that VMX updates the exception bitmap. Updating the bitmap on SVM is unnecessary, but benign. Unfortunately it can't be left behind in VMX due to the need to update exception intercepts after the control registers are set. Reviewed-by: Reiji Watanabe <reijiw@google.com> Signed-off-by: Sean Christopherson <seanjc@google.com> Message-Id: <20210713163324.627647-37-seanjc@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
committed by
Paolo Bonzini
parent
c5c9f920f7
commit
f39e805ee1
@@ -1249,12 +1249,6 @@ static void init_vmcb(struct kvm_vcpu *vcpu)
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init_sys_seg(&save->ldtr, SEG_TYPE_LDT);
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init_sys_seg(&save->tr, SEG_TYPE_BUSY_TSS16);
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svm_set_cr0(vcpu, X86_CR0_NW | X86_CR0_CD | X86_CR0_ET);
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svm_set_cr4(vcpu, 0);
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svm_set_efer(vcpu, 0);
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kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
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vcpu->arch.regs[VCPU_REGS_RIP] = 0x0000fff0;
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if (npt_enabled) {
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/* Setup VMCB for Nested Paging */
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control->nested_ctl |= SVM_NESTED_CTL_NP_ENABLE;
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@@ -4455,9 +4455,6 @@ static void vmx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
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vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
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}
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kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
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kvm_rip_write(vcpu, 0xfff0);
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vmcs_writel(GUEST_GDTR_BASE, 0);
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vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
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@@ -4485,12 +4482,6 @@ static void vmx_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
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kvm_make_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu);
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vmx_set_cr0(vcpu, X86_CR0_NW | X86_CR0_CD | X86_CR0_ET);
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vmx_set_cr4(vcpu, 0);
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vmx_set_efer(vcpu, 0);
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vmx_update_exception_bitmap(vcpu);
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vpid_sync_context(vmx->vpid);
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if (init_event)
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vmx_clear_hlt(vcpu);
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@@ -10875,6 +10875,14 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
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static_call(kvm_x86_vcpu_reset)(vcpu, init_event);
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kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
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kvm_rip_write(vcpu, 0xfff0);
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static_call(kvm_x86_set_cr0)(vcpu, X86_CR0_NW | X86_CR0_CD | X86_CR0_ET);
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static_call(kvm_x86_set_cr4)(vcpu, 0);
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static_call(kvm_x86_set_efer)(vcpu, 0);
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static_call(kvm_x86_update_exception_bitmap)(vcpu);
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/*
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* Reset the MMU context if paging was enabled prior to INIT (which is
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* implied if CR0.PG=1 as CR0 will be '0' prior to RESET). Unlike the
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