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cvbs: cvbs bring up for g12a
PD#156734: cvbs bring up for g12a Change-Id: I8a69d85a921e78300db9ec96c2f93807f6f139b4 Signed-off-by: Nian Jing <nian.jing@amlogic.com>
This commit is contained in:
@@ -134,6 +134,35 @@
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};
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};
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vdac {
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compatible = "amlogic, vdac";
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dev_name = "vdac";
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status = "okay";
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};
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cvbsout {
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compatible = "amlogic, cvbsout-g12a";
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dev_name = "cvbsout";
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status = "okay";
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clocks = <&clkc CLKID_VCLK2_ENCI
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&clkc CLKID_VCLK2_VENCI0
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&clkc CLKID_VCLK2_VENCI1
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&clkc CLKID_DAC_CLK>;
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clock-names = "venci_top_gate",
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"venci_0_gate",
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"venci_1_gate",
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"vdac_clk_gate";
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/* performance: reg_address, reg_value */
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/* s905x */
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performance = <0x1bf0 0x9
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0x1b56 0x343
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0x1b12 0x8080
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0x1b05 0xfd
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0x1c59 0xf752
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0xffff 0x0>; /* ending flag */
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};
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sd_emmc_b:sd@ffe05000 {
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status = "okay";
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compatible = "amlogic, meson-mmc-g12a";
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@@ -136,6 +136,27 @@
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};
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};
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vdac {
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compatible = "amlogic, vdac";
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dev_name = "vdac";
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status = "okay";
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};
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cvbsout {
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compatible = "amlogic, cvbsout-g12a";
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dev_name = "cvbsout";
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status = "okay";
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/* performance: reg_address, reg_value */
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/* s905x */
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performance = <0x1bf0 0x9
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0x1b56 0x343
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0x1b12 0x8080
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0x1b05 0xfd
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0x1c59 0xf752
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0xffff 0x0>; /* ending flag */
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};
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bt-dev{
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compatible = "amlogic, bt-dev";
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dev_name = "bt-dev";
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@@ -33,4 +33,35 @@
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#define cvbs_log_dbg(fmt, ...) \
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pr_warn(fmt, ##__VA_ARGS__)
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ssize_t show_info(char *name, char *buf);
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inline ssize_t show_info(char *name, char *buf)
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{
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return snprintf(buf, 40, "%s\n", name);
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}
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#define STORE_INFO(name) \
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{mutex_lock(&cvbs_mutex); \
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snprintf(name, 40, "%s", buf); \
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mutex_unlock(&cvbs_mutex); }
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#define SET_CVBS_CLASS_ATTR(name, op) \
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static char name[40]; \
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static ssize_t aml_CVBS_attr_##name##_show(struct class *cla, \
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struct class_attribute *attr, char *buf) \
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{ \
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return show_info(name, buf); \
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} \
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static ssize_t aml_CVBS_attr_##name##_store(struct class *cla, \
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struct class_attribute *attr, \
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const char *buf, size_t count) \
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{ \
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STORE_INFO(name); \
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op(name); \
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return strnlen(buf, count); \
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} \
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struct class_attribute class_CVBS_attr_##name = \
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__ATTR(name, 0644, \
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aml_CVBS_attr_##name##_show, aml_CVBS_attr_##name##_store)
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#endif
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@@ -98,7 +98,13 @@ static struct vinfo_s cvbs_info[] = {
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static struct disp_module_info_s disp_module_info;
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static struct disp_module_info_s *info;
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static enum cvbs_mode_e local_cvbs_mode;
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static unsigned int vdac_cfg_valid;
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static unsigned int vdac_cfg_value;
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static DEFINE_MUTEX(setmode_mutex);
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static DEFINE_MUTEX(CC_mutex);
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static int cvbs_vdac_power_level;
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static void vdac_power_level_store(char *para);
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SET_CVBS_CLASS_ATTR(vdac_power_level, vdac_power_level_store);
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@@ -112,19 +118,12 @@ struct class_attribute class_CVBS_attr_wss = __ATTR(wss, 0644,
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aml_CVBS_attr_wss_show, aml_CVBS_attr_wss_store);
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#endif /*CONFIG_AMLOGIC_WSS*/
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static int cvbs_vdac_power_level;
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static DEFINE_MUTEX(setmode_mutex);
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static DEFINE_MUTEX(CC_mutex);
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static enum cvbs_mode_e local_cvbs_mode;
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static void cvbs_config_vdac(unsigned int flag, unsigned int cfg);
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static void cvbs_cntl_output(unsigned int open);
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static void cvbs_performance_config(unsigned int index);
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#ifdef CONFIG_CVBS_PERFORMANCE_COMPATIBILITY_SUPPORT
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static void cvbs_performance_enhancement(enum cvbs_mode_e mode);
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#endif
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static void cvbs_cntl_output(unsigned int open);
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static void cvbs_performance_config(unsigned int index);
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#if 0
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static int get_vdac_power_level(void)
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@@ -148,7 +147,12 @@ static int check_cpu_type(unsigned int cpu_type)
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* }
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*/
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static unsigned int vdac_cfg_valid = 0, vdac_cfg_value;
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int cvbs_cpu_type(void)
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{
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return info->cvbs_data->cpu_id;
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}
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EXPORT_SYMBOL(cvbs_cpu_type);
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static unsigned int cvbs_get_trimming_version(unsigned int flag)
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{
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unsigned int version = 0xff;
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@@ -798,6 +802,10 @@ static void cvbs_performance_regs_dump(void)
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HHI_VDAC_CNTL0,
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HHI_VDAC_CNTL1
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};
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unsigned int performance_regs_vdac_g12a[] = {
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HHI_VDAC_CNTL0_G12A,
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HHI_VDAC_CNTL1_G12A
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};
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int i, size;
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size = sizeof(performance_regs_enci)/sizeof(unsigned int);
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@@ -806,12 +814,19 @@ static void cvbs_performance_regs_dump(void)
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pr_info("vcbus [0x%x] = 0x%x\n", performance_regs_enci[i],
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cvbs_out_reg_read(performance_regs_enci[i]));
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}
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size = sizeof(performance_regs_vdac)/sizeof(unsigned int);
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if (cvbs_cpu_type() == CVBS_CPU_TYPE_G12A)
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size = sizeof(performance_regs_vdac_g12a)/sizeof(unsigned int);
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else
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size = sizeof(performance_regs_vdac)/sizeof(unsigned int);
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pr_info("------------------------\n");
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for (i = 0; i < size; i++) {
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pr_info("hiu [0x%x] = 0x%x\n", performance_regs_vdac[i],
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cvbs_out_hiu_read(performance_regs_vdac[i]));
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if (cvbs_cpu_type() == CVBS_CPU_TYPE_G12A)
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pr_info("hiu [0x%x] = 0x%x\n",
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performance_regs_vdac_g12a[i],
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cvbs_out_hiu_read(performance_regs_vdac_g12a[i]));
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else
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pr_info("hiu [0x%x] = 0x%x\n", performance_regs_vdac[i],
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cvbs_out_hiu_read(performance_regs_vdac[i]));
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}
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pr_info("------------------------\n");
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}
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@@ -1261,22 +1276,28 @@ static void cvbsout_clktree_remove(struct device *dev)
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#ifdef CONFIG_OF
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struct meson_cvbsout_data meson_gxl_cvbsout_data = {
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.cntl0_val = 0xb0001,
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.cpu_id = CPU_TYPE_GXL,
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.cpu_id = CVBS_CPU_TYPE_GXL,
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.name = "meson-gxl-cvbsout",
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};
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struct meson_cvbsout_data meson_gxm_cvbsout_data = {
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.cntl0_val = 0xb0001,
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.cpu_id = CPU_TYPE_GXM,
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.cpu_id = CVBS_CPU_TYPE_GXM,
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.name = "meson-gxm-cvbsout",
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};
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struct meson_cvbsout_data meson_txlx_cvbsout_data = {
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.cntl0_val = 0x620001,
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.cpu_id = CPU_TYPE_TXLX,
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.cpu_id = CVBS_CPU_TYPE_TXLX,
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.name = "meson-txlx-cvbsout",
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};
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struct meson_cvbsout_data meson_g12a_cvbsout_data = {
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.cntl0_val = 0x906001,
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.cpu_id = CVBS_CPU_TYPE_G12A,
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.name = "meson-g12a-cvbsout",
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};
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static const struct of_device_id meson_cvbsout_dt_match[] = {
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{
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.compatible = "amlogic, cvbsout-gxl",
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@@ -1287,6 +1308,9 @@ static const struct of_device_id meson_cvbsout_dt_match[] = {
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}, {
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.compatible = "amlogic, cvbsout-txlx",
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.data = &meson_txlx_cvbsout_data,
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}, {
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.compatible = "amlogic, cvbsout-g12a",
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.data = &meson_g12a_cvbsout_data,
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},
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{},
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};
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@@ -37,45 +37,17 @@
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#define print_info(fmt, args...) pr_info(fmt, ##args)
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ssize_t show_info(char *name, char *buf);
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inline ssize_t show_info(char *name, char *buf)
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{
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return snprintf(buf, 40, "%s\n", name);
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}
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#define STORE_INFO(name) \
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{mutex_lock(&cvbs_mutex);\
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snprintf(name, 40, "%s", buf) ;\
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mutex_unlock(&cvbs_mutex); }
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#define SET_CVBS_CLASS_ATTR(name, op) \
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static char name[40]; \
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static ssize_t aml_CVBS_attr_##name##_show(struct class *cla, \
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struct class_attribute *attr, char *buf) \
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{ \
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return show_info(name, buf); \
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} \
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static ssize_t aml_CVBS_attr_##name##_store(struct class *cla, \
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struct class_attribute *attr, \
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const char *buf, size_t count) \
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{ \
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STORE_INFO(name); \
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op(name); \
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return strnlen(buf, count); \
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} \
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struct class_attribute class_CVBS_attr_##name = \
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__ATTR(name, 0644, \
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aml_CVBS_attr_##name##_show, aml_CVBS_attr_##name##_store)
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struct reg_s {
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unsigned int reg;
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unsigned int val;
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};
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enum cvbs_cpu_type {
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CPU_TYPE_GXL = 0,
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CPU_TYPE_GXM = 1,
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CPU_TYPE_TXLX = 2,
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CVBS_CPU_TYPE_GXTVBB = 0,
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CVBS_CPU_TYPE_GXL = 1,
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CVBS_CPU_TYPE_GXM = 2,
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CVBS_CPU_TYPE_TXLX = 3,
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CVBS_CPU_TYPE_G12A = 4,
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};
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struct meson_cvbsout_data {
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@@ -122,4 +94,5 @@ struct cvbsregs_set_t {
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const struct reg_s *enc_reg_setting;
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};
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#endif
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@@ -114,6 +114,8 @@
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#define HHI_HDMI_PLL_CNTL4 0xcb
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#define HHI_HDMI_PLL_CNTL5 0xcc
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#define HHI_HDMI_PLL_CNTL6 0xcd
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/*G12A*/
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#define HHI_HDMI_PLL_CNTL7 0xce
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#define HHI_DSI_LVDS_EDP_CNTL0 0xd1
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#define HHI_DSI_LVDS_EDP_CNTL1 0xd2
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@@ -135,6 +137,8 @@
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#define HHI_VDAC_CNTL0 0xbd
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#define HHI_VDAC_CNTL1 0xbe
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#define HHI_VDAC_CNTL0_G12A 0xbb
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#define HHI_VDAC_CNTL1_G12A 0xbc
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/*********************************
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* HIU: GXBB
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@@ -26,16 +26,16 @@
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#include <linux/amlogic/iomap.h>
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/* Local Headers */
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#include "cvbs_out.h"
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#include "enc_clk_config.h"
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#include "cvbs_out_reg.h"
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#include "cvbs_log.h"
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static DEFINE_MUTEX(setclk_mutex);
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static int hpll_wait_lock(unsigned int reg, unsigned int lock_bit)
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{
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unsigned int pll_lock;
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int wait_loop = 200;
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int wait_loop = 2000;
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int ret = 0;
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do {
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@@ -61,22 +61,21 @@ static void disable_hpll_clk_out(void)
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cvbs_out_hiu_setb(HHI_VID_PLL_CLK_DIV, 0, 19, 1);
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/* close hpll */
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cvbs_out_hiu_setb(HHI_HDMI_PLL_CNTL, 0, 30, 1);
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if (cvbs_cpu_type() == CVBS_CPU_TYPE_G12A)
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cvbs_out_hiu_setb(HHI_HDMI_PLL_CNTL, 0, 28, 1);
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else
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cvbs_out_hiu_setb(HHI_HDMI_PLL_CNTL, 0, 30, 1);
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}
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void set_vmode_clk(void)
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{
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int ret;
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cvbs_log_info("set_vmode_clk start\n");
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pr_info("set_vmode_clk start\n");
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mutex_lock(&setclk_mutex);
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if (is_meson_gxbb_cpu() ||
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is_meson_gxtvbb_cpu()) {
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if (cvbs_cpu_type() == CVBS_CPU_TYPE_GXTVBB) {
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cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL, 0x5800023d);
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if (is_meson_gxbb_cpu())
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cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL2, 0x00404e00);
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else
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cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL2, 0x00404380);
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cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL2, 0x00404380);
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cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL3, 0x0d5c5091);
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cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL4, 0x801da72c);
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cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL5, 0x71486980);
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@@ -87,7 +86,22 @@ void set_vmode_clk(void)
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pr_info("[error]: hdmi_pll lock failed\n");
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cvbs_out_hiu_setb(HHI_VIID_CLK_CNTL, 0, VCLK2_EN, 1);
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udelay(5);
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} else if (cpu_after_eq(MESON_CPU_MAJOR_ID_GXL)) {
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} else if (cvbs_cpu_type() == CVBS_CPU_TYPE_G12A) {
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pr_info("config g12a hpll\n");
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cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL, 0x3b00047b);
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cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL2, 0x00018000);
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cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL3, 0x00000000);
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cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL4, 0x0a691c00);
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cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL5, 0x33771290);
|
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cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL6, 0x39270000);
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cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL7, 0x50540000);
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cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL, 0x1b00047b);
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ret = hpll_wait_lock(HHI_HDMI_PLL_CNTL, 31);
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if (ret)
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pr_info("[error]:hdmi_pll lock failed\n");
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msleep(100);
|
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cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL, 0x1b01047b);
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} else {
|
||||
cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL, 0x4000027b);
|
||||
cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL2, 0x800cb300);
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cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL3, 0xa6212844);
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@@ -99,10 +113,9 @@ void set_vmode_clk(void)
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ret = hpll_wait_lock(HHI_HDMI_PLL_CNTL, 31);
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if (ret)
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pr_info("[error]: hdmi_pll lock failed\n");
|
||||
} else {
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cvbs_log_err("Set clk.cpu_type unsupport.\n");
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||||
goto LAB_OUT;
|
||||
}
|
||||
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||||
/* divider: 1 */
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/* clk div */
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cvbs_out_hiu_setb(HHI_VID_PLL_CLK_DIV, 0, 19, 1);
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cvbs_out_hiu_setb(HHI_VID_PLL_CLK_DIV, 0, 15, 1);
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@@ -114,9 +127,11 @@ void set_vmode_clk(void)
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cvbs_out_hiu_setb(HHI_VIID_CLK_DIV, (55 - 1), VCLK2_XD, 8);
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udelay(5);
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/* Bit[18:16] - v2_cntl_clk_in_sel */
|
||||
cvbs_out_hiu_setb(HHI_VIID_CLK_CNTL, 4, VCLK2_CLK_IN_SEL, 3);
|
||||
/*before g12a set 4 and 0 all ok,after g12a must set 0*/
|
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cvbs_out_hiu_setb(HHI_VIID_CLK_CNTL, 0, VCLK2_CLK_IN_SEL, 3);
|
||||
cvbs_out_hiu_setb(HHI_VIID_CLK_CNTL, 1, VCLK2_EN, 1);
|
||||
udelay(2);
|
||||
/* vclk: 27M */
|
||||
/* [15:12] encl_clk_sel, select vclk2_div1 */
|
||||
cvbs_out_hiu_setb(HHI_VID_CLK_DIV, 8, 28, 4);
|
||||
cvbs_out_hiu_setb(HHI_VIID_CLK_DIV, 8, 28, 4);
|
||||
@@ -131,9 +146,8 @@ void set_vmode_clk(void)
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cvbs_out_hiu_setb(HHI_VID_CLK_CNTL2, 1, 0, 1);
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cvbs_out_hiu_setb(HHI_VID_CLK_CNTL2, 1, 4, 1);
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LAB_OUT:
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mutex_unlock(&setclk_mutex);
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cvbs_log_info("set_vmode_clk DONE\n");
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pr_info("set_vmode_clk DONE\n");
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}
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void disable_vmode_clk(void)
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@@ -20,5 +20,6 @@
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void set_vmode_clk(void);
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extern void disable_vmode_clk(void);
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extern int cvbs_cpu_type(void);
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#endif
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@@ -56,6 +56,8 @@ static struct mutex vdac_mutex;
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#define HHI_VDAC_CNTL0 0xbd
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#define HHI_VDAC_CNTL1 0xbe
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#define HHI_VDAC_CNTL0_G12A 0xbb
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#define HHI_VDAC_CNTL1_G12A 0xbc
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#define VDAC_MODULE_ATV_DEMOD 0x1
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#define VDAC_MODULE_DTV_DEMOD 0x2
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@@ -170,6 +172,8 @@ void ana_ref_cntl0_bit9(bool on, unsigned int module_sel)
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if (is_meson_txlx_cpu())
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vdac_hiu_reg_setb(HHI_VDAC_CNTL0, enable, 9, 1);
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else if (is_meson_g12a_cpu())
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vdac_hiu_reg_setb(HHI_VDAC_CNTL0_G12A, ~enable, 9, 1);
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else
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vdac_hiu_reg_setb(HHI_VDAC_CNTL0, ~enable, 9, 1);
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}
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@@ -182,6 +186,10 @@ void vdac_out_cntl0_bit10(bool on, unsigned int module_sel)
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{
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bool enable = 0;
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/*bit10 is for bandgap startup setting in g12a*/
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if (is_meson_g12a_cpu())
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return;
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switch (module_sel & 0xf) {
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case VDAC_MODULE_ATV_DEMOD: /* dtv demod */
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if (on)
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@@ -265,7 +273,10 @@ void vdac_out_cntl0_bit0(bool on, unsigned int module_sel)
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else
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enable = 1;
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vdac_hiu_reg_setb(HHI_VDAC_CNTL0, enable, 0, 1);
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if (is_meson_g12a_cpu())
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vdac_hiu_reg_setb(HHI_VDAC_CNTL0_G12A, enable, 0, 1);
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else
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vdac_hiu_reg_setb(HHI_VDAC_CNTL0, enable, 0, 1);
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}
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EXPORT_SYMBOL(vdac_out_cntl0_bit0);
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@@ -321,8 +332,13 @@ EXPORT_SYMBOL(vdac_out_cntl1_bit3);
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void vdac_set_ctrl0_ctrl1(unsigned int ctrl0, unsigned int ctrl1)
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{
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vdac_hiu_reg_write(HHI_VDAC_CNTL0, ctrl0);
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vdac_hiu_reg_write(HHI_VDAC_CNTL1, ctrl1);
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if (is_meson_g12a_cpu()) {
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vdac_hiu_reg_write(HHI_VDAC_CNTL0_G12A, ctrl0);
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vdac_hiu_reg_write(HHI_VDAC_CNTL1_G12A, ctrl1);
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} else {
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vdac_hiu_reg_write(HHI_VDAC_CNTL0, ctrl0);
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vdac_hiu_reg_write(HHI_VDAC_CNTL1, ctrl1);
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}
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}
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EXPORT_SYMBOL(vdac_set_ctrl0_ctrl1);
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@@ -339,6 +355,7 @@ void vdac_enable(bool on, unsigned int module_sel)
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if (on) {
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ana_ref_cntl0_bit9(1, VDAC_MODULE_ATV_DEMOD);
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/*after txlx need reset bandgap after bit9 enabled*/
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/*bit10 reset bandgap in g12a*/
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if (is_meson_txlx_cpu()) {
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vdac_hiu_reg_setb(HHI_VDAC_CNTL0, 1, 13, 1);
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udelay(5);
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@@ -351,7 +368,8 @@ void vdac_enable(bool on, unsigned int module_sel)
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/*Cdac pwd*/
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vdac_out_cntl1_bit3(1, VDAC_MODULE_ATV_DEMOD);
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/* enable AFE output buffer */
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vdac_hiu_reg_setb(HHI_VDAC_CNTL0, 0, 10, 1);
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if (!is_meson_g12a_cpu())
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vdac_hiu_reg_setb(HHI_VDAC_CNTL0, 0, 10, 1);
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vdac_out_cntl0_bit0(1, VDAC_MODULE_ATV_DEMOD);
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} else {
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ana_ref_cntl0_bit9(0, VDAC_MODULE_ATV_DEMOD);
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@@ -360,7 +378,8 @@ void vdac_enable(bool on, unsigned int module_sel)
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break;
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vdac_out_cntl0_bit0(0, VDAC_MODULE_ATV_DEMOD);
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/* Disable AFE output buffer */
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vdac_hiu_reg_setb(HHI_VDAC_CNTL0, 0, 10, 1);
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if (!is_meson_g12a_cpu())
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vdac_hiu_reg_setb(HHI_VDAC_CNTL0, 0, 10, 1);
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/* enable dac output */
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vdac_out_cntl1_bit3(0, 0x4);
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}
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@@ -429,7 +448,9 @@ void vdac_enable(bool on, unsigned int module_sel)
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pri_flag &= ~VDAC_MODULE_CVBS_OUT;
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if (pri_flag & VDAC_MODULE_ATV_DEMOD) {
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vdac_out_cntl1_bit3(1, VDAC_MODULE_ATV_DEMOD);
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vdac_hiu_reg_setb(HHI_VDAC_CNTL0, 0, 10, 1);
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if (!is_meson_g12a_cpu())
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vdac_hiu_reg_setb(HHI_VDAC_CNTL0,
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0, 10, 1);
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vdac_out_cntl0_bit0(1, VDAC_MODULE_ATV_DEMOD);
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} else if (pri_flag & VDAC_MODULE_TVAFE) {
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vdac_out_cntl1_bit3(0, VDAC_MODULE_TVAFE);
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Block a user