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thermal: rockchip: Support RK3506 SoC in the thermal driver

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Signed-off-by: Ye Zhang <ye.zhang@rock-chips.com>
Change-Id: I006c0fae994ffa00557a62b8da8355cefc96f53a
This commit is contained in:
Ye Zhang
2024-06-20 20:32:51 +08:00
committed by Tao Huang
parent 84fe01e06e
commit f492da7b07
1 changed files with 70 additions and 0 deletions
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70
drivers/thermal/rockchip_thermal.c
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@@ -274,8 +274,11 @@ struct rockchip_thermal_data {
#define TSADCV7_AUTO_PERIOD_HT_TIME 3000 /* 2.5ms */
#define TSADCV12_AUTO_PERIOD_TIME 3000 /* 2.5ms */
#define TSADCV12_AUTO_PERIOD_HT_TIME 3000 /* 2.5ms */
#define TSADCV13_AUTO_PERIOD_TIME 2500 /* 2.5ms */
#define TSADCV13_AUTO_PERIOD_HT_TIME 2500 /* 2.5ms */
#define TSADCV3_Q_MAX_VAL 0x7ff /* 11bit 2047 */
#define TSADCV12_Q_MAX_VAL 0xfff /* 12bit 4095 */
#define TSADCV13_Q_MAX_VAL 0x3ff /* 10bit 1023 */
#define TSADCV2_USER_INTER_PD_SOC 0x340 /* 13 clocks */
#define TSADCV5_USER_INTER_PD_SOC 0xfc0 /* 97us, at least 90us */
@@ -293,6 +296,8 @@ struct rockchip_thermal_data {
#define RK1808_BUS_GRF_SOC_CON0 0x0400
#define RK3506_GRF_TSADC_CON 0x10
#define RK3528_GRF_TSADC_CON 0x40030
#define RK3562_GRF_TSADC_CON 0x0580
@@ -644,6 +649,17 @@ static const struct tsadc_table rk3399_code_table[] = {
{TSADCV3_DATA_MASK, MAX_TEMP},
};
static const struct tsadc_table rk3506_code_table[] = {
{0, MIN_TEMP},
{362, MIN_TEMP},
{395, -40000},
{503, 25000},
{604, 85000},
{672, 125000},
{757, MAX_TEMP},
{TSADCV2_DATA_MASK, MAX_TEMP},
};
static const struct tsadc_table rk3528_code_table[] = {
{0, MIN_TEMP},
{1386, MIN_TEMP},
@@ -1213,6 +1229,33 @@ static void rk_tsadcv12_initialize(struct regmap *grf, void __iomem *regs,
}
}
static void rk_tsadcv13_initialize(struct regmap *grf, void __iomem *regs,
enum tshut_polarity tshut_polarity)
{
regmap_write(grf, RK3506_GRF_TSADC_CON, RV1106_VOGRF_TSADC_TSEN);
udelay(10);
regmap_write(grf, RK3506_GRF_TSADC_CON, RV1106_VOGRF_TSADC_ANA);
udelay(100);
writel_relaxed(TSADCV13_AUTO_PERIOD_TIME, regs + TSADCV3_AUTO_PERIOD);
writel_relaxed(TSADCV13_AUTO_PERIOD_TIME,
regs + TSADCV3_AUTO_PERIOD_HT);
writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
regs + TSADCV3_HIGHT_INT_DEBOUNCE);
writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
regs + TSADCV3_HIGHT_TSHUT_DEBOUNCE);
writel_relaxed(TSADCV13_Q_MAX_VAL, regs + TSADCV9_Q_MAX);
if (tshut_polarity == TSHUT_HIGH_ACTIVE)
writel_relaxed(TSADCV2_AUTO_TSHUT_POLARITY_HIGH |
TSADCV2_AUTO_TSHUT_POLARITY_MASK,
regs + TSADCV2_AUTO_CON);
else
writel_relaxed(TSADCV2_AUTO_TSHUT_POLARITY_MASK,
regs + TSADCV2_AUTO_CON);
writel_relaxed(TSADCV3_AUTO_Q_SEL_EN | TSADCV3_AUTO_Q_SEL_EN_MASK,
regs + TSADCV2_AUTO_CON);
}
static void rk_tsadcv2_irq_ack(void __iomem *regs)
{
u32 val;
@@ -1855,6 +1898,27 @@ static const struct rockchip_tsadc_chip rk3399_tsadc_data = {
},
};
static const struct rockchip_tsadc_chip rk3506_tsadc_data = {
.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
.chn_num = 1, /* seven channels for tsadc */
.tshut_mode = TSHUT_MODE_CRU, /* default TSHUT via CRU */
.tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
.tshut_temp = 95000,
.initialize = rk_tsadcv13_initialize,
.irq_ack = rk_tsadcv4_irq_ack,
.control = rk_tsadcv4_control,
.get_temp = rk_tsadcv4_get_temp,
.set_alarm_temp = rk_tsadcv3_alarm_temp,
.set_tshut_temp = rk_tsadcv3_tshut_temp,
.set_tshut_mode = rk_tsadcv4_tshut_mode,
.table = {
.id = rk3506_code_table,
.length = ARRAY_SIZE(rk3506_code_table),
.data_mask = TSADCV3_DATA_MASK,
.mode = ADC_INCREMENT,
},
};
static const struct rockchip_tsadc_chip rk3528_tsadc_data = {
.chn_id[SENSOR_CPU] = 0, /* cpu sensor is channel 0 */
.chn_num = 1, /* one channels for tsadc */
@@ -2057,6 +2121,12 @@ static const struct of_device_id of_rockchip_thermal_match[] = {
.data = (void *)&rk3399_tsadc_data,
},
#endif
#ifdef CONFIG_CPU_RK3506
{
.compatible = "rockchip,rk3506-tsadc",
.data = (void *)&rk3506_tsadc_data,
},
#endif
#ifdef CONFIG_CPU_RK3528
{
.compatible = "rockchip,rk3528-tsadc",