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dts: add axg dts file
PD#142470: add dts for axg pxp Change-Id: I0d5c77368b0583fcfa046f4c01ac936704e96434 Signed-off-by: Yun Cai <yun.cai@amlogic.com>
This commit is contained in:
@@ -13840,3 +13840,8 @@ F: include/linux/amlogic/media/amvecm/*
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AMLOGIC GXL ADD SKT DTS
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M: Yun Cai <yun.cai@amlogic.com>
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F: arch/arm64/boot/dts/amlogic/gxl_skt.dts
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AMLOGIC AXG ADD PXP DTS
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M: Yun Cai <yun.cai@amlogic.com>
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F: arch/arm64/boot/dts/amlogic/axg_pxp.dts
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F: arch/arm64/boot/dts/amlogic/mesonaxg.dtsi
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79
arch/arm64/boot/dts/amlogic/axg_pxp.dts
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79
arch/arm64/boot/dts/amlogic/axg_pxp.dts
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@@ -0,0 +1,79 @@
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/*
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* arch/arm64/boot/dts/amlogic/axg_pxp.dts
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*
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* Copyright (C) 2017 Amlogic, Inc. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*/
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/dts-v1/;
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#include "mesonaxg.dtsi"
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/ {
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model = "Amlogic";
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compatible = "amlogic, axg";
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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aliases {
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serial0 = &uart_AO;
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};
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memory@00000000 {
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device_type = "memory";
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linux,usable-memory = <0x0 0x100000 0x0 0x3ff00000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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/* global autoconfigured region for contiguous allocations */
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secmon_reserved:linux,secmon {
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compatible = "amlogic, aml_secmon_memory";
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reg = <0x0 0x10000000 0x0 0x200000>;
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no-map;
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};
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secos_reserved:linux,secos {
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status = "disable";
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compatible = "amlogic, aml_secos_memory";
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reg = <0x0 0x05300000 0x0 0x2000000>;
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no-map;
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};
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pstore:aml_pstore {
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compatible = "amlogic, pstore";
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reg = <0x0 0x07300000 0x0 0x100000>;
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no-map;
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};
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};
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uart_AO: serial@ff803000 {
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compatible = "amlogic, meson-uart";
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reg = <0x0 0xff803000 0x0 0x18>;
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interrupts = <0 193 1>;
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status = "okay";
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clocks = <&xtal>;
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clock-names = "clk_uart";
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xtal_tick_en = <1>;
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fifosize = < 64 >;
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// pinctrl-names = "default";
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// pinctrl-0 = <&uart_ao_a_pins>;
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support-sysrq = <0>; /* 0 not support , 1 support */
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};
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}; /* end of / */
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149
arch/arm64/boot/dts/amlogic/mesonaxg.dtsi
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149
arch/arm64/boot/dts/amlogic/mesonaxg.dtsi
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@@ -0,0 +1,149 @@
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/*
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* arch/arm64/boot/dts/amlogic/mesonaxg.dtsi
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*
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* Copyright (C) 2017 Amlogic, Inc. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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cpus:cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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#cooling-cells = <2>; /* min followed by max */
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cpu0:cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53","arm,armv8";
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reg = <0x0 0x0>;
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enable-method = "psci";
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};
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cpu1:cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a53","arm,armv8";
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reg = <0x0 0x1>;
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enable-method = "psci";
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};
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cpu2:cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a53","arm,armv8";
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reg = <0x0 0x2>;
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enable-method = "psci";
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};
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cpu3:cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a53","arm,armv8";
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reg = <0x0 0x3>;
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enable-method = "psci";
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13 0xff01>,
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<GIC_PPI 14 0xff01>,
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<GIC_PPI 11 0xff01>,
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<GIC_PPI 10 0xff01>;
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};
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timer_bc {
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compatible = "arm, meson-bc-timer";
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reg= <0x0 0xffd0f190 0x0 0x4 0x0 0xffd0f194 0x0 0x4>;
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timer_name = "Meson TimerF";
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clockevent-rating=<300>;
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clockevent-shift=<20>;
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clockevent-features=<0x23>;
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interrupts = <0 60 1>;
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bit_enable=<16>;
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bit_mode=<12>;
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bit_resolution=<0>;
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};
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arm_pmu {
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compatible = "arm,armv8-pmuv3";
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interrupts = <0 137 4>,
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<0 138 4>,
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<0 153 4>,
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<0 154 4>;
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};
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gic: interrupt-controller@2c001000 {
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compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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reg = <0x0 0xffc01000 0 0x1000>,
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<0x0 0xffc02000 0 0x0100>;
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interrupts = <GIC_PPI 9 0xf04>;
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};
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psci {
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compatible = "arm,psci";
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method = "smc";
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};
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secmon {
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compatible = "amlogic, secmon";
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memory-region = <&secmon_reserved>;
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in_base_func = <0x82000020>;
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out_base_func = <0x82000021>;
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};
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cpu_iomap {
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compatible = "amlogic, iomap";
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#address-cells=<2>;
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#size-cells=<2>;
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ranges;
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io_cbus_base {
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reg = <0x0 0xffd00000 0x0 0x100000>;
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};
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io_apb_base {
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reg = <0x0 0xffe00000 0x0 0x100000>;
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};
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io_aobus_base {
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reg = <0x0 0xff800000 0x0 0x100000>;
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};
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io_vapb_base {
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reg = <0x0 0xff900000 0x0 0x050000>;
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};
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};
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xtal: xtal-clk {
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compatible = "fixed-clock";
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clock-frequency = <24000000>;
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clock-output-names = "xtal";
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#clock-cells = <0>;
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};
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cpu_info {
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compatible = "amlogic, cpuinfo";
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status = "okay";
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cpuinfo_cmd = <0x82000044>;
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};
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cpu_version {
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reg=<0x0 0xff800220 0x0 0x4>;
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};
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meson_clk_msr {
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compatible = "amlogic, gxl_measure";
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reg = <0x0 0xffd18004 0x0 0x4
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0x0 0xffd1800c 0x0 0x4>;
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};
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};/* end of / */
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2
scripts/amlogic/mk_dtb_gx.sh
Normal file → Executable file
2
scripts/amlogic/mk_dtb_gx.sh
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@@ -15,3 +15,5 @@ make ARCH=arm64 gxl_p400_2g.dtb || echo "Compile dtb Fail !!"
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make ARCH=arm64 gxl_p401_2g.dtb || echo "Compile dtb Fail !!"
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make ARCH=arm64 gxl_skt.dtb || echo "Compile dtb Fail !!"
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make ARCH=arm64 axg_pxp.dtb || echo "Compile dtb Fail !!"
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