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cvbsout: add NTSC performance support [2/2]

Browse Source 
PD#SWPL-17248

Problem:
don't support NTSC performance

Solution:
1.add NTSC performance support
2.fix cvbsout set mode mistake for viu_mux

Verify:
u212

Change-Id: Ib2315d6403bb526785d3398fc8d7b6bf60dd5a7b
Signed-off-by: qiang.liu <qiang.liu@amlogic.com>
This commit is contained in:
qiang.liu
2019-12-20 17:55:58 +08:00
committed by Chris
parent ffb2a5cb24
commit f5b01375bf
9 changed files with 440 additions and 376 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
arch/arm/boot/dts/amlogic/g12a_s905x2_u212.dts
View File

@@ -206,12 +206,21 @@
/* performance: reg_address, reg_value */
/* g12a */
performance = <0x1bf0 0x9
performance_pal = <0x1bf0 0x9
0x1b56 0x333
0x1b12 0x8080
0x1b05 0xfd
0x1c59 0xf850
0xffff 0x0>; /* ending flag */
performance_ntsc = <0x1bf0 0x9
0x1b56 0x333
0x1b12 0x9c00
0x1b03 0x1
0x1b04 0x5
0x1b05 0xfc
0x1b06 0x8
0x1c59 0xfc48
0xffff 0x0>; /* ending flag */
performance_sarft = <0x1bf0 0x9
0x1b56 0x333
0x1b12 0x0

11
arch/arm64/boot/dts/amlogic/g12a_s905x2_u212.dts
View File

@@ -206,12 +206,21 @@
/* performance: reg_address, reg_value */
/* g12a */
performance = <0x1bf0 0x9
performance_pal = <0x1bf0 0x9
0x1b56 0x333
0x1b12 0x8080
0x1b05 0xfd
0x1c59 0xf850
0xffff 0x0>; /* ending flag */
performance_ntsc = <0x1bf0 0x9
0x1b56 0x333
0x1b12 0x9c00
0x1b03 0x1
0x1b04 0x5
0x1b05 0xfc
0x1b06 0x8
0x1c59 0xfc48
0xffff 0x0>; /* ending flag */
performance_sarft = <0x1bf0 0x9
0x1b56 0x333
0x1b12 0x0

2
arch/arm64/boot/dts/amlogic/sm1_s905d3_ac200.dts
View File

@@ -192,7 +192,7 @@
/* performance: reg_address, reg_value */
/* sm1 */
performance = <0x1bf0 0x9
performance_pal = <0x1bf0 0x9
0x1b56 0x333
0x1b12 0x8080
0x1b05 0xfd

711
drivers/amlogic/media/vout/cvbs/cvbs_out.c
View File

File diff suppressed because it is too large Load Diff

30
drivers/amlogic/media/vout/cvbs/cvbs_out.h
View File

@@ -37,23 +37,20 @@
#define VOUT_IOC_CC_CLOSE _IO(_TM_V, 0x02)
#define VOUT_IOC_CC_DATA _IOW(_TM_V, 0x03, struct vout_CCparm_s)
#define print_info(fmt, args...) pr_info(fmt, ##args)
struct reg_s {
unsigned int reg;
unsigned int val;
};
enum cvbs_cpu_type {
CVBS_CPU_TYPE_GXTVBB = 0,
CVBS_CPU_TYPE_GXL = 1,
CVBS_CPU_TYPE_GXM = 2,
CVBS_CPU_TYPE_TXLX = 3,
CVBS_CPU_TYPE_G12A = 4,
CVBS_CPU_TYPE_G12B = 5,
CVBS_CPU_TYPE_TL1 = 6,
CVBS_CPU_TYPE_SM1 = 7,
CVBS_CPU_TYPE_TM2 = 8,
CVBS_CPU_TYPE_GXL = 0,
CVBS_CPU_TYPE_GXM = 1,
CVBS_CPU_TYPE_TXLX = 2,
CVBS_CPU_TYPE_G12A = 3,
CVBS_CPU_TYPE_G12B = 4,
CVBS_CPU_TYPE_TL1 = 5,
CVBS_CPU_TYPE_SM1 = 6,
CVBS_CPU_TYPE_TM2 = 7,
};
struct meson_cvbsout_data {
@@ -63,19 +60,20 @@ struct meson_cvbsout_data {
};
#define CVBS_PERFORMANCE_CNT_MAX 20
struct cvbs_config_s {
unsigned int performance_reg_cnt;
struct reg_s *performance_reg_table;
struct performance_config_s {
unsigned int reg_cnt;
struct reg_s *reg_table;
};
struct disp_module_info_s {
struct cvbs_drv_s {
struct vinfo_s *vinfo;
struct cdev *cdev;
dev_t devno;
struct class *base_class;
struct device *dev;
struct meson_cvbsout_data *cvbs_data;
struct cvbs_config_s cvbs_conf;
struct performance_config_s perf_conf_pal;
struct performance_config_s perf_conf_ntsc;
struct delayed_work dv_dwork;
bool dwork_flag;

16
drivers/amlogic/media/vout/cvbs/enc_clk_config.c
View File

@@ -174,21 +174,7 @@ void set_vmode_clk(void)
pr_info("set_vmode_clk start\n");
mutex_lock(&setclk_mutex);
if (cvbs_cpu_type() == CVBS_CPU_TYPE_GXTVBB) {
pr_info("config gxtvbb hdmi pll\n");
cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL, 0x5800023d);
cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL2, 0x00404380);
cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL3, 0x0d5c5091);
cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL4, 0x801da72c);
cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL5, 0x71486980);
cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL6, 0x00000e55);
cvbs_out_hiu_write(HHI_HDMI_PLL_CNTL, 0x4800023d);
ret = pll_wait_lock(HHI_HDMI_PLL_CNTL, 31);
if (ret)
pr_info("[error]: hdmi_pll lock failed\n");
cvbs_out_hiu_setb(HHI_VIID_CLK_CNTL, 0, VCLK2_EN, 1);
udelay(5);
} else if (cvbs_cpu_type() == CVBS_CPU_TYPE_G12A ||
if (cvbs_cpu_type() == CVBS_CPU_TYPE_G12A ||
cvbs_cpu_type() == CVBS_CPU_TYPE_G12B ||
cvbs_cpu_type() == CVBS_CPU_TYPE_SM1) {
if (cvbs_clk_path & 0x1) {

17
drivers/amlogic/media/vout/vdac/vdac_dev.c
View File

@@ -461,6 +461,23 @@ void vdac_set_ctrl0_ctrl1(unsigned int ctrl0, unsigned int ctrl1)
}
}
unsigned int vdac_get_reg_addr(unsigned int index)
{
unsigned int reg;
if (!s_vdac_data) {
pr_err("\n%s: s_vdac_data NULL\n", __func__);
return 0xffffffff;
}
if (index)
reg = s_vdac_data->reg_cntl1;
else
reg = s_vdac_data->reg_cntl0;
return reg;
}
int vdac_enable_check_dtv(void)
{
return (pri_flag & VDAC_MODULE_DTV_DEMOD) ? 1 : 0;

17
drivers/amlogic/media/vout/vout_serve/vout_func.c
View File

@@ -198,6 +198,14 @@ void vout_func_update_viu(int index)
}
p_server = p_module->curr_vout_server;
#if 0
VOUTPR("%s: before: 0x%04x=0x%08x, 0x%04x=0x%08x\n",
__func__, VPU_VIU_VENC_MUX_CTRL,
vout_vcbus_read(VPU_VIU_VENC_MUX_CTRL),
VPU_VENCX_CLK_CTRL,
vout_vcbus_read(VPU_VENCX_CLK_CTRL));
#endif
if (p_server) {
if (p_server->op.get_vinfo)
vinfo = p_server->op.get_vinfo();
@@ -228,8 +236,13 @@ void vout_func_update_viu(int index)
vout_vcbus_setb(VPU_VENCX_CLK_CTRL, clk_sel, clk_bit, 1);
#if 0
VOUTPR("%s: %d, mux_sel=%d, clk_sel=%d\n",
__func__, index, mux_sel, clk_sel);
VOUTPR("%s: %d, mux_sel=%d, mux_bit=%d, clk_sel=%d clk_bit=%d\n",
__func__, index, mux_sel, mux_bit, clk_sel, clk_bit);
VOUTPR("%s: after: 0x%04x=0x%08x, 0x%04x=0x%08x\n",
__func__, VPU_VIU_VENC_MUX_CTRL,
vout_vcbus_read(VPU_VIU_VENC_MUX_CTRL),
VPU_VENCX_CLK_CTRL,
vout_vcbus_read(VPU_VENCX_CLK_CTRL));
#endif
mutex_unlock(&vout_mutex);
}

1
include/linux/amlogic/media/vout/vdac_dev.h
View File

@@ -26,6 +26,7 @@
#define VDAC_MODULE_AUDIO_OUT (1 << 4) /*0x10*/
extern void vdac_set_ctrl0_ctrl1(unsigned int ctrl0, unsigned int ctrl1);
unsigned int vdac_get_reg_addr(unsigned int index);
extern void vdac_enable(bool on, unsigned int module_sel);
extern int vdac_enable_check_dtv(void);
extern int vdac_enable_check_cvbs(void);