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UPSTREAM: phy: rockchip-inno-usb2: add support for rockchip,usbgrf property
The registers of usb-phy are distributed in grf and usbgrf on some
Rockchip SoCs (e.g RV1108), this patch add a new rockchip,usbgrf
property to support this companion grf design.
Change-Id: If66c03426d4ad63b285fa7132ae20ee10be1d627
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from commit 1543645c31)
This commit is contained in:
@@ -263,6 +263,7 @@ struct rockchip_usb2phy_port {
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/**
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* struct rockchip_usb2phy: usb2.0 phy driver data.
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* @grf: General Register Files regmap.
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* @usbgrf: USB General Register Files regmap.
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* @clk: clock struct of phy input clk.
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* @clk480m: clock struct of phy output clk.
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* @clk_hw: clock struct of phy output clk management.
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@@ -278,6 +279,7 @@ struct rockchip_usb2phy_port {
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struct rockchip_usb2phy {
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struct device *dev;
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struct regmap *grf;
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struct regmap *usbgrf;
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struct clk *clk;
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struct clk *clk480m;
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struct clk_hw clk480m_hw;
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@@ -291,7 +293,12 @@ struct rockchip_usb2phy {
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struct rockchip_usb2phy_port ports[USB2PHY_NUM_PORTS];
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};
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static inline int property_enable(struct rockchip_usb2phy *rphy,
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static inline struct regmap *get_reg_base(struct rockchip_usb2phy *rphy)
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{
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return rphy->usbgrf == NULL ? rphy->grf : rphy->usbgrf;
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}
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static inline int property_enable(struct regmap *base,
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const struct usb2phy_reg *reg, bool en)
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{
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unsigned int val, mask, tmp;
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@@ -300,17 +307,17 @@ static inline int property_enable(struct rockchip_usb2phy *rphy,
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mask = GENMASK(reg->bitend, reg->bitstart);
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val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT);
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return regmap_write(rphy->grf, reg->offset, val);
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return regmap_write(base, reg->offset, val);
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}
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static inline bool property_enabled(struct rockchip_usb2phy *rphy,
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static inline bool property_enabled(struct regmap *base,
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const struct usb2phy_reg *reg)
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{
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int ret;
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unsigned int tmp, orig;
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unsigned int mask = GENMASK(reg->bitend, reg->bitstart);
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ret = regmap_read(rphy->grf, reg->offset, &orig);
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ret = regmap_read(base, reg->offset, &orig);
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if (ret)
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return false;
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@@ -322,11 +329,12 @@ static int rockchip_usb2phy_clk480m_prepare(struct clk_hw *hw)
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{
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struct rockchip_usb2phy *rphy =
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container_of(hw, struct rockchip_usb2phy, clk480m_hw);
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struct regmap *base = get_reg_base(rphy);
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int ret;
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/* turn on 480m clk output if it is off */
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if (!property_enabled(rphy, &rphy->phy_cfg->clkout_ctl)) {
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ret = property_enable(rphy, &rphy->phy_cfg->clkout_ctl, true);
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if (!property_enabled(base, &rphy->phy_cfg->clkout_ctl)) {
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ret = property_enable(base, &rphy->phy_cfg->clkout_ctl, true);
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if (ret)
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return ret;
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@@ -341,17 +349,19 @@ static void rockchip_usb2phy_clk480m_unprepare(struct clk_hw *hw)
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{
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struct rockchip_usb2phy *rphy =
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container_of(hw, struct rockchip_usb2phy, clk480m_hw);
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struct regmap *base = get_reg_base(rphy);
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/* turn off 480m clk output */
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property_enable(rphy, &rphy->phy_cfg->clkout_ctl, false);
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property_enable(base, &rphy->phy_cfg->clkout_ctl, false);
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}
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static int rockchip_usb2phy_clk480m_prepared(struct clk_hw *hw)
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{
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struct rockchip_usb2phy *rphy =
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container_of(hw, struct rockchip_usb2phy, clk480m_hw);
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struct regmap *base = get_reg_base(rphy);
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return property_enabled(rphy, &rphy->phy_cfg->clkout_ctl);
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return property_enabled(base, &rphy->phy_cfg->clkout_ctl);
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}
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static unsigned long
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@@ -470,19 +480,19 @@ static int rockchip_usb2phy_enable_id_irq(struct rockchip_usb2phy *rphy,
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{
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int ret;
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ret = property_enable(rphy, &rport->port_cfg->idfall_det_clr, true);
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ret = property_enable(rphy->grf, &rport->port_cfg->idfall_det_clr, true);
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if (ret)
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goto out;
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ret = property_enable(rphy, &rport->port_cfg->idfall_det_en, en);
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ret = property_enable(rphy->grf, &rport->port_cfg->idfall_det_en, en);
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if (ret)
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goto out;
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ret = property_enable(rphy, &rport->port_cfg->idrise_det_clr, true);
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ret = property_enable(rphy->grf, &rport->port_cfg->idrise_det_clr, true);
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if (ret)
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goto out;
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ret = property_enable(rphy, &rport->port_cfg->idrise_det_en, en);
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ret = property_enable(rphy->grf, &rport->port_cfg->idrise_det_en, en);
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out:
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return ret;
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}
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@@ -494,11 +504,11 @@ static int rockchip_usb2phy_enable_vbus_irq(struct rockchip_usb2phy *rphy,
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{
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int ret;
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ret = property_enable(rphy, &rport->port_cfg->bvalid_det_clr, true);
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ret = property_enable(rphy->grf, &rport->port_cfg->bvalid_det_clr, true);
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if (ret)
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goto out;
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ret = property_enable(rphy, &rport->port_cfg->bvalid_det_en, en);
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ret = property_enable(rphy->grf, &rport->port_cfg->bvalid_det_en, en);
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out:
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return ret;
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}
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@@ -509,11 +519,11 @@ static int rockchip_usb2phy_enable_line_irq(struct rockchip_usb2phy *rphy,
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{
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int ret;
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ret = property_enable(rphy, &rport->port_cfg->ls_det_clr, true);
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ret = property_enable(rphy->grf, &rport->port_cfg->ls_det_clr, true);
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if (ret)
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goto out;
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ret = property_enable(rphy, &rport->port_cfg->ls_det_en, en);
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ret = property_enable(rphy->grf, &rport->port_cfg->ls_det_en, en);
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out:
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return ret;
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}
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@@ -523,11 +533,12 @@ static int rockchip_usb_bypass_uart(struct rockchip_usb2phy_port *rport,
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{
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struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
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const struct usb2phy_reg *iomux = &rport->port_cfg->bypass_iomux;
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struct regmap *base = get_reg_base(rphy);
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int ret = 0;
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mutex_lock(&rport->mutex);
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if (en == property_enabled(rphy, &rport->port_cfg->bypass_sel)) {
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if (en == property_enabled(base, &rport->port_cfg->bypass_sel)) {
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dev_info(&rport->phy->dev,
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"bypass uart %s is already set\n", en ? "on" : "off");
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goto unlock;
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@@ -547,24 +558,24 @@ static int rockchip_usb_bypass_uart(struct rockchip_usb2phy_port *rport,
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* set phy in non-driving mode, it will cause UART to print
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* random codes. So just put USB PHY in normal mode.
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*/
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ret |= property_enable(rphy, &rport->port_cfg->bypass_sel,
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ret |= property_enable(base, &rport->port_cfg->bypass_sel,
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true);
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ret |= property_enable(rphy, &rport->port_cfg->bypass_dm_en,
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ret |= property_enable(base, &rport->port_cfg->bypass_dm_en,
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true);
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/* Some platforms required to set iomux of bypass uart */
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if (iomux->offset)
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ret |= property_enable(rphy, iomux, true);
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ret |= property_enable(rphy->grf, iomux, true);
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} else {
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/* just disable bypass, and resume phy in phy power_on later */
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ret |= property_enable(rphy, &rport->port_cfg->bypass_sel,
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ret |= property_enable(base, &rport->port_cfg->bypass_sel,
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false);
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ret |= property_enable(rphy, &rport->port_cfg->bypass_dm_en,
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ret |= property_enable(base, &rport->port_cfg->bypass_dm_en,
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false);
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/* Some platforms required to set iomux of bypass uart */
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if (iomux->offset)
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ret |= property_enable(rphy, iomux, false);
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ret |= property_enable(rphy->grf, iomux, false);
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}
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unlock:
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@@ -584,12 +595,12 @@ static void rockchip_usb_bypass_uart_work(struct work_struct *work)
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mutex_lock(&rport->mutex);
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iddig = property_enabled(rphy, &rport->port_cfg->utmi_iddig);
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iddig = property_enabled(rphy->grf, &rport->port_cfg->utmi_iddig);
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if (rport->utmi_avalid)
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vbus = property_enabled(rphy, &rport->port_cfg->utmi_avalid);
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vbus = property_enabled(rphy->grf, &rport->port_cfg->utmi_avalid);
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else
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vbus = property_enabled(rphy, &rport->port_cfg->utmi_bvalid);
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vbus = property_enabled(rphy->grf, &rport->port_cfg->utmi_bvalid);
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mutex_unlock(&rport->mutex);
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@@ -661,6 +672,7 @@ static int rockchip_usb2phy_power_on(struct phy *phy)
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{
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struct rockchip_usb2phy_port *rport = phy_get_drvdata(phy);
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struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent);
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struct regmap *base = get_reg_base(rphy);
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int ret;
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dev_dbg(&rport->phy->dev, "port power on\n");
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@@ -685,7 +697,7 @@ static int rockchip_usb2phy_power_on(struct phy *phy)
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if (ret)
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goto unlock;
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ret = property_enable(rphy, &rport->port_cfg->phy_sus, false);
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ret = property_enable(base, &rport->port_cfg->phy_sus, false);
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if (ret)
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goto unlock;
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@@ -709,6 +721,7 @@ static int rockchip_usb2phy_power_off(struct phy *phy)
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{
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struct rockchip_usb2phy_port *rport = phy_get_drvdata(phy);
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struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent);
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struct regmap *base = get_reg_base(rphy);
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int ret;
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dev_dbg(&rport->phy->dev, "port power off\n");
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@@ -720,7 +733,7 @@ static int rockchip_usb2phy_power_off(struct phy *phy)
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goto unlock;
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}
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ret = property_enable(rphy, &rport->port_cfg->phy_sus, true);
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ret = property_enable(base, &rport->port_cfg->phy_sus, true);
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if (ret)
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goto unlock;
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@@ -816,7 +829,7 @@ static int rockchip_usb2phy_set_mode(struct phy *phy, enum phy_mode mode)
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return ret;
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}
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ret = property_enable(rphy, &rport->port_cfg->vbus_det_en, vbus_det_en);
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ret = property_enable(rphy->grf, &rport->port_cfg->vbus_det_en, vbus_det_en);
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return ret;
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}
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@@ -873,6 +886,7 @@ static ssize_t otg_mode_store(struct device *device,
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{
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struct rockchip_usb2phy *rphy = dev_get_drvdata(device);
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struct rockchip_usb2phy_port *rport = NULL;
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struct regmap *base = get_reg_base(rphy);
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enum usb_dr_mode new_dr_mode;
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unsigned int index;
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int rc = count;
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@@ -918,18 +932,18 @@ static ssize_t otg_mode_store(struct device *device,
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switch (rport->mode) {
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case USB_DR_MODE_HOST:
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rockchip_usb2phy_set_mode(rport->phy, PHY_MODE_USB_HOST);
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property_enable(rphy, &rport->port_cfg->iddig_output, false);
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property_enable(rphy, &rport->port_cfg->iddig_en, true);
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property_enable(base, &rport->port_cfg->iddig_output, false);
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property_enable(base, &rport->port_cfg->iddig_en, true);
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break;
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case USB_DR_MODE_PERIPHERAL:
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rockchip_usb2phy_set_mode(rport->phy, PHY_MODE_USB_DEVICE);
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property_enable(rphy, &rport->port_cfg->iddig_output, true);
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property_enable(rphy, &rport->port_cfg->iddig_en, true);
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property_enable(base, &rport->port_cfg->iddig_output, true);
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property_enable(base, &rport->port_cfg->iddig_en, true);
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break;
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case USB_DR_MODE_OTG:
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rockchip_usb2phy_set_mode(rport->phy, PHY_MODE_USB_OTG);
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property_enable(rphy, &rport->port_cfg->iddig_output, false);
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property_enable(rphy, &rport->port_cfg->iddig_en, false);
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property_enable(base, &rport->port_cfg->iddig_output, false);
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property_enable(base, &rport->port_cfg->iddig_en, false);
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break;
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default:
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break;
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@@ -968,10 +982,10 @@ static void rockchip_usb2phy_otg_sm_work(struct work_struct *work)
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if (rport->utmi_avalid)
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rport->vbus_attached =
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property_enabled(rphy, &rport->port_cfg->utmi_avalid);
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property_enabled(rphy->grf, &rport->port_cfg->utmi_avalid);
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else
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rport->vbus_attached =
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property_enabled(rphy, &rport->port_cfg->utmi_bvalid);
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property_enabled(rphy->grf, &rport->port_cfg->utmi_bvalid);
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sch_work = false;
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delay = OTG_SCHEDULE_DELAY;
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@@ -1009,8 +1023,7 @@ static void rockchip_usb2phy_otg_sm_work(struct work_struct *work)
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case USB_CHG_STATE_DETECTED:
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switch (rphy->chg_type) {
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case POWER_SUPPLY_TYPE_USB:
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dev_dbg(&rport->phy->dev,
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"sdp cable is connecetd\n");
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dev_dbg(&rport->phy->dev, "sdp cable is connected\n");
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wake_lock(&rport->wakelock);
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cable = EXTCON_CHG_USB_SDP;
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mutex_unlock(&rport->mutex);
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@@ -1021,14 +1034,12 @@ static void rockchip_usb2phy_otg_sm_work(struct work_struct *work)
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sch_work = true;
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break;
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case POWER_SUPPLY_TYPE_USB_DCP:
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dev_dbg(&rport->phy->dev,
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"dcp cable is connecetd\n");
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dev_dbg(&rport->phy->dev, "dcp cable is connected\n");
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cable = EXTCON_CHG_USB_DCP;
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sch_work = true;
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break;
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case POWER_SUPPLY_TYPE_USB_CDP:
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dev_dbg(&rport->phy->dev,
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"cdp cable is connecetd\n");
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dev_dbg(&rport->phy->dev, "cdp cable is connected\n");
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wake_lock(&rport->wakelock);
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cable = EXTCON_CHG_USB_CDP;
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mutex_unlock(&rport->mutex);
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@@ -1145,22 +1156,28 @@ static const char *chg_to_string(enum power_supply_type chg_type)
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static void rockchip_chg_enable_dcd(struct rockchip_usb2phy *rphy,
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bool en)
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{
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property_enable(rphy, &rphy->phy_cfg->chg_det.rdm_pdwn_en, en);
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property_enable(rphy, &rphy->phy_cfg->chg_det.idp_src_en, en);
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struct regmap *base = get_reg_base(rphy);
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||||
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property_enable(base, &rphy->phy_cfg->chg_det.rdm_pdwn_en, en);
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property_enable(base, &rphy->phy_cfg->chg_det.idp_src_en, en);
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}
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||||
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static void rockchip_chg_enable_primary_det(struct rockchip_usb2phy *rphy,
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bool en)
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{
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property_enable(rphy, &rphy->phy_cfg->chg_det.vdp_src_en, en);
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property_enable(rphy, &rphy->phy_cfg->chg_det.idm_sink_en, en);
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struct regmap *base = get_reg_base(rphy);
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||||
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property_enable(base, &rphy->phy_cfg->chg_det.vdp_src_en, en);
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property_enable(base, &rphy->phy_cfg->chg_det.idm_sink_en, en);
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}
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||||
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static void rockchip_chg_enable_secondary_det(struct rockchip_usb2phy *rphy,
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bool en)
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||||
{
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||||
property_enable(rphy, &rphy->phy_cfg->chg_det.vdm_src_en, en);
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property_enable(rphy, &rphy->phy_cfg->chg_det.idp_sink_en, en);
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struct regmap *base = get_reg_base(rphy);
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||||
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||||
property_enable(base, &rphy->phy_cfg->chg_det.vdm_src_en, en);
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property_enable(base, &rphy->phy_cfg->chg_det.idp_sink_en, en);
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}
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||||
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#define CHG_DCD_POLL_TIME (100 * HZ / 1000)
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@@ -1172,6 +1189,7 @@ static void rockchip_chg_detect_work(struct work_struct *work)
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struct rockchip_usb2phy_port *rport =
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container_of(work, struct rockchip_usb2phy_port, chg_work.work);
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struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
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struct regmap *base = get_reg_base(rphy);
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||||
bool is_dcd, tmout, vout;
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||||
unsigned long delay;
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||||
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||||
@@ -1187,7 +1205,7 @@ static void rockchip_chg_detect_work(struct work_struct *work)
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||||
mutex_lock(&rport->mutex);
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||||
}
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||||
/* put the controller in non-driving mode */
|
||||
property_enable(rphy, &rphy->phy_cfg->chg_det.opmode, false);
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||||
property_enable(base, &rphy->phy_cfg->chg_det.opmode, false);
|
||||
/* Start DCD processing stage 1 */
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||||
rockchip_chg_enable_dcd(rphy, true);
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||||
rphy->chg_state = USB_CHG_STATE_WAIT_FOR_DCD;
|
||||
@@ -1197,7 +1215,8 @@ static void rockchip_chg_detect_work(struct work_struct *work)
|
||||
break;
|
||||
case USB_CHG_STATE_WAIT_FOR_DCD:
|
||||
/* get data contact detection status */
|
||||
is_dcd = property_enabled(rphy, &rphy->phy_cfg->chg_det.dp_det);
|
||||
is_dcd = property_enabled(rphy->grf,
|
||||
&rphy->phy_cfg->chg_det.dp_det);
|
||||
tmout = ++rphy->dcd_retries == CHG_DCD_MAX_RETRIES;
|
||||
/* stage 2 */
|
||||
if (is_dcd || tmout) {
|
||||
@@ -1214,7 +1233,8 @@ static void rockchip_chg_detect_work(struct work_struct *work)
|
||||
}
|
||||
break;
|
||||
case USB_CHG_STATE_DCD_DONE:
|
||||
vout = property_enabled(rphy, &rphy->phy_cfg->chg_det.cp_det);
|
||||
vout = property_enabled(rphy->grf,
|
||||
&rphy->phy_cfg->chg_det.cp_det);
|
||||
rockchip_chg_enable_primary_det(rphy, false);
|
||||
if (vout) {
|
||||
/* Voltage Source on DM, Probe on DP */
|
||||
@@ -1248,7 +1268,8 @@ static void rockchip_chg_detect_work(struct work_struct *work)
|
||||
}
|
||||
break;
|
||||
case USB_CHG_STATE_PRIMARY_DONE:
|
||||
vout = property_enabled(rphy, &rphy->phy_cfg->chg_det.dcp_det);
|
||||
vout = property_enabled(rphy->grf,
|
||||
&rphy->phy_cfg->chg_det.dcp_det);
|
||||
/* Turn off voltage source */
|
||||
rockchip_chg_enable_secondary_det(rphy, false);
|
||||
if (vout)
|
||||
@@ -1261,7 +1282,7 @@ static void rockchip_chg_detect_work(struct work_struct *work)
|
||||
/* fall through */
|
||||
case USB_CHG_STATE_DETECTED:
|
||||
/* put the controller in normal mode */
|
||||
property_enable(rphy, &rphy->phy_cfg->chg_det.opmode, true);
|
||||
property_enable(base, &rphy->phy_cfg->chg_det.opmode, true);
|
||||
mutex_unlock(&rport->mutex);
|
||||
rockchip_usb2phy_otg_sm_work(&rport->otg_sm_work.work);
|
||||
dev_info(&rport->phy->dev, "charger = %s\n",
|
||||
@@ -1316,8 +1337,7 @@ static void rockchip_usb2phy_sm_work(struct work_struct *work)
|
||||
if (ret < 0)
|
||||
goto next_schedule;
|
||||
|
||||
ret = regmap_read(rphy->grf, rport->port_cfg->utmi_hstdet.offset,
|
||||
&uhd);
|
||||
ret = regmap_read(rphy->grf, rport->port_cfg->utmi_hstdet.offset, &uhd);
|
||||
if (ret < 0)
|
||||
goto next_schedule;
|
||||
|
||||
@@ -1398,7 +1418,7 @@ static irqreturn_t rockchip_usb2phy_linestate_irq(int irq, void *data)
|
||||
struct rockchip_usb2phy_port *rport = data;
|
||||
struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
|
||||
|
||||
if (!property_enabled(rphy, &rport->port_cfg->ls_det_st))
|
||||
if (!property_enabled(rphy->grf, &rport->port_cfg->ls_det_st))
|
||||
return IRQ_NONE;
|
||||
|
||||
dev_dbg(&rport->phy->dev, "linestate interrupt\n");
|
||||
@@ -1426,13 +1446,13 @@ static irqreturn_t rockchip_usb2phy_bvalid_irq(int irq, void *data)
|
||||
struct rockchip_usb2phy_port *rport = data;
|
||||
struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
|
||||
|
||||
if (!property_enabled(rphy, &rport->port_cfg->bvalid_det_st))
|
||||
if (!property_enabled(rphy->grf, &rport->port_cfg->bvalid_det_st))
|
||||
return IRQ_NONE;
|
||||
|
||||
mutex_lock(&rport->mutex);
|
||||
|
||||
/* clear bvalid detect irq pending status */
|
||||
property_enable(rphy, &rport->port_cfg->bvalid_det_clr, true);
|
||||
property_enable(rphy->grf, &rport->port_cfg->bvalid_det_clr, true);
|
||||
|
||||
mutex_unlock(&rport->mutex);
|
||||
|
||||
@@ -1451,19 +1471,19 @@ static irqreturn_t rockchip_usb2phy_id_irq(int irq, void *data)
|
||||
struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
|
||||
bool cable_vbus_state = false;
|
||||
|
||||
if (!property_enabled(rphy, &rport->port_cfg->idfall_det_st) &&
|
||||
!property_enabled(rphy, &rport->port_cfg->idrise_det_st))
|
||||
if (!property_enabled(rphy->grf, &rport->port_cfg->idfall_det_st) &&
|
||||
!property_enabled(rphy->grf, &rport->port_cfg->idrise_det_st))
|
||||
return IRQ_NONE;
|
||||
|
||||
mutex_lock(&rport->mutex);
|
||||
|
||||
/* clear id fall or rise detect irq pending status */
|
||||
if (property_enabled(rphy, &rport->port_cfg->idfall_det_st)) {
|
||||
property_enable(rphy, &rport->port_cfg->idfall_det_clr,
|
||||
if (property_enabled(rphy->grf, &rport->port_cfg->idfall_det_st)) {
|
||||
property_enable(rphy->grf, &rport->port_cfg->idfall_det_clr,
|
||||
true);
|
||||
cable_vbus_state = true;
|
||||
} else if (property_enabled(rphy, &rport->port_cfg->idrise_det_st)) {
|
||||
property_enable(rphy, &rport->port_cfg->idrise_det_clr,
|
||||
} else if (property_enabled(rphy->grf, &rport->port_cfg->idrise_det_st)) {
|
||||
property_enable(rphy->grf, &rport->port_cfg->idrise_det_clr,
|
||||
true);
|
||||
cable_vbus_state = false;
|
||||
}
|
||||
@@ -1486,6 +1506,7 @@ static int rockchip_usb2phy_host_port_init(struct rockchip_usb2phy *rphy,
|
||||
struct device_node *child_np)
|
||||
{
|
||||
int ret;
|
||||
struct regmap *base = get_reg_base(rphy);
|
||||
|
||||
rport->port_id = USB2PHY_PORT_HOST;
|
||||
rport->port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_HOST];
|
||||
@@ -1517,7 +1538,7 @@ static int rockchip_usb2phy_host_port_init(struct rockchip_usb2phy *rphy,
|
||||
* consumption, and usb controller will resume it during probe
|
||||
* time if needed.
|
||||
*/
|
||||
ret = property_enable(rphy, &rport->port_cfg->phy_sus, true);
|
||||
ret = property_enable(base, &rport->port_cfg->phy_sus, true);
|
||||
if (ret)
|
||||
return ret;
|
||||
rport->suspended = true;
|
||||
@@ -1542,6 +1563,7 @@ static int rockchip_usb2phy_otg_port_init(struct rockchip_usb2phy *rphy,
|
||||
{
|
||||
int ret;
|
||||
int iddig;
|
||||
struct regmap *base = get_reg_base(rphy);
|
||||
|
||||
rport->port_id = USB2PHY_PORT_OTG;
|
||||
rport->port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
|
||||
@@ -1646,7 +1668,7 @@ static int rockchip_usb2phy_otg_port_init(struct rockchip_usb2phy *rphy,
|
||||
return ret;
|
||||
}
|
||||
|
||||
iddig = property_enabled(rphy, &rport->port_cfg->utmi_iddig);
|
||||
iddig = property_enabled(rphy->grf, &rport->port_cfg->utmi_iddig);
|
||||
if (!iddig) {
|
||||
extcon_set_state(rphy->edev, EXTCON_USB, false);
|
||||
extcon_set_state(rphy->edev, EXTCON_USB_HOST, true);
|
||||
@@ -1675,7 +1697,7 @@ out:
|
||||
* consumption, and usb controller will resume it during probe
|
||||
* time if needed.
|
||||
*/
|
||||
ret = property_enable(rphy, &rport->port_cfg->phy_sus, true);
|
||||
ret = property_enable(base, &rport->port_cfg->phy_sus, true);
|
||||
if (ret)
|
||||
return ret;
|
||||
rport->suspended = true;
|
||||
@@ -1713,6 +1735,16 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
|
||||
if (IS_ERR(rphy->grf))
|
||||
return PTR_ERR(rphy->grf);
|
||||
|
||||
if (of_device_is_compatible(np, "rockchip,rv1108-usb2phy")) {
|
||||
rphy->usbgrf =
|
||||
syscon_regmap_lookup_by_phandle(dev->of_node,
|
||||
"rockchip,usbgrf");
|
||||
if (IS_ERR(rphy->usbgrf))
|
||||
return PTR_ERR(rphy->usbgrf);
|
||||
} else {
|
||||
rphy->usbgrf = NULL;
|
||||
}
|
||||
|
||||
if (of_property_read_u32(np, "reg", ®)) {
|
||||
dev_err(dev, "the reg property is not assigned in %s node\n",
|
||||
np->name);
|
||||
@@ -1845,23 +1877,23 @@ rockchip_usb2phy_low_power_enable(struct rockchip_usb2phy *rphy,
|
||||
if (rport->port_id == USB2PHY_PORT_OTG) {
|
||||
dev_info(&rport->phy->dev, "set otg port low power state %d\n",
|
||||
value);
|
||||
ret = property_enable(rphy, &rport->port_cfg->bypass_bc,
|
||||
ret = property_enable(rphy->grf, &rport->port_cfg->bypass_bc,
|
||||
value);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = property_enable(rphy, &rport->port_cfg->bypass_otg,
|
||||
ret = property_enable(rphy->grf, &rport->port_cfg->bypass_otg,
|
||||
value);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = property_enable(rphy, &rport->port_cfg->vbus_det_en,
|
||||
ret = property_enable(rphy->grf, &rport->port_cfg->vbus_det_en,
|
||||
!value);
|
||||
} else if (rport->port_id == USB2PHY_PORT_HOST) {
|
||||
dev_info(&rport->phy->dev, "set host port low power state %d\n",
|
||||
value);
|
||||
|
||||
ret = property_enable(rphy, &rport->port_cfg->bypass_host,
|
||||
ret = property_enable(rphy->grf, &rport->port_cfg->bypass_host,
|
||||
value);
|
||||
}
|
||||
|
||||
@@ -2046,7 +2078,7 @@ static int rockchip_usb2phy_pm_suspend(struct device *dev)
|
||||
if (rport->port_id == USB2PHY_PORT_OTG &&
|
||||
rport->id_irq > 0) {
|
||||
mutex_lock(&rport->mutex);
|
||||
rport->prev_iddig = property_enabled(rphy,
|
||||
rport->prev_iddig = property_enabled(rphy->grf,
|
||||
&rport->port_cfg->utmi_iddig);
|
||||
ret = rockchip_usb2phy_enable_id_irq(rphy, rport,
|
||||
false);
|
||||
@@ -2093,7 +2125,7 @@ static int rockchip_usb2phy_pm_resume(struct device *dev)
|
||||
if (rport->port_id == USB2PHY_PORT_OTG &&
|
||||
rport->id_irq > 0) {
|
||||
mutex_lock(&rport->mutex);
|
||||
iddig = property_enabled(rphy,
|
||||
iddig = property_enabled(rphy->grf,
|
||||
&rport->port_cfg->utmi_iddig);
|
||||
ret = rockchip_usb2phy_enable_id_irq(rphy, rport,
|
||||
true);
|
||||
|
||||
Reference in New Issue
Block a user