UPSTREAM: phy: rockchip-inno-usb2: add support for rockchip,usbgrf property

The registers of usb-phy are distributed in grf and usbgrf on some
Rockchip SoCs (e.g RV1108), this patch add a new rockchip,usbgrf
property to support this companion grf design.

Change-Id: If66c03426d4ad63b285fa7132ae20ee10be1d627
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
(cherry picked from commit 1543645c31)
This commit is contained in:
Frank Wang
2017-08-11 16:07:47 +08:00
committed by Tao Huang
parent 5cf27d0b60
commit f646d95a5b

View File

@@ -263,6 +263,7 @@ struct rockchip_usb2phy_port {
/**
* struct rockchip_usb2phy: usb2.0 phy driver data.
* @grf: General Register Files regmap.
* @usbgrf: USB General Register Files regmap.
* @clk: clock struct of phy input clk.
* @clk480m: clock struct of phy output clk.
* @clk_hw: clock struct of phy output clk management.
@@ -278,6 +279,7 @@ struct rockchip_usb2phy_port {
struct rockchip_usb2phy {
struct device *dev;
struct regmap *grf;
struct regmap *usbgrf;
struct clk *clk;
struct clk *clk480m;
struct clk_hw clk480m_hw;
@@ -291,7 +293,12 @@ struct rockchip_usb2phy {
struct rockchip_usb2phy_port ports[USB2PHY_NUM_PORTS];
};
static inline int property_enable(struct rockchip_usb2phy *rphy,
static inline struct regmap *get_reg_base(struct rockchip_usb2phy *rphy)
{
return rphy->usbgrf == NULL ? rphy->grf : rphy->usbgrf;
}
static inline int property_enable(struct regmap *base,
const struct usb2phy_reg *reg, bool en)
{
unsigned int val, mask, tmp;
@@ -300,17 +307,17 @@ static inline int property_enable(struct rockchip_usb2phy *rphy,
mask = GENMASK(reg->bitend, reg->bitstart);
val = (tmp << reg->bitstart) | (mask << BIT_WRITEABLE_SHIFT);
return regmap_write(rphy->grf, reg->offset, val);
return regmap_write(base, reg->offset, val);
}
static inline bool property_enabled(struct rockchip_usb2phy *rphy,
static inline bool property_enabled(struct regmap *base,
const struct usb2phy_reg *reg)
{
int ret;
unsigned int tmp, orig;
unsigned int mask = GENMASK(reg->bitend, reg->bitstart);
ret = regmap_read(rphy->grf, reg->offset, &orig);
ret = regmap_read(base, reg->offset, &orig);
if (ret)
return false;
@@ -322,11 +329,12 @@ static int rockchip_usb2phy_clk480m_prepare(struct clk_hw *hw)
{
struct rockchip_usb2phy *rphy =
container_of(hw, struct rockchip_usb2phy, clk480m_hw);
struct regmap *base = get_reg_base(rphy);
int ret;
/* turn on 480m clk output if it is off */
if (!property_enabled(rphy, &rphy->phy_cfg->clkout_ctl)) {
ret = property_enable(rphy, &rphy->phy_cfg->clkout_ctl, true);
if (!property_enabled(base, &rphy->phy_cfg->clkout_ctl)) {
ret = property_enable(base, &rphy->phy_cfg->clkout_ctl, true);
if (ret)
return ret;
@@ -341,17 +349,19 @@ static void rockchip_usb2phy_clk480m_unprepare(struct clk_hw *hw)
{
struct rockchip_usb2phy *rphy =
container_of(hw, struct rockchip_usb2phy, clk480m_hw);
struct regmap *base = get_reg_base(rphy);
/* turn off 480m clk output */
property_enable(rphy, &rphy->phy_cfg->clkout_ctl, false);
property_enable(base, &rphy->phy_cfg->clkout_ctl, false);
}
static int rockchip_usb2phy_clk480m_prepared(struct clk_hw *hw)
{
struct rockchip_usb2phy *rphy =
container_of(hw, struct rockchip_usb2phy, clk480m_hw);
struct regmap *base = get_reg_base(rphy);
return property_enabled(rphy, &rphy->phy_cfg->clkout_ctl);
return property_enabled(base, &rphy->phy_cfg->clkout_ctl);
}
static unsigned long
@@ -470,19 +480,19 @@ static int rockchip_usb2phy_enable_id_irq(struct rockchip_usb2phy *rphy,
{
int ret;
ret = property_enable(rphy, &rport->port_cfg->idfall_det_clr, true);
ret = property_enable(rphy->grf, &rport->port_cfg->idfall_det_clr, true);
if (ret)
goto out;
ret = property_enable(rphy, &rport->port_cfg->idfall_det_en, en);
ret = property_enable(rphy->grf, &rport->port_cfg->idfall_det_en, en);
if (ret)
goto out;
ret = property_enable(rphy, &rport->port_cfg->idrise_det_clr, true);
ret = property_enable(rphy->grf, &rport->port_cfg->idrise_det_clr, true);
if (ret)
goto out;
ret = property_enable(rphy, &rport->port_cfg->idrise_det_en, en);
ret = property_enable(rphy->grf, &rport->port_cfg->idrise_det_en, en);
out:
return ret;
}
@@ -494,11 +504,11 @@ static int rockchip_usb2phy_enable_vbus_irq(struct rockchip_usb2phy *rphy,
{
int ret;
ret = property_enable(rphy, &rport->port_cfg->bvalid_det_clr, true);
ret = property_enable(rphy->grf, &rport->port_cfg->bvalid_det_clr, true);
if (ret)
goto out;
ret = property_enable(rphy, &rport->port_cfg->bvalid_det_en, en);
ret = property_enable(rphy->grf, &rport->port_cfg->bvalid_det_en, en);
out:
return ret;
}
@@ -509,11 +519,11 @@ static int rockchip_usb2phy_enable_line_irq(struct rockchip_usb2phy *rphy,
{
int ret;
ret = property_enable(rphy, &rport->port_cfg->ls_det_clr, true);
ret = property_enable(rphy->grf, &rport->port_cfg->ls_det_clr, true);
if (ret)
goto out;
ret = property_enable(rphy, &rport->port_cfg->ls_det_en, en);
ret = property_enable(rphy->grf, &rport->port_cfg->ls_det_en, en);
out:
return ret;
}
@@ -523,11 +533,12 @@ static int rockchip_usb_bypass_uart(struct rockchip_usb2phy_port *rport,
{
struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
const struct usb2phy_reg *iomux = &rport->port_cfg->bypass_iomux;
struct regmap *base = get_reg_base(rphy);
int ret = 0;
mutex_lock(&rport->mutex);
if (en == property_enabled(rphy, &rport->port_cfg->bypass_sel)) {
if (en == property_enabled(base, &rport->port_cfg->bypass_sel)) {
dev_info(&rport->phy->dev,
"bypass uart %s is already set\n", en ? "on" : "off");
goto unlock;
@@ -547,24 +558,24 @@ static int rockchip_usb_bypass_uart(struct rockchip_usb2phy_port *rport,
* set phy in non-driving mode, it will cause UART to print
* random codes. So just put USB PHY in normal mode.
*/
ret |= property_enable(rphy, &rport->port_cfg->bypass_sel,
ret |= property_enable(base, &rport->port_cfg->bypass_sel,
true);
ret |= property_enable(rphy, &rport->port_cfg->bypass_dm_en,
ret |= property_enable(base, &rport->port_cfg->bypass_dm_en,
true);
/* Some platforms required to set iomux of bypass uart */
if (iomux->offset)
ret |= property_enable(rphy, iomux, true);
ret |= property_enable(rphy->grf, iomux, true);
} else {
/* just disable bypass, and resume phy in phy power_on later */
ret |= property_enable(rphy, &rport->port_cfg->bypass_sel,
ret |= property_enable(base, &rport->port_cfg->bypass_sel,
false);
ret |= property_enable(rphy, &rport->port_cfg->bypass_dm_en,
ret |= property_enable(base, &rport->port_cfg->bypass_dm_en,
false);
/* Some platforms required to set iomux of bypass uart */
if (iomux->offset)
ret |= property_enable(rphy, iomux, false);
ret |= property_enable(rphy->grf, iomux, false);
}
unlock:
@@ -584,12 +595,12 @@ static void rockchip_usb_bypass_uart_work(struct work_struct *work)
mutex_lock(&rport->mutex);
iddig = property_enabled(rphy, &rport->port_cfg->utmi_iddig);
iddig = property_enabled(rphy->grf, &rport->port_cfg->utmi_iddig);
if (rport->utmi_avalid)
vbus = property_enabled(rphy, &rport->port_cfg->utmi_avalid);
vbus = property_enabled(rphy->grf, &rport->port_cfg->utmi_avalid);
else
vbus = property_enabled(rphy, &rport->port_cfg->utmi_bvalid);
vbus = property_enabled(rphy->grf, &rport->port_cfg->utmi_bvalid);
mutex_unlock(&rport->mutex);
@@ -661,6 +672,7 @@ static int rockchip_usb2phy_power_on(struct phy *phy)
{
struct rockchip_usb2phy_port *rport = phy_get_drvdata(phy);
struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent);
struct regmap *base = get_reg_base(rphy);
int ret;
dev_dbg(&rport->phy->dev, "port power on\n");
@@ -685,7 +697,7 @@ static int rockchip_usb2phy_power_on(struct phy *phy)
if (ret)
goto unlock;
ret = property_enable(rphy, &rport->port_cfg->phy_sus, false);
ret = property_enable(base, &rport->port_cfg->phy_sus, false);
if (ret)
goto unlock;
@@ -709,6 +721,7 @@ static int rockchip_usb2phy_power_off(struct phy *phy)
{
struct rockchip_usb2phy_port *rport = phy_get_drvdata(phy);
struct rockchip_usb2phy *rphy = dev_get_drvdata(phy->dev.parent);
struct regmap *base = get_reg_base(rphy);
int ret;
dev_dbg(&rport->phy->dev, "port power off\n");
@@ -720,7 +733,7 @@ static int rockchip_usb2phy_power_off(struct phy *phy)
goto unlock;
}
ret = property_enable(rphy, &rport->port_cfg->phy_sus, true);
ret = property_enable(base, &rport->port_cfg->phy_sus, true);
if (ret)
goto unlock;
@@ -816,7 +829,7 @@ static int rockchip_usb2phy_set_mode(struct phy *phy, enum phy_mode mode)
return ret;
}
ret = property_enable(rphy, &rport->port_cfg->vbus_det_en, vbus_det_en);
ret = property_enable(rphy->grf, &rport->port_cfg->vbus_det_en, vbus_det_en);
return ret;
}
@@ -873,6 +886,7 @@ static ssize_t otg_mode_store(struct device *device,
{
struct rockchip_usb2phy *rphy = dev_get_drvdata(device);
struct rockchip_usb2phy_port *rport = NULL;
struct regmap *base = get_reg_base(rphy);
enum usb_dr_mode new_dr_mode;
unsigned int index;
int rc = count;
@@ -918,18 +932,18 @@ static ssize_t otg_mode_store(struct device *device,
switch (rport->mode) {
case USB_DR_MODE_HOST:
rockchip_usb2phy_set_mode(rport->phy, PHY_MODE_USB_HOST);
property_enable(rphy, &rport->port_cfg->iddig_output, false);
property_enable(rphy, &rport->port_cfg->iddig_en, true);
property_enable(base, &rport->port_cfg->iddig_output, false);
property_enable(base, &rport->port_cfg->iddig_en, true);
break;
case USB_DR_MODE_PERIPHERAL:
rockchip_usb2phy_set_mode(rport->phy, PHY_MODE_USB_DEVICE);
property_enable(rphy, &rport->port_cfg->iddig_output, true);
property_enable(rphy, &rport->port_cfg->iddig_en, true);
property_enable(base, &rport->port_cfg->iddig_output, true);
property_enable(base, &rport->port_cfg->iddig_en, true);
break;
case USB_DR_MODE_OTG:
rockchip_usb2phy_set_mode(rport->phy, PHY_MODE_USB_OTG);
property_enable(rphy, &rport->port_cfg->iddig_output, false);
property_enable(rphy, &rport->port_cfg->iddig_en, false);
property_enable(base, &rport->port_cfg->iddig_output, false);
property_enable(base, &rport->port_cfg->iddig_en, false);
break;
default:
break;
@@ -968,10 +982,10 @@ static void rockchip_usb2phy_otg_sm_work(struct work_struct *work)
if (rport->utmi_avalid)
rport->vbus_attached =
property_enabled(rphy, &rport->port_cfg->utmi_avalid);
property_enabled(rphy->grf, &rport->port_cfg->utmi_avalid);
else
rport->vbus_attached =
property_enabled(rphy, &rport->port_cfg->utmi_bvalid);
property_enabled(rphy->grf, &rport->port_cfg->utmi_bvalid);
sch_work = false;
delay = OTG_SCHEDULE_DELAY;
@@ -1009,8 +1023,7 @@ static void rockchip_usb2phy_otg_sm_work(struct work_struct *work)
case USB_CHG_STATE_DETECTED:
switch (rphy->chg_type) {
case POWER_SUPPLY_TYPE_USB:
dev_dbg(&rport->phy->dev,
"sdp cable is connecetd\n");
dev_dbg(&rport->phy->dev, "sdp cable is connected\n");
wake_lock(&rport->wakelock);
cable = EXTCON_CHG_USB_SDP;
mutex_unlock(&rport->mutex);
@@ -1021,14 +1034,12 @@ static void rockchip_usb2phy_otg_sm_work(struct work_struct *work)
sch_work = true;
break;
case POWER_SUPPLY_TYPE_USB_DCP:
dev_dbg(&rport->phy->dev,
"dcp cable is connecetd\n");
dev_dbg(&rport->phy->dev, "dcp cable is connected\n");
cable = EXTCON_CHG_USB_DCP;
sch_work = true;
break;
case POWER_SUPPLY_TYPE_USB_CDP:
dev_dbg(&rport->phy->dev,
"cdp cable is connecetd\n");
dev_dbg(&rport->phy->dev, "cdp cable is connected\n");
wake_lock(&rport->wakelock);
cable = EXTCON_CHG_USB_CDP;
mutex_unlock(&rport->mutex);
@@ -1145,22 +1156,28 @@ static const char *chg_to_string(enum power_supply_type chg_type)
static void rockchip_chg_enable_dcd(struct rockchip_usb2phy *rphy,
bool en)
{
property_enable(rphy, &rphy->phy_cfg->chg_det.rdm_pdwn_en, en);
property_enable(rphy, &rphy->phy_cfg->chg_det.idp_src_en, en);
struct regmap *base = get_reg_base(rphy);
property_enable(base, &rphy->phy_cfg->chg_det.rdm_pdwn_en, en);
property_enable(base, &rphy->phy_cfg->chg_det.idp_src_en, en);
}
static void rockchip_chg_enable_primary_det(struct rockchip_usb2phy *rphy,
bool en)
{
property_enable(rphy, &rphy->phy_cfg->chg_det.vdp_src_en, en);
property_enable(rphy, &rphy->phy_cfg->chg_det.idm_sink_en, en);
struct regmap *base = get_reg_base(rphy);
property_enable(base, &rphy->phy_cfg->chg_det.vdp_src_en, en);
property_enable(base, &rphy->phy_cfg->chg_det.idm_sink_en, en);
}
static void rockchip_chg_enable_secondary_det(struct rockchip_usb2phy *rphy,
bool en)
{
property_enable(rphy, &rphy->phy_cfg->chg_det.vdm_src_en, en);
property_enable(rphy, &rphy->phy_cfg->chg_det.idp_sink_en, en);
struct regmap *base = get_reg_base(rphy);
property_enable(base, &rphy->phy_cfg->chg_det.vdm_src_en, en);
property_enable(base, &rphy->phy_cfg->chg_det.idp_sink_en, en);
}
#define CHG_DCD_POLL_TIME (100 * HZ / 1000)
@@ -1172,6 +1189,7 @@ static void rockchip_chg_detect_work(struct work_struct *work)
struct rockchip_usb2phy_port *rport =
container_of(work, struct rockchip_usb2phy_port, chg_work.work);
struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
struct regmap *base = get_reg_base(rphy);
bool is_dcd, tmout, vout;
unsigned long delay;
@@ -1187,7 +1205,7 @@ static void rockchip_chg_detect_work(struct work_struct *work)
mutex_lock(&rport->mutex);
}
/* put the controller in non-driving mode */
property_enable(rphy, &rphy->phy_cfg->chg_det.opmode, false);
property_enable(base, &rphy->phy_cfg->chg_det.opmode, false);
/* Start DCD processing stage 1 */
rockchip_chg_enable_dcd(rphy, true);
rphy->chg_state = USB_CHG_STATE_WAIT_FOR_DCD;
@@ -1197,7 +1215,8 @@ static void rockchip_chg_detect_work(struct work_struct *work)
break;
case USB_CHG_STATE_WAIT_FOR_DCD:
/* get data contact detection status */
is_dcd = property_enabled(rphy, &rphy->phy_cfg->chg_det.dp_det);
is_dcd = property_enabled(rphy->grf,
&rphy->phy_cfg->chg_det.dp_det);
tmout = ++rphy->dcd_retries == CHG_DCD_MAX_RETRIES;
/* stage 2 */
if (is_dcd || tmout) {
@@ -1214,7 +1233,8 @@ static void rockchip_chg_detect_work(struct work_struct *work)
}
break;
case USB_CHG_STATE_DCD_DONE:
vout = property_enabled(rphy, &rphy->phy_cfg->chg_det.cp_det);
vout = property_enabled(rphy->grf,
&rphy->phy_cfg->chg_det.cp_det);
rockchip_chg_enable_primary_det(rphy, false);
if (vout) {
/* Voltage Source on DM, Probe on DP */
@@ -1248,7 +1268,8 @@ static void rockchip_chg_detect_work(struct work_struct *work)
}
break;
case USB_CHG_STATE_PRIMARY_DONE:
vout = property_enabled(rphy, &rphy->phy_cfg->chg_det.dcp_det);
vout = property_enabled(rphy->grf,
&rphy->phy_cfg->chg_det.dcp_det);
/* Turn off voltage source */
rockchip_chg_enable_secondary_det(rphy, false);
if (vout)
@@ -1261,7 +1282,7 @@ static void rockchip_chg_detect_work(struct work_struct *work)
/* fall through */
case USB_CHG_STATE_DETECTED:
/* put the controller in normal mode */
property_enable(rphy, &rphy->phy_cfg->chg_det.opmode, true);
property_enable(base, &rphy->phy_cfg->chg_det.opmode, true);
mutex_unlock(&rport->mutex);
rockchip_usb2phy_otg_sm_work(&rport->otg_sm_work.work);
dev_info(&rport->phy->dev, "charger = %s\n",
@@ -1316,8 +1337,7 @@ static void rockchip_usb2phy_sm_work(struct work_struct *work)
if (ret < 0)
goto next_schedule;
ret = regmap_read(rphy->grf, rport->port_cfg->utmi_hstdet.offset,
&uhd);
ret = regmap_read(rphy->grf, rport->port_cfg->utmi_hstdet.offset, &uhd);
if (ret < 0)
goto next_schedule;
@@ -1398,7 +1418,7 @@ static irqreturn_t rockchip_usb2phy_linestate_irq(int irq, void *data)
struct rockchip_usb2phy_port *rport = data;
struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
if (!property_enabled(rphy, &rport->port_cfg->ls_det_st))
if (!property_enabled(rphy->grf, &rport->port_cfg->ls_det_st))
return IRQ_NONE;
dev_dbg(&rport->phy->dev, "linestate interrupt\n");
@@ -1426,13 +1446,13 @@ static irqreturn_t rockchip_usb2phy_bvalid_irq(int irq, void *data)
struct rockchip_usb2phy_port *rport = data;
struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
if (!property_enabled(rphy, &rport->port_cfg->bvalid_det_st))
if (!property_enabled(rphy->grf, &rport->port_cfg->bvalid_det_st))
return IRQ_NONE;
mutex_lock(&rport->mutex);
/* clear bvalid detect irq pending status */
property_enable(rphy, &rport->port_cfg->bvalid_det_clr, true);
property_enable(rphy->grf, &rport->port_cfg->bvalid_det_clr, true);
mutex_unlock(&rport->mutex);
@@ -1451,19 +1471,19 @@ static irqreturn_t rockchip_usb2phy_id_irq(int irq, void *data)
struct rockchip_usb2phy *rphy = dev_get_drvdata(rport->phy->dev.parent);
bool cable_vbus_state = false;
if (!property_enabled(rphy, &rport->port_cfg->idfall_det_st) &&
!property_enabled(rphy, &rport->port_cfg->idrise_det_st))
if (!property_enabled(rphy->grf, &rport->port_cfg->idfall_det_st) &&
!property_enabled(rphy->grf, &rport->port_cfg->idrise_det_st))
return IRQ_NONE;
mutex_lock(&rport->mutex);
/* clear id fall or rise detect irq pending status */
if (property_enabled(rphy, &rport->port_cfg->idfall_det_st)) {
property_enable(rphy, &rport->port_cfg->idfall_det_clr,
if (property_enabled(rphy->grf, &rport->port_cfg->idfall_det_st)) {
property_enable(rphy->grf, &rport->port_cfg->idfall_det_clr,
true);
cable_vbus_state = true;
} else if (property_enabled(rphy, &rport->port_cfg->idrise_det_st)) {
property_enable(rphy, &rport->port_cfg->idrise_det_clr,
} else if (property_enabled(rphy->grf, &rport->port_cfg->idrise_det_st)) {
property_enable(rphy->grf, &rport->port_cfg->idrise_det_clr,
true);
cable_vbus_state = false;
}
@@ -1486,6 +1506,7 @@ static int rockchip_usb2phy_host_port_init(struct rockchip_usb2phy *rphy,
struct device_node *child_np)
{
int ret;
struct regmap *base = get_reg_base(rphy);
rport->port_id = USB2PHY_PORT_HOST;
rport->port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_HOST];
@@ -1517,7 +1538,7 @@ static int rockchip_usb2phy_host_port_init(struct rockchip_usb2phy *rphy,
* consumption, and usb controller will resume it during probe
* time if needed.
*/
ret = property_enable(rphy, &rport->port_cfg->phy_sus, true);
ret = property_enable(base, &rport->port_cfg->phy_sus, true);
if (ret)
return ret;
rport->suspended = true;
@@ -1542,6 +1563,7 @@ static int rockchip_usb2phy_otg_port_init(struct rockchip_usb2phy *rphy,
{
int ret;
int iddig;
struct regmap *base = get_reg_base(rphy);
rport->port_id = USB2PHY_PORT_OTG;
rport->port_cfg = &rphy->phy_cfg->port_cfgs[USB2PHY_PORT_OTG];
@@ -1646,7 +1668,7 @@ static int rockchip_usb2phy_otg_port_init(struct rockchip_usb2phy *rphy,
return ret;
}
iddig = property_enabled(rphy, &rport->port_cfg->utmi_iddig);
iddig = property_enabled(rphy->grf, &rport->port_cfg->utmi_iddig);
if (!iddig) {
extcon_set_state(rphy->edev, EXTCON_USB, false);
extcon_set_state(rphy->edev, EXTCON_USB_HOST, true);
@@ -1675,7 +1697,7 @@ out:
* consumption, and usb controller will resume it during probe
* time if needed.
*/
ret = property_enable(rphy, &rport->port_cfg->phy_sus, true);
ret = property_enable(base, &rport->port_cfg->phy_sus, true);
if (ret)
return ret;
rport->suspended = true;
@@ -1713,6 +1735,16 @@ static int rockchip_usb2phy_probe(struct platform_device *pdev)
if (IS_ERR(rphy->grf))
return PTR_ERR(rphy->grf);
if (of_device_is_compatible(np, "rockchip,rv1108-usb2phy")) {
rphy->usbgrf =
syscon_regmap_lookup_by_phandle(dev->of_node,
"rockchip,usbgrf");
if (IS_ERR(rphy->usbgrf))
return PTR_ERR(rphy->usbgrf);
} else {
rphy->usbgrf = NULL;
}
if (of_property_read_u32(np, "reg", &reg)) {
dev_err(dev, "the reg property is not assigned in %s node\n",
np->name);
@@ -1845,23 +1877,23 @@ rockchip_usb2phy_low_power_enable(struct rockchip_usb2phy *rphy,
if (rport->port_id == USB2PHY_PORT_OTG) {
dev_info(&rport->phy->dev, "set otg port low power state %d\n",
value);
ret = property_enable(rphy, &rport->port_cfg->bypass_bc,
ret = property_enable(rphy->grf, &rport->port_cfg->bypass_bc,
value);
if (ret)
return ret;
ret = property_enable(rphy, &rport->port_cfg->bypass_otg,
ret = property_enable(rphy->grf, &rport->port_cfg->bypass_otg,
value);
if (ret)
return ret;
ret = property_enable(rphy, &rport->port_cfg->vbus_det_en,
ret = property_enable(rphy->grf, &rport->port_cfg->vbus_det_en,
!value);
} else if (rport->port_id == USB2PHY_PORT_HOST) {
dev_info(&rport->phy->dev, "set host port low power state %d\n",
value);
ret = property_enable(rphy, &rport->port_cfg->bypass_host,
ret = property_enable(rphy->grf, &rport->port_cfg->bypass_host,
value);
}
@@ -2046,7 +2078,7 @@ static int rockchip_usb2phy_pm_suspend(struct device *dev)
if (rport->port_id == USB2PHY_PORT_OTG &&
rport->id_irq > 0) {
mutex_lock(&rport->mutex);
rport->prev_iddig = property_enabled(rphy,
rport->prev_iddig = property_enabled(rphy->grf,
&rport->port_cfg->utmi_iddig);
ret = rockchip_usb2phy_enable_id_irq(rphy, rport,
false);
@@ -2093,7 +2125,7 @@ static int rockchip_usb2phy_pm_resume(struct device *dev)
if (rport->port_id == USB2PHY_PORT_OTG &&
rport->id_irq > 0) {
mutex_lock(&rport->mutex);
iddig = property_enabled(rphy,
iddig = property_enabled(rphy->grf,
&rport->port_cfg->utmi_iddig);
ret = rockchip_usb2phy_enable_id_irq(rphy, rport,
true);