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video: rockchip: mpp: fix some 8k av1 video crash issue
1.Some 8K frames took more than 200ms to decode,causing software timeout.
Solution:
Increase the software timeout threshold to 500ms
2.After power off av1dec, read/write reg in cache irq causing kernel
crash.
Solution:
There are two irq for av1:
a. vcd_irq is decode irq what we need to care about.
b. cache irq what we do not need to care about.
So disable the cache irq temporarily.
Signed-off-by: Yandong Lin <yandong.lin@rock-chips.com>
Change-Id: I282b8e0614321b5adf0fac5f31bb88e2bdb2bf6c
This commit is contained in:
@@ -472,6 +472,7 @@ free_task:
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#define AV1_L2_CACHE_SHAPER_CTRL 0x20
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#define AV1_L2_CACHE_SHAPER_EN BIT(0)
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#define AV1_L2_CACHE_INT_MASK 0x30
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#define AV1_L2_CACHE_PP0_Y_CONFIG0 0x84
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#define AV1_L2_CACHE_PP0_Y_CONFIG2 0x8c
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#define AV1_L2_CACHE_PP0_Y_CONFIG3 0x90
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@@ -526,6 +527,9 @@ static int av1dec_set_l2_cache(struct av1dec_dev *dec, struct av1dec_task *task)
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val = line_cnt | (max_h << 16);
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writel_relaxed(val, dec->reg_base[AV1DEC_CLASS_CACHE] + AV1_L2_CACHE_PP0_U_CONFIG3);
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/* mask cache irq */
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writel_relaxed(0xf, dec->reg_base[AV1DEC_CLASS_CACHE] + AV1_L2_CACHE_INT_MASK);
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/* shaper enable */
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writel_relaxed(AV1_L2_CACHE_SHAPER_EN,
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dec->reg_base[AV1DEC_CLASS_CACHE] + AV1_L2_CACHE_SHAPER_CTRL);
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@@ -36,7 +36,7 @@
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#include "mpp_common.h"
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#include "mpp_iommu.h"
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#define MPP_WORK_TIMEOUT_DELAY (200)
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#define MPP_WORK_TIMEOUT_DELAY (500)
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#define MPP_WAIT_TIMEOUT_DELAY (2000)
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/* Use 'v' as magic number */
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