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arm64: dts: rockchip: add mmc dt-bindings for rk3328 and evb board

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Add dt-bindings for sdio/sdmmc(+ext)/emmc controllers

Change-Id: I1c52b803110c499c58c2c27a1c7488a98b0ca870
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
This commit is contained in:
Shawn Lin
2016-12-15 09:06:23 +08:00
committed by Huang, Tao
parent 2083812848
commit f6e71099d9
2 changed files with 57 additions and 0 deletions
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12
arch/arm64/boot/dts/rockchip/rk3328-evb.dts
View File

@@ -62,3 +62,15 @@
status = "okay";
};
};
&emmc {
bus-width = <8>;
cap-mmc-highspeed;
supports-emmc;
disable-wp;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
status = "okay";
};

45
arch/arm64/boot/dts/rockchip/rk3328.dtsi
View File

@@ -460,6 +460,51 @@
<32768>, <32768>;
};
sdmmc: rksdmmc@ff500000 {
compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff500000 0x0 0x4000>;
clock-freq-min-max = <400000 150000000>;
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
clock-names = "biu", "ciu";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
sdio: dwmmc@ff510000 {
compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff510000 0x0 0x4000>;
clock-freq-min-max = <400000 150000000>;
clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
emmc: rksdmmc@ff520000 {
compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff520000 0x0 0x4000>;
clock-freq-min-max = <400000 150000000>;
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
clock-names = "biu", "ciu";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
sdmmc_ext: rksdmmc@ff5f0000 {
compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
reg = <0x0 0xff5f0000 0x0 0x4000>;
clock-freq-min-max = <400000 150000000>;
clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>;
clock-names = "biu", "ciu";
fifo-depth = <0x100>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
gic: interrupt-controller@ff811000 {
compatible = "arm,gic-400";
#interrupt-cells = <3>;