shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-08 03:40:35 +09:00
Code Issues Packages Projects Releases Wiki Activity

rkflash: add new SPI Nand flash

Browse Source 
FM25S01, HYF1GQ4UPACAE, EM73E044SNA-G, GD5F2GQ5UEYIG

Change-Id: Id6f50b06a27631cf14e1df6deb39cf0600866bec
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
This commit is contained in:
Jon Lin
2019-07-12 08:58:36 +08:00
committed by Tao Huang
parent 7e32b05fe3
commit f73668a6c4
2 changed files with 50 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

49
drivers/rkflash/sfc_nand.c
View File

@@ -68,6 +68,14 @@ static struct nand_info spi_nand_tbl[] = {
{0x0BF1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0x0, 8, 12, &sfc_nand_ecc_status_sp4},
/* HYF4GQ4UAACBE */
{0xC9D4, 8, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 20, 4, 0xB0, 0, 32, 64, NULL},
/* FM25S01 */
{0xA1A1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 1, 0xB0, 0, 0, 4, &sfc_nand_ecc_status_sp1},
/* HYF1GQ4UPACAE */
{0xC9A1, 4, 64, 1, 1024, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 18, 4, 0xB0, 0, 4, 20, &sfc_nand_ecc_status_sp1},
/* EM73E044SNA-G */
{0xD503, 8, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 20, 8, 0xB0, 0, 4, 40, NULL},
/* GD5F2GQ5UEYIG */
{0xC852, 4, 64, 1, 2048, 0x13, 0x10, 0x03, 0x02, 0x6B, 0x32, 0xD8, 0x4C, 19, 4, 0xB0, 0, 4, 20, &sfc_nand_ecc_status_sp2},
};
static u8 id_byte[8];
@@ -244,6 +252,47 @@ u32 sfc_nand_ecc_status_sp1(void)
return ret;
}
/*
* ecc spectial type2:
* [0x0000, 0x0011], No bit errors were detected;
* [0x0100, 0x0111], Bit errors were detected and corrected. Not
* reach Flipping Bits;
* [0x1000, 0x1011], Multiple bit errors were detected and
* not corrected.
* [0x1100, 0x1111], reserved.
*/
u32 sfc_nand_ecc_status_sp2(void)
{
int ret;
u32 i;
u8 ecc;
u8 status, status1;
u32 timeout = 1000 * 1000;
for (i = 0; i < timeout; i++) {
ret = sfc_nand_read_feature(0xC0, &status);
if (ret != SFC_OK)
return SFC_NAND_ECC_ERROR;
ret = sfc_nand_read_feature(0xF0, &status1);
if (ret != SFC_OK)
return SFC_NAND_ECC_ERROR;
if (!(status & (1 << 0)))
break;
sfc_delay(1);
}
ecc = (status >> 4) & 0x03;
ecc = (ecc << 2) | ((status1 >> 4) & 0x03);
if (ecc < 7)
ret = SFC_NAND_ECC_OK;
else if (ecc == 7)
ret = SFC_NAND_ECC_REFRESH;
else
ret = SFC_NAND_ECC_ERROR;
return ret;
}
/*
* ecc spectial type3:
* [0x0000, 0x0011], No bit errors were detected;

1
drivers/rkflash/sfc_nand.h
View File

@@ -124,6 +124,7 @@ u32 sfc_nand_init(void);
void sfc_nand_deinit(void);
int sfc_nand_read_id(u8 *buf);
u32 sfc_nand_ecc_status_sp1(void);
u32 sfc_nand_ecc_status_sp2(void);
u32 sfc_nand_ecc_status_sp3(void);
u32 sfc_nand_ecc_status_sp4(void);
u32 sfc_nand_ecc_status_sp5(void);