Merge commit 'e3844dd49ea50cb0d415537830ff2f9d287666fb'

* commit 'e3844dd49ea50cb0d415537830ff2f9d287666fb':
  arm64: dts: rockchip: rv1126b: set thermal-zone for system-monitor
  arm64: mm: update fixup_fault.S for kernel 6.1
  media: i2c: ps5458: correct chip id information
  media: i2c: rk628: fix i2c error when hdmirx reset

Change-Id: I0057cd89373d3bdddd30c464dd3f455b01ce8408

arch/arm64/boot/dts/rockchip/rv1126b.dtsi

@@ -896,6 +896,7 @@
 
 	rockchip_system_monitor: rockchip-system-monitor {
 		compatible = "rockchip,system-monitor";
+		rockchip,thermal-zone = "cpu-thermal";
 	};
 
 	thermal_zones: thermal-zones {

arch/arm64/mm/Makefile

@@ -16,4 +16,4 @@ KASAN_SANITIZE_physaddr.o	+= n
 obj-$(CONFIG_KASAN)		+= kasan_init.o
 KASAN_SANITIZE_kasan_init.o	:= n
 
-obj-$(CONFIG_ROCKCHIP_ARM64_ALIGN_FAULT_FIX) += fixup_fault.o
+obj-$(CONFIG_ROCKCHIP_ARM64_ALIGN_FAULT_FIX) += fixup_fault.o fixup_fault_asm.o

arch/arm64/mm/fixup_fault_asm.S

@@ -0,0 +1,563 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright (C) 2025 Rockchip Electronics Co., Ltd.
+ */
+
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+
+/*
+ * u64 rk_align_get_data_asm(int n, int t);
+ * x0: n - vector register number
+ * w1: t - index selector
+ * returns: selected 64-bit data in x0
+ */
+SYM_FUNC_START(rk_align_get_data_asm)
+	cmp	w0, #31
+	b.gt	.Lget_default
+
+	// Create an index for the jump table
+	adr	x3, .Lget_jumptable
+	add	x3, x3, w0, uxtw #3  // Each entry is 8 bytes
+	br	x3
+
+.Lget_jumptable:
+	b	.Lget0
+	b	.Lget1
+	b	.Lget2
+	b	.Lget3
+	b	.Lget4
+	b	.Lget5
+	b	.Lget6
+	b	.Lget7
+	b	.Lget8
+	b	.Lget9
+	b	.Lget10
+	b	.Lget11
+	b	.Lget12
+	b	.Lget13
+	b	.Lget14
+	b	.Lget15
+	b	.Lget16
+	b	.Lget17
+	b	.Lget18
+	b	.Lget19
+	b	.Lget20
+	b	.Lget21
+	b	.Lget22
+	b	.Lget23
+	b	.Lget24
+	b	.Lget25
+	b	.Lget26
+	b	.Lget27
+	b	.Lget28
+	b	.Lget29
+	b	.Lget30
+	b	.Lget31
+
+.Lget0:
+	cbnz	w1, 1f
+	mov	x0, v0.d[0]
+	b	.Lget_end
+1:	mov	x0, v0.d[1]
+	b	.Lget_end
+
+.Lget1:
+	cbnz	w1, 1f
+	mov	x0, v1.d[0]
+	b	.Lget_end
+1:	mov	x0, v1.d[1]
+	b	.Lget_end
+
+.Lget2:
+	cbnz	w1, 1f
+	mov	x0, v2.d[0]
+	b	.Lget_end
+1:	mov	x0, v2.d[1]
+	b	.Lget_end
+
+.Lget3:
+	cbnz	w1, 1f
+	mov	x0, v3.d[0]
+	b	.Lget_end
+1:	mov	x0, v3.d[1]
+	b	.Lget_end
+
+.Lget4:
+	cbnz	w1, 1f
+	mov	x0, v4.d[0]
+	b	.Lget_end
+1:	mov	x0, v4.d[1]
+	b	.Lget_end
+
+.Lget5:
+	cbnz	w1, 1f
+	mov	x0, v5.d[0]
+	b	.Lget_end
+1:	mov	x0, v5.d[1]
+	b	.Lget_end
+
+.Lget6:
+	cbnz	w1, 1f
+	mov	x0, v6.d[0]
+	b	.Lget_end
+1:	mov	x0, v6.d[1]
+	b	.Lget_end
+
+.Lget7:
+	cbnz	w1, 1f
+	mov	x0, v7.d[0]
+	b	.Lget_end
+1:	mov	x0, v7.d[1]
+	b	.Lget_end
+
+.Lget8:
+	cbnz	w1, 1f
+	mov	x0, v8.d[0]
+	b	.Lget_end
+1:	mov	x0, v8.d[1]
+	b	.Lget_end
+
+.Lget9:
+	cbnz	w1, 1f
+	mov	x0, v9.d[0]
+	b	.Lget_end
+1:	mov	x0, v9.d[1]
+	b	.Lget_end
+
+.Lget10:
+	cbnz	w1, 1f
+	mov	x0, v10.d[0]
+	b	.Lget_end
+1:	mov	x0, v10.d[1]
+	b	.Lget_end
+
+.Lget11:
+	cbnz	w1, 1f
+	mov	x0, v11.d[0]
+	b	.Lget_end
+1:	mov	x0, v11.d[1]
+	b	.Lget_end
+
+.Lget12:
+	cbnz	w1, 1f
+	mov	x0, v12.d[0]
+	b	.Lget_end
+1:	mov	x0, v12.d[1]
+	b	.Lget_end
+
+.Lget13:
+	cbnz	w1, 1f
+	mov	x0, v13.d[0]
+	b	.Lget_end
+1:	mov	x0, v13.d[1]
+	b	.Lget_end
+
+.Lget14:
+	cbnz	w1, 1f
+	mov	x0, v14.d[0]
+	b	.Lget_end
+1:	mov	x0, v14.d[1]
+	b	.Lget_end
+
+.Lget15:
+	cbnz	w1, 1f
+	mov	x0, v15.d[0]
+	b	.Lget_end
+1:	mov	x0, v15.d[1]
+	b	.Lget_end
+
+.Lget16:
+	cbnz	w1, 1f
+	mov	x0, v16.d[0]
+	b	.Lget_end
+1:	mov	x0, v16.d[1]
+	b	.Lget_end
+
+.Lget17:
+	cbnz	w1, 1f
+	mov	x0, v17.d[0]
+	b	.Lget_end
+1:	mov	x0, v17.d[1]
+	b	.Lget_end
+
+.Lget18:
+	cbnz	w1, 1f
+	mov	x0, v18.d[0]
+	b	.Lget_end
+1:	mov	x0, v18.d[1]
+	b	.Lget_end
+
+.Lget19:
+	cbnz	w1, 1f
+	mov	x0, v19.d[0]
+	b	.Lget_end
+1:	mov	x0, v19.d[1]
+	b	.Lget_end
+
+.Lget20:
+	cbnz	w1, 1f
+	mov	x0, v20.d[0]
+	b	.Lget_end
+1:	mov	x0, v20.d[1]
+	b	.Lget_end
+
+.Lget21:
+	cbnz	w1, 1f
+	mov	x0, v21.d[0]
+	b	.Lget_end
+1:	mov	x0, v21.d[1]
+	b	.Lget_end
+
+.Lget22:
+	cbnz	w1, 1f
+	mov	x0, v22.d[0]
+	b	.Lget_end
+1:	mov	x0, v22.d[1]
+	b	.Lget_end
+
+.Lget23:
+	cbnz	w1, 1f
+	mov	x0, v23.d[0]
+	b	.Lget_end
+1:	mov	x0, v23.d[1]
+	b	.Lget_end
+
+.Lget24:
+	cbnz	w1, 1f
+	mov	x0, v24.d[0]
+	b	.Lget_end
+1:	mov	x0, v24.d[1]
+	b	.Lget_end
+
+.Lget25:
+	cbnz	w1, 1f
+	mov	x0, v25.d[0]
+	b	.Lget_end
+1:	mov	x0, v25.d[1]
+	b	.Lget_end
+
+.Lget26:
+	cbnz	w1, 1f
+	mov	x0, v26.d[0]
+	b	.Lget_end
+1:	mov	x0, v26.d[1]
+	b	.Lget_end
+
+.Lget27:
+	cbnz	w1, 1f
+	mov	x0, v27.d[0]
+	b	.Lget_end
+1:	mov	x0, v27.d[1]
+	b	.Lget_end
+
+.Lget28:
+	cbnz	w1, 1f
+	mov	x0, v28.d[0]
+	b	.Lget_end
+1:	mov	x0, v28.d[1]
+	b	.Lget_end
+
+.Lget29:
+	cbnz	w1, 1f
+	mov	x0, v29.d[0]
+	b	.Lget_end
+1:	mov	x0, v29.d[1]
+	b	.Lget_end
+
+.Lget30:
+	cbnz	w1, 1f
+	mov	x0, v30.d[0]
+	b	.Lget_end
+1:	mov	x0, v30.d[1]
+	b	.Lget_end
+
+.Lget31:
+	cbnz	w1, 1f
+	mov	x0, v31.d[0]
+	b	.Lget_end
+1:	mov	x0, v31.d[1]
+	b	.Lget_end
+
+.Lget_default:
+	mov	x0, #0
+
+.Lget_end:
+	ret
+SYM_FUNC_END(rk_align_get_data_asm)
+
+/*
+ * void rk_align_set_data_asm(int n, int t, u64 val);
+ * x0: n - vector register number
+ * w1: t - index selector
+ * x2: val - 64-bit value to set
+ */
+SYM_FUNC_START(rk_align_set_data_asm)
+	cmp	w0, #31
+	b.gt	.Lset_end
+
+	// Create an index for the jump table
+	adr	x3, .Lset_jumptable
+	add	x3, x3, w0, uxtw #3  // Each entry is 8 bytes
+	br	x3
+
+.Lset_jumptable:
+	b	.Lset0
+	b	.Lset1
+	b	.Lset2
+	b	.Lset3
+	b	.Lset4
+	b	.Lset5
+	b	.Lset6
+	b	.Lset7
+	b	.Lset8
+	b	.Lset9
+	b	.Lset10
+	b	.Lset11
+	b	.Lset12
+	b	.Lset13
+	b	.Lset14
+	b	.Lset15
+	b	.Lset16
+	b	.Lset17
+	b	.Lset18
+	b	.Lset19
+	b	.Lset20
+	b	.Lset21
+	b	.Lset22
+	b	.Lset23
+	b	.Lset24
+	b	.Lset25
+	b	.Lset26
+	b	.Lset27
+	b	.Lset28
+	b	.Lset29
+	b	.Lset30
+	b	.Lset31
+
+.Lset0:
+	cbnz	w1, 1f
+	mov	v0.d[0], x2
+	b	.Lset_end
+1:	mov	v0.d[1], x2
+	b	.Lset_end
+
+.Lset1:
+	cbnz	w1, 1f
+	mov	v1.d[0], x2
+	b	.Lset_end
+1:	mov	v1.d[1], x2
+	b	.Lset_end
+
+.Lset2:
+	cbnz	w1, 1f
+	mov	v2.d[0], x2
+	b	.Lset_end
+1:	mov	v2.d[1], x2
+	b	.Lset_end
+
+.Lset3:
+	cbnz	w1, 1f
+	mov	v3.d[0], x2
+	b	.Lset_end
+1:	mov	v3.d[1], x2
+	b	.Lset_end
+
+.Lset4:
+	cbnz	w1, 1f
+	mov	v4.d[0], x2
+	b	.Lset_end
+1:	mov	v4.d[1], x2
+	b	.Lset_end
+
+.Lset5:
+	cbnz	w1, 1f
+	mov	v5.d[0], x2
+	b	.Lset_end
+1:	mov	v5.d[1], x2
+	b	.Lset_end
+
+.Lset6:
+	cbnz	w1, 1f
+	mov	v6.d[0], x2
+	b	.Lset_end
+1:	mov	v6.d[1], x2
+	b	.Lset_end
+
+.Lset7:
+	cbnz	w1, 1f
+	mov	v7.d[0], x2
+	b	.Lset_end
+1:	mov	v7.d[1], x2
+	b	.Lset_end
+
+.Lset8:
+	cbnz	w1, 1f
+	mov	v8.d[0], x2
+	b	.Lset_end
+1:	mov	v8.d[1], x2
+	b	.Lset_end
+
+.Lset9:
+	cbnz	w1, 1f
+	mov	v9.d[0], x2
+	b	.Lset_end
+1:	mov	v9.d[1], x2
+	b	.Lset_end
+
+.Lset10:
+	cbnz	w1, 1f
+	mov	v10.d[0], x2
+	b	.Lset_end
+1:	mov	v10.d[1], x2
+	b	.Lset_end
+
+.Lset11:
+	cbnz	w1, 1f
+	mov	v11.d[0], x2
+	b	.Lset_end
+1:	mov	v11.d[1], x2
+	b	.Lset_end
+
+.Lset12:
+	cbnz	w1, 1f
+	mov	v12.d[0], x2
+	b	.Lset_end
+1:	mov	v12.d[1], x2
+	b	.Lset_end
+
+.Lset13:
+	cbnz	w1, 1f
+	mov	v13.d[0], x2
+	b	.Lset_end
+1:	mov	v13.d[1], x2
+	b	.Lset_end
+
+.Lset14:
+	cbnz	w1, 1f
+	mov	v14.d[0], x2
+	b	.Lset_end
+1:	mov	v14.d[1], x2
+	b	.Lset_end
+
+.Lset15:
+	cbnz	w1, 1f
+	mov	v15.d[0], x2
+	b	.Lset_end
+1:	mov	v15.d[1], x2
+	b	.Lset_end
+
+.Lset16:
+	cbnz	w1, 1f
+	mov	v16.d[0], x2
+	b	.Lset_end
+1:	mov	v16.d[1], x2
+	b	.Lset_end
+
+.Lset17:
+	cbnz	w1, 1f
+	mov	v17.d[0], x2
+	b	.Lset_end
+1:	mov	v17.d[1], x2
+	b	.Lset_end
+
+.Lset18:
+	cbnz	w1, 1f
+	mov	v18.d[0], x2
+	b	.Lset_end
+1:	mov	v18.d[1], x2
+	b	.Lset_end
+
+.Lset19:
+	cbnz	w1, 1f
+	mov	v19.d[0], x2
+	b	.Lset_end
+1:	mov	v19.d[1], x2
+	b	.Lset_end
+
+.Lset20:
+	cbnz	w1, 1f
+	mov	v20.d[0], x2
+	b	.Lset_end
+1:	mov	v20.d[1], x2
+	b	.Lset_end
+
+.Lset21:
+	cbnz	w1, 1f
+	mov	v21.d[0], x2
+	b	.Lset_end
+1:	mov	v21.d[1], x2
+	b	.Lset_end
+
+.Lset22:
+	cbnz	w1, 1f
+	mov	v22.d[0], x2
+	b	.Lset_end
+1:	mov	v22.d[1], x2
+	b	.Lset_end
+
+.Lset23:
+	cbnz	w1, 1f
+	mov	v23.d[0], x2
+	b	.Lset_end
+1:	mov	v23.d[1], x2
+	b	.Lset_end
+
+.Lset24:
+	cbnz	w1, 1f
+	mov	v24.d[0], x2
+	b	.Lset_end
+1:	mov	v24.d[1], x2
+	b	.Lset_end
+
+.Lset25:
+	cbnz	w1, 1f
+	mov	v25.d[0], x2
+	b	.Lset_end
+1:	mov	v25.d[1], x2
+	b	.Lset_end
+
+.Lset26:
+	cbnz	w1, 1f
+	mov	v26.d[0], x2
+	b	.Lset_end
+1:	mov	v26.d[1], x2
+	b	.Lset_end
+
+.Lset27:
+	cbnz	w1, 1f
+	mov	v27.d[0], x2
+	b	.Lset_end
+1:	mov	v27.d[1], x2
+	b	.Lset_end
+
+.Lset28:
+	cbnz	w1, 1f
+	mov	v28.d[0], x2
+	b	.Lset_end
+1:	mov	v28.d[1], x2
+	b	.Lset_end
+
+.Lset29:
+	cbnz	w1, 1f
+	mov	v29.d[0], x2
+	b	.Lset_end
+1:	mov	v29.d[1], x2
+	b	.Lset_end
+
+.Lset30:
+	cbnz	w1, 1f
+	mov	v30.d[0], x2
+	b	.Lset_end
+1:	mov	v30.d[1], x2
+	b	.Lset_end
+
+.Lset31:
+	cbnz	w1, 1f
+	mov	v31.d[0], x2
+	b	.Lset_end
+1:	mov	v31.d[1], x2
+
+.Lset_end:
+	ret
+SYM_FUNC_END(rk_align_set_data_asm)

drivers/media/i2c/ps5458.c

@@ -42,7 +42,7 @@
 					 /PS5458_BITS_PER_SAMPLE)
 #define PS5458_XVCLK_FREQ		24000000
 
-#define CHIP_ID				0x1654
+#define CHIP_ID				0x5416
 #define PS5458_REG_CHIP_ID		0x0000
 
 #define PS5458_REG_CTRL_MODE		0x0008
@@ -1938,12 +1938,12 @@ static int ps5458_check_sensor_id(struct ps5458 *ps5458,
 
 	ret = ps5458_read_reg(client, PS5458_REG_CHIP_ID,
 			       PS5458_REG_VALUE_16BIT, &id);
-	if (id != CHIP_ID) {
-		dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
+	if (__cpu_to_be16(id) != CHIP_ID) {
+		dev_err(dev, "Unexpected sensor id(%04x), ret(%d)\n", __cpu_to_be16(id), ret);
 		return -ENODEV;
 	}
 
-	dev_info(dev, "Detected OV%06x sensor\n", CHIP_ID);
+	dev_info(dev, "Detected PS%04x sensor\n", CHIP_ID);
 
 	return 0;
 }

drivers/media/i2c/rk628/rk628.c

@@ -276,7 +276,13 @@ int rk628_media_i2c_write(struct rk628 *rk628, u32 reg, u32 val)
 		return -EINVAL;
 	}
 
-	ret = regmap_write(rk628->regmap[region], reg, val);
+	if (region == RK628_DEV_HDMIRX) {
+		mutex_lock(&rk628->rst_lock);
+		ret = regmap_write(rk628->regmap[region], reg, val);
+		mutex_unlock(&rk628->rst_lock);
+	} else {
+		ret = regmap_write(rk628->regmap[region], reg, val);
+	}
 	if (ret < 0)
 		dev_err(rk628->dev,
 			"%s: i2c err reg=0x%x, val=0x%x, ret=%d\n", __func__, reg, val, ret);
@@ -296,7 +302,13 @@ int rk628_media_i2c_read(struct rk628 *rk628, u32 reg, u32 *val)
 		return -EINVAL;
 	}
 
-	ret = regmap_read(rk628->regmap[region], reg, val);
+	if (region == RK628_DEV_HDMIRX) {
+		mutex_lock(&rk628->rst_lock);
+		ret = regmap_read(rk628->regmap[region], reg, val);
+		mutex_unlock(&rk628->rst_lock);
+	} else {
+		ret = regmap_read(rk628->regmap[region], reg, val);
+	}
 	if (ret < 0)
 		dev_err(rk628->dev,
 			"%s: i2c err reg=0x%x, val=0x%x ret=%d\n", __func__, reg, *val, ret);
@@ -309,6 +321,7 @@ int rk628_media_i2c_update_bits(struct rk628 *rk628, u32 reg, u32 mask,
 					u32 val)
 {
 	int region = (reg >> 16) & 0xff;
+	int ret;
 
 	if (region >= RK628_DEV_MAX) {
 		dev_err(rk628->dev,
@@ -316,7 +329,15 @@ int rk628_media_i2c_update_bits(struct rk628 *rk628, u32 reg, u32 mask,
 		return -EINVAL;
 	}
 
-	return regmap_update_bits(rk628->regmap[region], reg, mask, val);
+	if (region == RK628_DEV_HDMIRX) {
+		mutex_lock(&rk628->rst_lock);
+		ret = regmap_update_bits(rk628->regmap[region], reg, mask, val);
+		mutex_unlock(&rk628->rst_lock);
+	} else {
+		ret = regmap_update_bits(rk628->regmap[region], reg, mask, val);
+	}
+
+	return ret;
 }
 EXPORT_SYMBOL(rk628_media_i2c_update_bits);
 

drivers/media/i2c/rk628/rk628.h

@@ -306,6 +306,8 @@ struct rk628 {
 	bool dual_mipi;
 	struct mipi_timing mipi_timing[2];
 	struct mutex rst_lock;
+	int dvi_mode;
+	int vic;
 	int tx_mode;
 	int dbg_en;
 	struct dentry *debug_dir;

drivers/media/i2c/rk628/rk628_bt1120_v4l2.c

@@ -347,6 +347,7 @@ static void rk628_hdmirx_plugout(struct v4l2_subdev *sd)
 	rk628_bt1120_enable_interrupts(sd, false);
 	cancel_delayed_work(&bt1120->delayed_work_res_change);
 	rk628_hdmirx_audio_cancel_work_audio(bt1120->audio_info, true);
+	rk628_bt1120_hdmirx_reset(sd);
 	rk628_hdmirx_hpd_ctrl(sd, false);
 	rk628_hdmirx_inno_phy_power_off(sd);
 	rk628_hdmirx_verisyno_phy_power_off(bt1120->rk628);
@@ -431,7 +432,7 @@ static void rk628_bt1120_delayed_work_enable_hotplug(struct work_struct *work)
 	if (plugin) {
 		rk628_set_io_func_to_vop(bt1120->rk628);
 		rk628_bt1120_enable_interrupts(sd, false);
-		cancel_delayed_work_sync(&bt1120->delayed_work_res_change);
+		cancel_delayed_work(&bt1120->delayed_work_res_change);
 		rk628_hdmirx_audio_setup(bt1120->audio_info);
 		rk628_hdmirx_set_hdcp(bt1120->rk628, &bt1120->hdcp, bt1120->hdcp.enable);
 		rk628_hdmirx_controller_setup(bt1120->rk628);
@@ -498,6 +499,7 @@ static void rk628_delayed_work_res_change(struct work_struct *work)
 			if (bt1120->rk628->version >= RK628F_VERSION) {
 				rk628_bt1120_enable_interrupts(sd, false);
 				rk628_hdmirx_audio_cancel_work_audio(bt1120->audio_info, true);
+				rk628_bt1120_hdmirx_reset(sd);
 				rk628_hdmirx_verisyno_phy_power_off(bt1120->rk628);
 				schedule_delayed_work(&bt1120->delayed_work_enable_hotplug,
 						      msecs_to_jiffies(100));
@@ -516,6 +518,7 @@ static void rk628_delayed_work_res_change(struct work_struct *work)
 			}
 		} else {
 			rk628_bt1120_format_change(sd);
+			bt1120->nosignal = false;
 			rk628_bt1120_enable_interrupts(sd, true);
 		}
 	}
@@ -1120,11 +1123,9 @@ static int rk628_hdmirx_isr(struct v4l2_subdev *sd, u32 status, bool *handled)
 {
 	struct rk628_bt1120 *bt1120 = to_bt1120(sd);
 
-	mutex_lock(&bt1120->rk628->rst_lock);
 	rk628_hdmirx_general_isr(sd, status, handled);
 	if (bt1120->cec_enable && bt1120->cec)
 		rk628_hdmirx_cec_irq(bt1120->rk628, bt1120->cec);
-	mutex_unlock(&bt1120->rk628->rst_lock);
 
 	rk628_bt1120_clear_hdmirx_interrupts(sd);
 

drivers/media/i2c/rk628/rk628_csi_v4l2.c

@@ -510,6 +510,7 @@ static void rk628_hdmirx_plugout(struct v4l2_subdev *sd)
 	rk628_csi_enable_interrupts(sd, false);
 	cancel_delayed_work(&csi->delayed_work_res_change);
 	rk628_hdmirx_audio_cancel_work_audio(csi->audio_info, true);
+	rk628_csi_hdmirx_reset(sd);
 	rk628_hdmirx_hpd_ctrl(sd, false);
 	rk628_hdmirx_inno_phy_power_off(sd);
 	rk628_hdmirx_verisyno_phy_power_off(csi->rk628);
@@ -567,7 +568,7 @@ static void rk628_csi_delayed_work_enable_hotplug(struct work_struct *work)
 	if (plugin) {
 		extcon_set_state_sync(csi->extcon, EXTCON_JACK_VIDEO_IN, true);
 		rk628_csi_enable_interrupts(sd, false);
-		cancel_delayed_work_sync(&csi->delayed_work_res_change);
+		cancel_delayed_work(&csi->delayed_work_res_change);
 		rk628_hdmirx_audio_setup(csi->audio_info);
 		rk628_hdmirx_set_hdcp(csi->rk628, &csi->hdcp, csi->hdcp.enable);
 		rk628_hdmirx_controller_setup(csi->rk628);
@@ -632,13 +633,14 @@ static void rk628_delayed_work_res_change(struct work_struct *work)
 			if (csi->rk628->version >= RK628F_VERSION) {
 				rk628_csi_enable_interrupts(sd, false);
 				rk628_hdmirx_audio_cancel_work_audio(csi->audio_info, true);
+				rk628_csi_hdmirx_reset(sd);
 				rk628_hdmirx_verisyno_phy_power_off(csi->rk628);
 				schedule_delayed_work(&csi->delayed_work_enable_hotplug,
 						      msecs_to_jiffies(100));
 			} else {
 				rk628_hdmirx_audio_cancel_work_audio(csi->audio_info, true);
 				rk628_hdmirx_inno_phy_power_off(sd);
-				rk628_hdmirx_controller_reset(csi->rk628);
+				rk628_csi_hdmirx_reset(sd);
 				rk628_hdmirx_audio_setup(csi->audio_info);
 				rk628_hdmirx_set_hdcp(csi->rk628, &csi->hdcp, csi->hdcp.enable);
 				rk628_hdmirx_controller_setup(csi->rk628);
@@ -651,6 +653,7 @@ static void rk628_delayed_work_res_change(struct work_struct *work)
 			}
 		} else {
 			rk628_csi_format_change(sd);
+			csi->nosignal = false;
 			rk628_csi_enable_interrupts(sd, true);
 		}
 	}
@@ -1852,11 +1855,9 @@ static int rk628_hdmirx_isr(struct v4l2_subdev *sd, u32 status, bool *handled)
 {
 	struct rk628_csi *csi = to_csi(sd);
 
-	mutex_lock(&csi->rk628->rst_lock);
 	rk628_hdmirx_general_isr(sd, status, handled);
 	if (csi->cec_enable && csi->cec)
 		rk628_hdmirx_cec_irq(csi->rk628, csi->cec);
-	mutex_unlock(&csi->rk628->rst_lock);
 
 	rk628_csi_clear_hdmirx_interrupts(sd);
 
@@ -2530,7 +2531,6 @@ static long rk628_csi_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
 	long ret = 0;
 	struct rkmodule_csi_dphy_param *dphy_param;
 	struct rkmodule_capture_info  *capture_info;
-	u32 val;
 	u32 stream = 0;
 	int edid_version, i;
 
@@ -2583,8 +2583,7 @@ static long rk628_csi_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
 		*(int *)arg = rk628_hdmirx_get_hdcp_enc_status(csi->rk628);
 		break;
 	case RK_HDMIRX_CMD_GET_INPUT_MODE:
-		rk628_i2c_read(csi->rk628, HDMI_RX_PDEC_STS, &val);
-		*(int *)arg = val & DVI_DET;
+		*(int *)arg = csi->rk628->dvi_mode;
 		break;
 	case RK_HDMIRX_CMD_GET_SIGNAL_STABLE_STATUS:
 		*(int *)arg = !csi->nosignal;
@@ -2601,10 +2600,10 @@ static long rk628_csi_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
 	case RK_HDMIRX_CMD_SET_EDID_MODE:
 		break;
 	case RK_HDMIRX_CMD_GET_COLOR_RANGE:
-		*(int *)arg = rk628_hdmirx_get_range(csi->rk628);
+		*(int *)arg = csi->rk628->color_range;
 		break;
 	case RK_HDMIRX_CMD_GET_COLOR_SPACE:
-		*(int *)arg = rk628_hdmirx_get_color_space(csi->rk628);
+		*(int *)arg = csi->rk628->color_space;
 		break;
 	case RKMODULE_GET_DSI_MODE:
 		*(int *)arg = csi->dsi.vid_mode;

drivers/media/i2c/rk628/rk628_hdmirx.c

@@ -1126,10 +1126,8 @@ static int rk628_hdmirx_cec_log_addr(struct cec_adapter *adap, u8 logical_addr)
 	else
 		cec->addresses |= BIT(logical_addr) | BIT(15);
 
-	mutex_lock(&rk628->rst_lock);
 	rk628_i2c_write(rk628, HDMI_RX_CEC_ADDR_L, cec->addresses & 0xff);
 	rk628_i2c_write(rk628, HDMI_RX_CEC_ADDR_H, (cec->addresses >> 8) & 0xff);
-	mutex_unlock(&rk628->rst_lock);
 
 	return 0;
 }
@@ -1139,7 +1137,6 @@ static int rk628_hdmirx_cec_enable(struct cec_adapter *adap, bool enable)
 	struct rk628_hdmirx_cec *cec = cec_get_drvdata(adap);
 	struct rk628 *rk628 = cec->rk628;
 
-	mutex_lock(&rk628->rst_lock);
 	if (!enable) {
 		rk628_i2c_write(rk628, HDMI_RX_AUD_CEC_IEN_CLR, ~0);
 		rk628_i2c_update_bits(rk628, HDMI_RX_DMI_DISABLE_IF, CEC_ENABLE_MASK, 0);
@@ -1156,7 +1153,6 @@ static int rk628_hdmirx_cec_enable(struct cec_adapter *adap, bool enable)
 		irqs = ERROR_INIT_ENSET | NACK_ENSET | EOM_ENSET | DONE_ENSET;
 		rk628_i2c_write(rk628, HDMI_RX_AUD_CEC_IEN_SET, irqs);
 	}
-	mutex_unlock(&rk628->rst_lock);
 
 	return 0;
 }
@@ -1188,13 +1184,11 @@ static int rk628_hdmirx_cec_transmit(struct cec_adapter *adap, u8 attempts,
 	if (msg_len <= 0)
 		return 0;
 
-	mutex_lock(&rk628->rst_lock);
 	for (i = 0; i < msg_len; i++)
 		rk628_i2c_write(rk628, HDMI_RX_CEC_TX_DATA_0 + i * 4, msg->msg[i]);
 
 	rk628_i2c_write(rk628, HDMI_RX_CEC_TX_CNT, msg_len);
 	rk628_i2c_write(rk628, HDMI_RX_CEC_CTRL, ctrl | CEC_SEND);
-	mutex_unlock(&rk628->rst_lock);
 
 	return 0;
 }
@@ -1298,7 +1292,6 @@ struct rk628_hdmirx_cec *rk628_hdmirx_cec_register(struct rk628 *rk628)
 	rk628_i2c_update_bits(rk628, HDMI_RX_DMI_DISABLE_IF, CEC_ENABLE_MASK, CEC_ENABLE_MASK);
 
 	rk628_i2c_write(rk628, HDMI_RX_CEC_TX_CNT, 0);
-	rk628_i2c_write(rk628, HDMI_RX_CEC_RX_CNT, 0);
 	/* clk_hdmirx_cec = 32.768k */
 	rk628_clk_set_rate(rk628, CGU_CLK_HDMIRX_CEC, 32768);
 
@@ -1633,6 +1626,7 @@ static int rk628_hdmirx_read_timing(struct rk628 *rk628,
 
 	rk628_i2c_read(rk628, HDMI_RX_PDEC_AVI_PB, &val);
 	vic = (val & VID_IDENT_CODE_MASK) >> 24;
+	rk628->vic = vic;
 	rk628_i2c_read(rk628, HDMI_RX_PDEC_GCP_AVMUTE, &format);
 	format = (format & PKTDEC_GCP_CD_MASK) >> 4;
 	video_fmt = rk628_hdmirx_get_format(rk628);
@@ -1641,6 +1635,8 @@ static int rk628_hdmirx_read_timing(struct rk628 *rk628,
 	rk628->color_range = color_range;
 	color_space = rk628_hdmirx_get_color_space(rk628);
 	rk628->color_space = color_space;
+	rk628_i2c_read(rk628, HDMI_RX_PDEC_STS, &val);
+	rk628->dvi_mode = val & DVI_DET;
 	if (video_fmt == BUS_FMT_YUV420) {
 		//format:color depth, 5: 10bit, 4: 8bit
 		if (format == 5) {
@@ -1865,12 +1861,12 @@ void rk628_hdmirx_controller_reset(struct rk628 *rk628)
 	udelay(10);
 	rk628_control_deassert(rk628, RGU_HDMIRX);
 	rk628_control_deassert(rk628, RGU_HDMIRX_PON);
-	udelay(10);
+	usleep_range(20 * 1000, 20 * 1100);
+	mutex_unlock(&rk628->rst_lock);
 	rk628_i2c_write(rk628, HDMI_RX_DMI_SW_RST, 0x000101ff);
 	rk628_i2c_write(rk628, HDMI_RX_DMI_DISABLE_IF, 0x00000000);
 	rk628_i2c_write(rk628, HDMI_RX_DMI_DISABLE_IF, 0x0000017f);
 	rk628_i2c_write(rk628, HDMI_RX_DMI_DISABLE_IF, 0x0001017f);
-	mutex_unlock(&rk628->rst_lock);
 }
 EXPORT_SYMBOL(rk628_hdmirx_controller_reset);