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drm/rockchip: vop: Do not clear wb intr status when commit new wb
If a new wb commit is too close to the timing of wb dma complete, clearing the wb intr status will lose the wb dma complete status. In this case, the software process is as follows: vop_wb_commit() -> vop_wb_irqs_enable() -> Clear wb intr -> vop_isr() -> vop_read_and_clear_wb_irqs() Since we had cleared the intr in vop_wb_irqs_enable(), the value read by vop_read_and_clear_wb_irqs() is 0, and we have lost the interrupt status. Change-Id: Ida08e94ce1d987f7edbcb6448c0b3f034add1bce Signed-off-by: Chaoyi Chen <chaoyi.chen@rock-chips.com>
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@@ -1805,7 +1805,6 @@ static void vop_wb_irqs_enable(struct vop *vop)
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uint32_t irqs = VOPL_WB_UV_FIFO_FULL_INTR | VOPL_WB_YRGB_FIFO_FULL_INTR |
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VOPL_WB_COMPLETE_INTR;
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VOP_INTR_SET_TYPE2(vop, intr, clear, irqs, 1);
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VOP_INTR_SET_TYPE2(vop, intr, enable, irqs, 1);
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}
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