arm64: dts: qcom: sm8450: add spmi node

Add the spmi bus as found in the SM8450 SoC

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
[Konrad: 0x0 -> 0, move #cells down, make reg-names a vertical list]
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
[bjorn: Adjusted unit address]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221229103212.984324-1-konrad.dybcio@linaro.org
This commit is contained in:
Vinod Koul
2022-12-29 11:32:06 +01:00
committed by Bjorn Andersson
parent 433477c3bf
commit f891f86e47

View File

@@ -3004,6 +3004,28 @@
#clock-cells = <0>;
};
spmi_bus: spmi@c400000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0 0x0c400000 0 0x00003000>,
<0 0x0c500000 0 0x00400000>,
<0 0x0c440000 0 0x00080000>,
<0 0x0c4c0000 0 0x00010000>,
<0 0x0c42d000 0 0x00010000>;
reg-names = "core",
"chnls",
"obsrvr",
"intr",
"cnfg";
interrupt-names = "periph_irq";
interrupts-extended = <&pdc 1 IRQ_TYPE_LEVEL_HIGH>;
qcom,ee = <0>;
qcom,channel = <0>;
interrupt-controller;
#interrupt-cells = <4>;
#address-cells = <2>;
#size-cells = <0>;
};
ipcc: mailbox@ed18000 {
compatible = "qcom,sm8450-ipcc", "qcom,ipcc";
reg = <0 0x0ed18000 0 0x1000>;