ARM: dts: sun6i: Enable tcon0 by default

tcon0 contains a muxing register used to mux tcon output to downstream
hdmi or mipi dsi encoders. tcon0 must be available for the mux to be
configured.

Whether the display subsystem is enabled or not is now solely controlled
by the display-engine node.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Chen-Yu Tsai
2017-04-21 16:38:57 +08:00
committed by Maxime Ripard
parent 9a26882a73
commit f89f2a37cc
2 changed files with 0 additions and 2 deletions

View File

@@ -319,7 +319,6 @@
&tcon0 {
pinctrl-names = "default";
pinctrl-0 = <&lcd0_rgb888_pins>;
status = "okay";
};
&tcon0_out {

View File

@@ -264,7 +264,6 @@
"tcon-ch0",
"tcon-ch1";
clock-output-names = "tcon0-pixel-clock";
status = "disabled";
ports {
#address-cells = <1>;