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ARM: dts: sun6i: Enable tcon0 by default
tcon0 contains a muxing register used to mux tcon output to downstream hdmi or mipi dsi encoders. tcon0 must be available for the mux to be configured. Whether the display subsystem is enabled or not is now solely controlled by the display-engine node. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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committed by
Maxime Ripard
parent
9a26882a73
commit
f89f2a37cc
@@ -319,7 +319,6 @@
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&tcon0 {
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pinctrl-names = "default";
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pinctrl-0 = <&lcd0_rgb888_pins>;
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status = "okay";
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};
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&tcon0_out {
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@@ -264,7 +264,6 @@
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"tcon-ch0",
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"tcon-ch1";
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clock-output-names = "tcon0-pixel-clock";
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status = "disabled";
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ports {
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#address-cells = <1>;
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