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rk: move fiq.c from mach-rk30 to plat-rk

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add GIC_DIST_BASE, GIC_CPU_BASE, IRQ_DEBUG_UART macro
rename rk30_fiq_init to rk_fiq_init
This commit is contained in:
黄涛
2012-07-05 17:16:55 +08:00
parent 5114a79469
commit f8dbfea945
9 changed files with 27 additions and 25 deletions
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1
arch/arm/mach-rk30/Makefile
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@@ -10,7 +10,6 @@ obj-y += pmu.o
obj-y += reset.o
obj-y += timer.o
obj-y += tsadc.o
obj-$(CONFIG_FIQ) += fiq.o
obj-$(CONFIG_SMP) += platsmp.o headsmp.o
obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
obj-$(CONFIG_LOCAL_TIMERS) += localtimer.o

2
arch/arm/mach-rk30/common.c
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@@ -119,7 +119,7 @@ void __init rk30_init_irq(void)
{
gic_init(0, IRQ_LOCALTIMER, RK30_GICD_BASE, RK30_GICC_BASE);
#ifdef CONFIG_FIQ
rk30_fiq_init();
rk_fiq_init();
#endif
rk30_gpio_init();
}

2
arch/arm/mach-rk30/devices.c
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@@ -1164,7 +1164,7 @@ static int __init rk30_init_devices(void)
platform_device_register(&device_tsadc);
rk30_init_sdmmc();
#if defined(CONFIG_FIQ_DEBUGGER) && defined(DEBUG_UART_PHYS)
rk_serial_debug_init(DEBUG_UART_BASE, IRQ_UART0 + CONFIG_RK_DEBUG_UART, IRQ_UART_SIGNAL, -1);
rk_serial_debug_init(DEBUG_UART_BASE, IRQ_DEBUG_UART, IRQ_UART_SIGNAL, -1);
#endif
rk30_init_i2s();
#ifdef CONFIG_RK29_VMAC

7
arch/arm/mach-rk30/include/mach/fiq.h
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@@ -1,8 +1 @@
#ifndef __ASM_ARCH_RK30_FIQ_H
#define __ASM_ARCH_RK30_FIQ_H
#include <plat/fiq.h>
void rk30_fiq_init(void);
#endif

3
arch/arm/mach-rk30/include/mach/io.h
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@@ -228,4 +228,7 @@
#define DEBUG_UART_BASE RK30_UART3_BASE
#endif
#define GIC_DIST_BASE RK30_GICD_BASE
#define GIC_CPU_BASE RK30_GICC_BASE
#endif

3
arch/arm/mach-rk30/include/mach/irqs.h
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@@ -86,6 +86,9 @@
//hhb@rock-chips.com this spi is used for fiq_debugger signal irq
#define IRQ_UART_SIGNAL RK30XX_IRQ(80)
#if CONFIG_RK_DEBUG_UART >= 0 && CONFIG_RK_DEBUG_UART < 4
#define IRQ_DEBUG_UART (IRQ_UART0 + CONFIG_RK_DEBUG_UART)
#endif
#define NR_GIC_IRQS (5 * 32)
#define NR_GPIO_IRQS (6 * 32)

1
arch/arm/plat-rk/Makefile
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@@ -2,6 +2,7 @@ obj-$(CONFIG_RK29_LAST_LOG) += last_log.o
obj-$(CONFIG_USB_GADGET) += usb_detect.o
obj-$(CONFIG_RK29_VPU) += vpu_service.o
obj-$(CONFIG_ARCH_RK30) += dma-pl330.o
obj-$(CONFIG_FIQ) += fiq.o
obj-$(CONFIG_FIQ_DEBUGGER) += rk_fiq_debugger.o
obj-$(CONFIG_RK_EARLY_PRINTK) += early_printk.o ../kernel/debug.o
obj-y += mem_reserve.o

32
arch/arm/mach-rk30/fiq.c → arch/arm/plat-rk/fiq.c
View File

@@ -34,10 +34,10 @@
#define FIRST_SGI_PPI_IRQ 32
static void rk30_fiq_mask(struct irq_data *d)
static void rk_fiq_mask(struct irq_data *d)
{
u32 i = 0;
void __iomem *base = RK30_GICD_BASE;
void __iomem *base = GIC_DIST_BASE;
if (d->irq < FIRST_SGI_PPI_IRQ)
return;
@@ -50,10 +50,10 @@ static void rk30_fiq_mask(struct irq_data *d)
dsb();
}
static void rk30_fiq_unmask(struct irq_data *d)
static void rk_fiq_unmask(struct irq_data *d)
{
u32 i = 0;
void __iomem *base = RK30_GICD_BASE;
void __iomem *base = GIC_DIST_BASE;
if (d->irq < FIRST_SGI_PPI_IRQ)
return;
@@ -68,42 +68,44 @@ static void rk30_fiq_unmask(struct irq_data *d)
void rk_fiq_enable(int irq)
{
rk30_fiq_unmask(irq_get_irq_data(irq));
rk_fiq_unmask(irq_get_irq_data(irq));
enable_fiq(irq);
}
void rk_fiq_disable(int irq)
{
rk30_fiq_mask(irq_get_irq_data(irq));
rk_fiq_mask(irq_get_irq_data(irq));
disable_fiq(irq);
}
void rk_irq_setpending(int irq)
{
writel_relaxed(1<<(irq%32), RK30_GICD_BASE + GIC_DIST_PENDING_SET + (irq/32)*4);
writel_relaxed(1<<(irq%32), GIC_DIST_BASE + GIC_DIST_PENDING_SET + (irq/32)*4);
dsb();
}
void rk_irq_clearpending(int irq)
{
writel_relaxed(1<<(irq%32), RK30_GICD_BASE + GIC_DIST_PENDING_CLEAR + (irq/32)*4);
writel_relaxed(1<<(irq%32), GIC_DIST_BASE + GIC_DIST_PENDING_CLEAR + (irq/32)*4);
dsb();
}
void rk30_fiq_init(void)
void rk_fiq_init(void)
{
unsigned int gic_irqs, i;
// read gic info to know how many irqs in our chip
gic_irqs = readl_relaxed(RK30_GICD_BASE + GIC_DIST_CTR) & 0x1f;
gic_irqs = readl_relaxed(GIC_DIST_BASE + GIC_DIST_CTR) & 0x1f;
// set all the interrupt to non-secure state
for (i = 0; i < (gic_irqs + 1); i++) {
writel_relaxed(0xffffffff, RK30_GICD_BASE + GIC_DIST_SECURITY + (i<<2));
writel_relaxed(0xffffffff, GIC_DIST_BASE + GIC_DIST_SECURITY + (i<<2));
}
dsb();
writel_relaxed(0x3, RK30_GICD_BASE + GIC_DIST_CTRL);
writel_relaxed(0x0f, RK30_GICC_BASE + GIC_CPU_CTRL);
//set the uart 2(the debug port) priority a little higher than other interrupts
writel_relaxed(0xa0a0a090, RK30_GICD_BASE + GIC_DIST_PRI + (IRQ_UART2/4)*4);
writel_relaxed(0x3, GIC_DIST_BASE + GIC_DIST_CTRL);
writel_relaxed(0x0f, GIC_CPU_BASE + GIC_CPU_CTRL);
#ifdef IRQ_DEBUG_UART
// set the debug uart priority a little higher than other interrupts (normal is 0xa0)
writeb_relaxed(0x90, GIC_DIST_BASE + GIC_DIST_PRI + IRQ_DEBUG_UART);
#endif
dsb();
}

1
arch/arm/plat-rk/include/plat/fiq.h
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@@ -6,5 +6,6 @@ void rk_fiq_enable(int n);
void rk_fiq_disable(int n);
void rk_irq_setpending(int irq);
void rk_irq_clearpending(int irq);
void rk_fiq_init(void);
#endif