mirror of
https://github.com/hardkernel/linux.git
synced 2026-06-07 11:26:02 +09:00
Merge branch 'amlogic-4.9-dev' of git://git.myamlogic.com/kernel/common into amlogic-4.9-dev
This commit is contained in:
@@ -483,9 +483,9 @@
|
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cma_size = <190>;
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interrupts = <0 83 1>;
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rdma-irq = <2>;
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//clocks = <&clock CLK_FPLL_DIV5>,
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// <&clock CLK_VDIN_MEAS_CLK>;
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//clock-names = "fclk_div5", "cts_vdin_meas_clk";
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clocks = <&clkc CLKID_FCLK_DIV5>,
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<&clkc CLKID_VDIN_MEAS_COMP>;
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clock-names = "fclk_div5", "cts_vdin_meas_clk";
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vdin_id = <0>;
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/* vdin write mem color depth support:
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* bit0:support 8bit
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@@ -506,9 +506,9 @@
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flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
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interrupts = <0 85 1>;
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rdma-irq = <4>;
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//clocks = <&clock CLK_FPLL_DIV5>,
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// <&clock CLK_VDIN_MEAS_CLK>;
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//clock-names = "fclk_div5", "cts_vdin_meas_clk";
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clocks = <&clkc CLKID_FCLK_DIV5>,
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<&clkc CLKID_VDIN_MEAS_COMP>;
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clock-names = "fclk_div5", "cts_vdin_meas_clk";
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vdin_id = <1>;
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/* vdin write mem color depth support:
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* bit0:support 8bit
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@@ -484,9 +484,9 @@
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cma_size = <190>;
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interrupts = <0 83 1>;
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rdma-irq = <2>;
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//clocks = <&clock CLK_FPLL_DIV5>,
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// <&clock CLK_VDIN_MEAS_CLK>;
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//clock-names = "fclk_div5", "cts_vdin_meas_clk";
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clocks = <&clkc CLKID_FCLK_DIV5>,
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<&clkc CLKID_VDIN_MEAS_COMP>;
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clock-names = "fclk_div5", "cts_vdin_meas_clk";
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vdin_id = <0>;
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/* vdin write mem color depth support:
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* bit0:support 8bit
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@@ -507,9 +507,9 @@
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flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
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interrupts = <0 85 1>;
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rdma-irq = <4>;
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//clocks = <&clock CLK_FPLL_DIV5>,
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// <&clock CLK_VDIN_MEAS_CLK>;
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//clock-names = "fclk_div5", "cts_vdin_meas_clk";
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clocks = <&clkc CLKID_FCLK_DIV5>,
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<&clkc CLKID_VDIN_MEAS_COMP>;
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clock-names = "fclk_div5", "cts_vdin_meas_clk";
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vdin_id = <1>;
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/* vdin write mem color depth support:
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* bit0:support 8bit
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@@ -484,9 +484,9 @@
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cma_size = <190>;
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interrupts = <0 83 1>;
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rdma-irq = <2>;
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//clocks = <&clock CLK_FPLL_DIV5>,
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// <&clock CLK_VDIN_MEAS_CLK>;
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//clock-names = "fclk_div5", "cts_vdin_meas_clk";
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clocks = <&clkc CLKID_FCLK_DIV5>,
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<&clkc CLKID_VDIN_MEAS_COMP>;
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clock-names = "fclk_div5", "cts_vdin_meas_clk";
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vdin_id = <0>;
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/* vdin write mem color depth support:
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* bit0:support 8bit
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@@ -507,9 +507,9 @@
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flag_cma = <0>;/*1:share with codec_mm;0:cma alone*/
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interrupts = <0 85 1>;
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rdma-irq = <4>;
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//clocks = <&clock CLK_FPLL_DIV5>,
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// <&clock CLK_VDIN_MEAS_CLK>;
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//clock-names = "fclk_div5", "cts_vdin_meas_clk";
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clocks = <&clkc CLKID_FCLK_DIV5>,
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<&clkc CLKID_VDIN_MEAS_COMP>;
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clock-names = "fclk_div5", "cts_vdin_meas_clk";
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vdin_id = <1>;
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/* vdin write mem color depth support:
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* bit0:support 8bit
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@@ -49,6 +49,7 @@
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||||
#define CONFIG_PREFIX "media"
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||||
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||||
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||||
#define MM_ALIGN_DOWN(addr, size) ((addr) & (~((size) - 1)))
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#define RES_IS_MAPED
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#define DEFAULT_TVP_SIZE_FOR_4K (256 * SZ_1M)
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||||
@@ -486,40 +487,50 @@ static int codec_mm_alloc_in(
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||||
static void codec_mm_free_in(struct codec_mm_mgt_s *mgt,
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||||
struct codec_mm_s *mem)
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||||
{
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||||
unsigned long flags;
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if (mem->from_flags == AMPORTS_MEM_FLAGS_FROM_GET_FROM_CMA) {
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dma_release_from_contiguous(mgt->dev,
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||||
mem->mem_handle, mem->page_count);
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} else if (mem->from_flags ==
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||||
AMPORTS_MEM_FLAGS_FROM_GET_FROM_REVERSED) {
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gen_pool_free(mgt->res_pool,
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(unsigned long)mem->mem_handle, mem->buffer_size);
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} else if (mem->from_flags == AMPORTS_MEM_FLAGS_FROM_GET_FROM_TVP) {
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codec_mm_extpool_free(
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(struct gen_pool *)mem->from_ext,
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mem->mem_handle,
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mem->buffer_size);
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} else if (mem->from_flags == AMPORTS_MEM_FLAGS_FROM_GET_FROM_PAGES) {
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free_pages((unsigned long)mem->mem_handle,
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get_order(mem->buffer_size));
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} else if (mem->from_flags == AMPORTS_MEM_FLAGS_FROM_GET_FROM_CMA_RES) {
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codec_mm_extpool_free(
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(struct gen_pool *)mem->from_ext,
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mem->mem_handle,
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mem->buffer_size);
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||||
}
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spin_lock_irqsave(&mgt->lock, flags);
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if (!(mem->flags & CODEC_MM_FLAGS_FOR_LOCAL_MGR))
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mgt->total_alloced_size -= mem->buffer_size;
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if (mem->flags & CODEC_MM_FLAGS_FOR_SCATTER) {
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mgt->alloced_for_sc_size -= mem->buffer_size;
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mgt->alloced_for_sc_cnt--;
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}
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if (mem->from_flags == AMPORTS_MEM_FLAGS_FROM_GET_FROM_CMA) {
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dma_release_from_contiguous(mgt->dev,
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mem->mem_handle, mem->page_count);
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mgt->alloced_cma_size -= mem->buffer_size;
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} else if (mem->from_flags ==
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AMPORTS_MEM_FLAGS_FROM_GET_FROM_REVERSED) {
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gen_pool_free(mgt->res_pool,
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(unsigned long)mem->mem_handle, mem->buffer_size);
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AMPORTS_MEM_FLAGS_FROM_GET_FROM_REVERSED) {
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mgt->alloced_res_size -= mem->buffer_size;
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||||
} else if (mem->from_flags == AMPORTS_MEM_FLAGS_FROM_GET_FROM_TVP) {
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||||
codec_mm_extpool_free(
|
||||
(struct gen_pool *)mem->from_ext,
|
||||
mem->mem_handle,
|
||||
mem->buffer_size);
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||||
mgt->tvp_pool.alloced_size -= mem->buffer_size;
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} else if (mem->from_flags == AMPORTS_MEM_FLAGS_FROM_GET_FROM_PAGES) {
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free_pages((unsigned long)mem->mem_handle,
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get_order(mem->buffer_size));
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mgt->alloced_sys_size -= mem->buffer_size;
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} else if (mem->from_flags == AMPORTS_MEM_FLAGS_FROM_GET_FROM_CMA_RES) {
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codec_mm_extpool_free(
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(struct gen_pool *)mem->from_ext,
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mem->mem_handle,
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mem->buffer_size);
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mgt->cma_res_pool.alloced_size -= mem->buffer_size;
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||||
}
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||||
spin_unlock_irqrestore(&mgt->lock, flags);
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return;
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}
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struct codec_mm_s *codec_mm_alloc(const char *owner, int size,
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@@ -839,26 +850,35 @@ int codec_mm_extpool_pool_alloc(
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mutex_lock(&tvp_pool->pool_lock);
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try_alloced_size = mgt->total_reserved_size - mgt->alloced_res_size;
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if (try_alloced_size > 0 && for_tvp) {
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int retry = 0;
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try_alloced_size = min_t(int,
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size - alloced_size, try_alloced_size);
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mem = codec_mm_alloc(TVP_POOL_NAME,
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try_alloced_size,
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RESERVE_MM_ALIGNED_2N,
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CODEC_MM_FLAGS_FOR_LOCAL_MGR |
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CODEC_MM_FLAGS_RESERVED);
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try_alloced_size = MM_ALIGN_DOWN(try_alloced_size,
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RESERVE_MM_ALIGNED_2N);
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do {
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mem = codec_mm_alloc(TVP_POOL_NAME,
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try_alloced_size,
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RESERVE_MM_ALIGNED_2N,
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CODEC_MM_FLAGS_FOR_LOCAL_MGR |
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CODEC_MM_FLAGS_RESERVED);
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if (mem) {
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ret = codec_mm_init_tvp_pool(
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tvp_pool,
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mem);
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if (ret < 0) {
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codec_mm_release(mem, TVP_POOL_NAME);
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if (mem) {
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ret = codec_mm_init_tvp_pool(
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tvp_pool,
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mem);
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if (ret < 0) {
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codec_mm_release(mem, TVP_POOL_NAME);
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} else {
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alloced_size += try_alloced_size;
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tvp_pool->slot_num++;
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}
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break;
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} else {
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alloced_size += try_alloced_size;
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tvp_pool->slot_num++;
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try_alloced_size = try_alloced_size - 4 * SZ_1M;
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if (try_alloced_size < 16 * SZ_1M)
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break;
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}
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}
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} while (retry++ < 10);
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}
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if (alloced_size >= size) {
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/*alloc finished. */
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@@ -868,9 +888,14 @@ int codec_mm_extpool_pool_alloc(
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/*alloced from cma:*/
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try_alloced_size = mgt->total_cma_size - mgt->alloced_cma_size;
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if (try_alloced_size > 0) {
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try_alloced_size = min_t(int, size -
|
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alloced_size, try_alloced_size);
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mem = codec_mm_alloc(
|
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int retry = 0;
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|
||||
try_alloced_size = min_t(int,
|
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size - alloced_size, try_alloced_size);
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try_alloced_size = MM_ALIGN_DOWN(try_alloced_size,
|
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RESERVE_MM_ALIGNED_2N);
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do {
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mem = codec_mm_alloc(
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for_tvp ?
|
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TVP_POOL_NAME :
|
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CMA_RES_POOL_NAME,
|
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@@ -878,18 +903,23 @@ int codec_mm_extpool_pool_alloc(
|
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RESERVE_MM_ALIGNED_2N,
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CODEC_MM_FLAGS_FOR_LOCAL_MGR |
|
||||
CODEC_MM_FLAGS_CMA);
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||||
|
||||
if (mem) {
|
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ret = codec_mm_init_tvp_pool(
|
||||
tvp_pool,
|
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mem);
|
||||
if (ret < 0) {
|
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codec_mm_release(mem, TVP_POOL_NAME);
|
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if (mem) {
|
||||
ret = codec_mm_init_tvp_pool(
|
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tvp_pool,
|
||||
mem);
|
||||
if (ret < 0) {
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codec_mm_release(mem, TVP_POOL_NAME);
|
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} else {
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alloced_size += try_alloced_size;
|
||||
tvp_pool->slot_num++;
|
||||
}
|
||||
break;
|
||||
} else {
|
||||
alloced_size += try_alloced_size;
|
||||
tvp_pool->slot_num++;
|
||||
try_alloced_size = try_alloced_size - 4 * SZ_1M;
|
||||
if (try_alloced_size < 16 * SZ_1M)
|
||||
break;
|
||||
}
|
||||
}
|
||||
} while (retry++ < 10);
|
||||
}
|
||||
|
||||
alloced_finished:
|
||||
@@ -1048,9 +1078,35 @@ unsigned long dma_get_cma_size_int_byte(struct device *dev)
|
||||
return 0;
|
||||
}
|
||||
size = cma_get_size(cma);
|
||||
|
||||
return size;
|
||||
}
|
||||
EXPORT_SYMBOL(dma_get_cma_size_int_byte);
|
||||
|
||||
|
||||
static int codec_mm_get_cma_size_int_byte(struct device *dev)
|
||||
{
|
||||
static int static_size = -1;
|
||||
struct cma *cma = NULL;
|
||||
|
||||
if (static_size >= 0)
|
||||
return static_size;
|
||||
if (!dev) {
|
||||
pr_err("CMA: NULL DEV\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
cma = dev_get_cma_area(dev);
|
||||
if (!cma) {
|
||||
pr_err("CMA: NO CMA region\n");
|
||||
return 0;
|
||||
}
|
||||
if (cma == dev_get_cma_area(NULL))
|
||||
static_size = 0;/*ignore default cma pool*/
|
||||
else
|
||||
static_size = cma_get_size(cma);
|
||||
|
||||
return static_size;
|
||||
}
|
||||
|
||||
static int dump_mem_infos(void *buf, int size)
|
||||
{
|
||||
@@ -1103,9 +1159,9 @@ static int dump_mem_infos(void *buf, int size)
|
||||
s = snprintf(pbuf, size - tsize,
|
||||
"\t[%d]CMA size:%d MB:alloced: %d MB,free:%d MB\n",
|
||||
AMPORTS_MEM_FLAGS_FROM_GET_FROM_CMA,
|
||||
(int)(dma_get_cma_size_int_byte(mgt->dev) / SZ_1M),
|
||||
(int)(mgt->total_cma_size / SZ_1M),
|
||||
(int)(mgt->alloced_cma_size / SZ_1M),
|
||||
(int)((dma_get_cma_size_int_byte(mgt->dev) -
|
||||
(int)((mgt->total_cma_size -
|
||||
mgt->alloced_cma_size) / SZ_1M));
|
||||
tsize += s;
|
||||
pbuf += s;
|
||||
@@ -1287,7 +1343,7 @@ int codec_mm_mgt_init(struct device *dev)
|
||||
mgt->res_mem_flags |= RES_MEM_FLAGS_HAVE_MAPED;
|
||||
#endif
|
||||
}
|
||||
mgt->total_cma_size = dma_get_cma_size_int_byte(mgt->dev);
|
||||
mgt->total_cma_size = codec_mm_get_cma_size_int_byte(mgt->dev);
|
||||
mgt->total_codec_mem_size += mgt->total_cma_size;
|
||||
/*2M for audio not protect.*/
|
||||
default_tvp_4k_size = mgt->total_codec_mem_size - SZ_1M * 2;
|
||||
|
||||
@@ -2443,13 +2443,13 @@ static int codec_mm_scatter_free_all_ignorecache_in(
|
||||
} while ((smgt->scatters_cnt > 0) && (retry_num++ < 1000));
|
||||
if (need_retry || smgt->scatters_cnt > 0) {
|
||||
pr_info("can't free all scatter, because some have used!!\n");
|
||||
codec_mm_dump_all_scatters();
|
||||
/*codec_mm_dump_all_scatters();*/
|
||||
}
|
||||
codec_mm_free_all_free_slots_in(smgt);
|
||||
if (smgt->total_page_num > 0) {
|
||||
/*have some not free,dump tables for debug */
|
||||
pr_info("Some slots have not free!!\n\n");
|
||||
codec_mm_dump_all_hash_table();
|
||||
/*codec_mm_dump_all_hash_table();*/
|
||||
}
|
||||
mutex_unlock(&smgt->monitor_lock);
|
||||
return smgt->total_page_num;
|
||||
|
||||
@@ -1849,14 +1849,9 @@ static int di_init_buf(int width, int height, unsigned char prog_flag)
|
||||
frame_count = 0;
|
||||
disp_frame_count = 0;
|
||||
cur_post_ready_di_buf = NULL;
|
||||
for (i = 0; i < MAX_IN_BUF_NUM; i++) {
|
||||
if (vframe_in[i]) {
|
||||
vf_put(vframe_in[i], VFM_NAME);
|
||||
vf_notify_provider(
|
||||
VFM_NAME, VFRAME_EVENT_RECEIVER_PUT, NULL);
|
||||
vframe_in[i] = NULL;
|
||||
}
|
||||
}
|
||||
/* decoder'buffer had been releae no need put */
|
||||
for (i = 0; i < MAX_IN_BUF_NUM; i++)
|
||||
vframe_in[i] = NULL;
|
||||
memset(&di_pre_stru, 0, sizeof(di_pre_stru));
|
||||
if (nr10bit_support) {
|
||||
if (full_422_pack)
|
||||
|
||||
@@ -1052,12 +1052,14 @@ static int hdmi_rx_ctrl_irq_handler(void)
|
||||
if (get(intr_aud_fifo, OVERFL) != 0) {
|
||||
if (log_level & 0x100)
|
||||
rx_pr("[irq] OVERFL\n");
|
||||
rx.irq_flag |= IRQ_AUD_FLAG;
|
||||
//if (rx.aud_info.real_sr != 0)
|
||||
//error |= hdmirx_audio_fifo_rst();
|
||||
}
|
||||
if (get(intr_aud_fifo, UNDERFL) != 0) {
|
||||
if (log_level & 0x100)
|
||||
rx_pr("[irq] UNDERFL\n");
|
||||
rx.irq_flag |= IRQ_AUD_FLAG;
|
||||
//if (rx.aud_info.real_sr != 0)
|
||||
//error |= hdmirx_audio_fifo_rst();
|
||||
}
|
||||
|
||||
@@ -45,7 +45,7 @@
|
||||
#define RX_VER2 "Ref.2017/11/08"
|
||||
/*------------------------------*/
|
||||
|
||||
#define RX_VER3 "Ref.2017/11/27"
|
||||
#define RX_VER3 "Ref.2018/02/14"
|
||||
/*------------------------------*/
|
||||
|
||||
#define RX_VER4 "Ref.2017/10/19"
|
||||
|
||||
@@ -145,16 +145,6 @@ static unsigned int vpu_reg_27af = 0x3;
|
||||
#define VDIN_PIXELCLK_4K_30HZ 248832000
|
||||
#define VDIN_PIXELCLK_4K_60HZ 497664000
|
||||
|
||||
|
||||
/* check hcnt/vcnt after N*vs. */
|
||||
#define VDIN_WAIT_VALID_VS 2
|
||||
/* ignore n*vs which have wrong data. */
|
||||
#define VDIN_IGNORE_VS_CNT 20
|
||||
/* the diff value between normal/bad data */
|
||||
#define VDIN_MEAS_HSCNT_DIFF 0x50
|
||||
/* the diff value between normal/bad data */
|
||||
#define VDIN_MEAS_VSCNT_DIFF 0x50
|
||||
|
||||
#if 0/*ndef VDIN_DEBUG*/
|
||||
#undef pr_info
|
||||
#define pr_info(fmt, ...)
|
||||
@@ -2743,40 +2733,6 @@ bool vdin_write_done_check(unsigned int offset, struct vdin_dev_s *devp)
|
||||
}
|
||||
|
||||
#endif
|
||||
/* check invalid vs to avoid screen flicker */
|
||||
bool vdin_check_vs(struct vdin_dev_s *devp)
|
||||
{
|
||||
bool ret = false;
|
||||
unsigned int dh = 0, dv = 0;
|
||||
|
||||
/* check vs after n*vs avoid unstable signal after TVIN_IOC_START_DEC*/
|
||||
if (devp->vs_cnt_valid++ >= VDIN_WAIT_VALID_VS)
|
||||
devp->vs_cnt_valid = VDIN_WAIT_VALID_VS;
|
||||
|
||||
/* check hcnt64/cycle to find format changed */
|
||||
if (devp->hcnt64 < devp->hcnt64_tag)
|
||||
dh = devp->hcnt64_tag - devp->hcnt64;
|
||||
else
|
||||
dh = devp->hcnt64 - devp->hcnt64_tag;
|
||||
if (devp->cycle < devp->cycle_tag)
|
||||
dv = devp->cycle_tag - devp->cycle;
|
||||
else
|
||||
dv = devp->cycle - devp->cycle_tag;
|
||||
if ((dh > VDIN_MEAS_HSCNT_DIFF) || (dv > VDIN_MEAS_VSCNT_DIFF)) {
|
||||
devp->hcnt64_tag = devp->hcnt64;
|
||||
devp->cycle_tag = devp->cycle;
|
||||
if (devp->vs_cnt_valid >= VDIN_WAIT_VALID_VS)
|
||||
devp->vs_cnt_ignore = VDIN_IGNORE_VS_CNT;
|
||||
}
|
||||
|
||||
/* Do not send data of format changed to video buffer */
|
||||
if (devp->vs_cnt_ignore) {
|
||||
devp->vs_cnt_ignore--;
|
||||
ret = true;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
/*
|
||||
cycle = delta_stamp = ((1/fps)/(1/msr_clk))*(vsync_span+1)
|
||||
msr_clk/fps unit is HZ
|
||||
|
||||
@@ -150,7 +150,6 @@ extern void vdin_set_matrixs(struct vdin_dev_s *devp, unsigned char no,
|
||||
extern bool vdin_check_cycle(struct vdin_dev_s *devp);
|
||||
extern bool vdin_write_done_check(unsigned int offset,
|
||||
struct vdin_dev_s *devp);
|
||||
extern bool vdin_check_vs(struct vdin_dev_s *devp);
|
||||
extern void vdin_calculate_duration(struct vdin_dev_s *devp);
|
||||
extern void vdin_wr_reverse(unsigned int offset, bool hreverse,
|
||||
bool vreverse);
|
||||
|
||||
@@ -499,11 +499,7 @@ void vdin_start_dec(struct vdin_dev_s *devp)
|
||||
/* devp->stamp_valid = false; */
|
||||
devp->stamp = 0;
|
||||
devp->cycle = 0;
|
||||
devp->cycle_tag = 0;
|
||||
devp->hcnt64 = 0;
|
||||
devp->hcnt64_tag = 0;
|
||||
devp->vs_cnt_valid = 0;
|
||||
devp->vs_cnt_ignore = 0;
|
||||
|
||||
memset(&devp->parm.histgram[0], 0, sizeof(unsigned short) * 64);
|
||||
|
||||
@@ -1253,16 +1249,6 @@ irqreturn_t vdin_isr(int irq, void *dev_id)
|
||||
|
||||
devp->hcnt64 = vdin_get_meas_hcnt64(offset);
|
||||
|
||||
/* ignore invalid vs base on the continuous fields
|
||||
* different cnt to void screen flicker
|
||||
*/
|
||||
if (vdin_check_vs(devp) &&
|
||||
(!(isr_flag & VDIN_BYPASS_VSYNC_CHECK))
|
||||
&& (!(devp->flags & VDIN_FLAG_SNOW_FLAG))) {
|
||||
devp->vdin_irq_flag = 5;
|
||||
vdin_drop_cnt++;
|
||||
goto irq_handled;
|
||||
}
|
||||
sm_ops = devp->frontend->sm_ops;
|
||||
|
||||
last_field_type = devp->curr_field_type;
|
||||
@@ -2435,7 +2421,6 @@ static int vdin_drv_probe(struct platform_device *pdev)
|
||||
} else {
|
||||
clk_set_parent(vdevp->msr_clk, clk);
|
||||
vdevp->msr_clk_val = clk_get_rate(vdevp->msr_clk);
|
||||
clk_put(vdevp->msr_clk);
|
||||
pr_info("%s: vdin msr clock is %d MHZ\n", __func__,
|
||||
vdevp->msr_clk_val/1000000);
|
||||
}
|
||||
@@ -2462,7 +2447,6 @@ static int vdin_drv_probe(struct platform_device *pdev)
|
||||
if (!IS_ERR(vdevp->msr_clk)) {
|
||||
vdevp->msr_clk_val =
|
||||
clk_get_rate(vdevp->msr_clk);
|
||||
clk_put(vdevp->msr_clk);
|
||||
pr_info("%s: vdin[%d] clock is %d MHZ\n",
|
||||
__func__, vdevp->index,
|
||||
vdevp->msr_clk_val/1000000);
|
||||
|
||||
@@ -82,7 +82,6 @@
|
||||
/*values of vdin isr bypass check flag */
|
||||
#define VDIN_BYPASS_STOP_CHECK 0x00000001
|
||||
#define VDIN_BYPASS_CYC_CHECK 0x00000002
|
||||
#define VDIN_BYPASS_VSYNC_CHECK 0x00000004
|
||||
#define VDIN_BYPASS_VGA_CHECK 0x00000008
|
||||
#define VDIN_CANVAS_MAX_CNT 9
|
||||
|
||||
@@ -218,16 +217,12 @@ struct vdin_dev_s {
|
||||
char irq_name[12];
|
||||
/* address offset(vdin0/vdin1/...) */
|
||||
unsigned int addr_offset;
|
||||
unsigned int vs_cnt_valid;
|
||||
unsigned int vs_cnt_ignore;
|
||||
|
||||
unsigned int unstable_flag;
|
||||
unsigned int abnormal_cnt;
|
||||
unsigned int stamp;
|
||||
unsigned int hcnt64;
|
||||
unsigned int cycle;
|
||||
unsigned int hcnt64_tag;
|
||||
unsigned int cycle_tag;
|
||||
unsigned int start_time;/* ms vdin start time */
|
||||
int rdma_handle;
|
||||
|
||||
|
||||
@@ -2696,7 +2696,6 @@ static void hdmitx_hpd_plugin_handler(struct work_struct *work)
|
||||
hdmitx_notify_hpd(hdev->hpd_state);
|
||||
|
||||
extcon_set_state_sync(hdmitx_extcon_hdmi, EXTCON_DISP_HDMI, 1);
|
||||
extcon_set_state_sync(hdmitx_extcon_audio, EXTCON_DISP_HDMI, 1);
|
||||
|
||||
mutex_unlock(&setclk_mutex);
|
||||
}
|
||||
@@ -2714,6 +2713,17 @@ static void clear_hdr_info(struct hdmitx_dev *hdev)
|
||||
}
|
||||
}
|
||||
|
||||
static void hdmitx_aud_hpd_plug_handler(struct work_struct *work)
|
||||
{
|
||||
int st;
|
||||
struct hdmitx_dev *hdev = container_of((struct delayed_work *)work,
|
||||
struct hdmitx_dev, work_aud_hpd_plug);
|
||||
|
||||
st = hdev->HWOp.CntlMisc(hdev, MISC_HPD_GPI_ST, 0);
|
||||
pr_info("hdmitx_aud_hpd_plug_handler state:%d\n", st);
|
||||
extcon_set_state_sync(hdmitx_extcon_audio, EXTCON_DISP_HDMI, st);
|
||||
}
|
||||
|
||||
static void hdmitx_hpd_plugout_handler(struct work_struct *work)
|
||||
{
|
||||
struct hdmitx_dev *hdev = container_of((struct delayed_work *)work,
|
||||
@@ -2746,9 +2756,7 @@ static void hdmitx_hpd_plugout_handler(struct work_struct *work)
|
||||
hdmitx_edid_ram_buffer_clear(hdev);
|
||||
hdev->hpd_state = 0;
|
||||
hdmitx_notify_hpd(hdev->hpd_state);
|
||||
|
||||
extcon_set_state_sync(hdmitx_extcon_hdmi, EXTCON_DISP_HDMI, 0);
|
||||
extcon_set_state_sync(hdmitx_extcon_audio, EXTCON_DISP_HDMI, 0);
|
||||
mutex_unlock(&setclk_mutex);
|
||||
}
|
||||
|
||||
@@ -2807,6 +2815,8 @@ static int hdmi_task_handle(void *data)
|
||||
hdmitx_hpd_plugin_handler);
|
||||
INIT_DELAYED_WORK(&hdmitx_device->work_hpd_plugout,
|
||||
hdmitx_hpd_plugout_handler);
|
||||
INIT_DELAYED_WORK(&hdmitx_device->work_aud_hpd_plug,
|
||||
hdmitx_aud_hpd_plug_handler);
|
||||
INIT_WORK(&hdmitx_device->work_internal_intr,
|
||||
hdmitx_internal_intr_handler);
|
||||
|
||||
|
||||
@@ -642,6 +642,8 @@ static irqreturn_t intr_handler(int irq, void *dev)
|
||||
}
|
||||
/* HPD rising */
|
||||
if (data32 & (1 << 1)) {
|
||||
queue_delayed_work(hdev->hdmi_wq,
|
||||
&hdev->work_aud_hpd_plug, HZ / 2);
|
||||
hdev->hdmitx_event |= HDMI_TX_HPD_PLUGIN;
|
||||
hdev->hdmitx_event &= ~HDMI_TX_HPD_PLUGOUT;
|
||||
queue_delayed_work(hdev->hdmi_wq,
|
||||
@@ -649,6 +651,8 @@ static irqreturn_t intr_handler(int irq, void *dev)
|
||||
}
|
||||
/* HPD falling */
|
||||
if (data32 & (1 << 2)) {
|
||||
queue_delayed_work(hdev->hdmi_wq,
|
||||
&hdev->work_aud_hpd_plug, 2 * HZ);
|
||||
hdev->hdmitx_event |= HDMI_TX_HPD_PLUGOUT;
|
||||
hdev->hdmitx_event &= ~HDMI_TX_HPD_PLUGIN;
|
||||
queue_delayed_work(hdev->hdmi_wq,
|
||||
|
||||
@@ -233,6 +233,7 @@ struct hdmitx_dev {
|
||||
struct pinctrl_state *pinctrl_default;
|
||||
struct delayed_work work_hpd_plugin;
|
||||
struct delayed_work work_hpd_plugout;
|
||||
struct delayed_work work_aud_hpd_plug;
|
||||
struct delayed_work work_rxsense;
|
||||
struct work_struct work_internal_intr;
|
||||
struct work_struct work_hdr;
|
||||
|
||||
Reference in New Issue
Block a user