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media: i2c: imx386 modify setting for use same hb

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Change-Id: If4713db316d5eeac9836dee916c43eb423d41443
Signed-off-by: Zefa Chen <zefa.chen@rock-chips.com>
This commit is contained in:
Zefa Chen
2025-03-06 16:01:57 +08:00
committed by Tao Huang
parent 4e9d669102
commit fb12fb01d8
1 changed files with 14 additions and 279 deletions
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293
drivers/media/i2c/imx386.c
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@@ -730,270 +730,6 @@ static const struct regval imx386_linear_10_1920x1080_regs[] = {
{REG_NULL, 0x00},
};
static const struct regval imx386_linear_10_4032x2256_30fps_regs[] = {
{0x0136, 0x18},//global setting
{0x0137, 0x00},
{0x3A7D, 0x00},
{0x3A7E, 0x02},
{0x3A7F, 0x05},
{0x3100, 0x00},
{0x3101, 0x40},
{0x3102, 0x00},
{0x3103, 0x10},
{0x3104, 0x01},
{0x3105, 0xE8},
{0x3106, 0x01},
{0x3107, 0xF0},
{0x3150, 0x04},
{0x3151, 0x03},
{0x3152, 0x02},
{0x3153, 0x01},
{0x5A86, 0x00},
{0x5A87, 0x82},
{0x5D1A, 0x00},
{0x5D95, 0x02},
{0x5E1B, 0x00},
{0x5F5A, 0x00},
{0x5F5B, 0x04},
{0x682C, 0x31},
{0x6831, 0x31},
{0x6835, 0x0E},
{0x6836, 0x31},
{0x6838, 0x30},
{0x683A, 0x06},
{0x683B, 0x33},
{0x683D, 0x30},
{0x6842, 0x31},
{0x6844, 0x31},
{0x6847, 0x31},
{0x6849, 0x31},
{0x684D, 0x0E},
{0x684E, 0x32},
{0x6850, 0x31},
{0x6852, 0x06},
{0x6853, 0x33},
{0x6855, 0x31},
{0x685A, 0x32},
{0x685C, 0x33},
{0x685F, 0x31},
{0x6861, 0x33},
{0x6865, 0x0D},
{0x6866, 0x33},
{0x6868, 0x31},
{0x686B, 0x34},
{0x686D, 0x31},
{0x6872, 0x32},
{0x6877, 0x33},
{0x7FF0, 0x01},
{0x7FF4, 0x08},
{0x7FF5, 0x3C},
{0x7FFA, 0x01},
{0x7FFD, 0x00},
{0x831E, 0x00},
{0x831F, 0x00},
{0x9301, 0xBD},
{0x9B94, 0x03},
{0x9B95, 0x00},
{0x9B96, 0x08},
{0x9B97, 0x00},
{0x9B98, 0x0A},
{0x9B99, 0x00},
{0x9BA7, 0x18},
{0x9BA8, 0x18},
{0x9D04, 0x08},
{0x9D50, 0x8C},
{0x9D51, 0x64},
{0x9D52, 0x50},
{0x9E31, 0x04},
{0x9E32, 0x04},
{0x9E33, 0x04},
{0x9E34, 0x04},
{0xA200, 0x00},
{0xA201, 0x0A},
{0xA202, 0x00},
{0xA203, 0x0A},
{0xA204, 0x00},
{0xA205, 0x0A},
{0xA206, 0x01},
{0xA207, 0xC0},
{0xA208, 0x00},
{0xA209, 0xC0},
{0xA20C, 0x00},
{0xA20D, 0x0A},
{0xA20E, 0x00},
{0xA20F, 0x0A},
{0xA210, 0x00},
{0xA211, 0x0A},
{0xA212, 0x01},
{0xA213, 0xC0},
{0xA214, 0x00},
{0xA215, 0xC0},
{0xA300, 0x00},
{0xA301, 0x0A},
{0xA302, 0x00},
{0xA303, 0x0A},
{0xA304, 0x00},
{0xA305, 0x0A},
{0xA306, 0x01},
{0xA307, 0xC0},
{0xA308, 0x00},
{0xA309, 0xC0},
{0xA30C, 0x00},
{0xA30D, 0x0A},
{0xA30E, 0x00},
{0xA30F, 0x0A},
{0xA310, 0x00},
{0xA311, 0x0A},
{0xA312, 0x01},
{0xA313, 0xC0},
{0xA314, 0x00},
{0xA315, 0xC0},
{0xBC19, 0x01},
{0xBC1C, 0x0A},
{0x3035, 0x01},//image quality
{0x3051, 0x00},
{0x7F47, 0x00},
{0x7F78, 0x00},
{0x7F89, 0x00},
{0x7F93, 0x00},
{0x7FB4, 0x00},
{0x7FCC, 0x01},
{0x9D02, 0x00},
{0x9D44, 0x8C},
{0x9D62, 0x8C},
{0x9D63, 0x50},
{0x9D64, 0x1B},
{0x9E0D, 0x00},
{0x9E0E, 0x00},
{0x9E15, 0x0A},
{0x9F02, 0x00},
{0x9F03, 0x23},
{0x9F4E, 0x00},
{0x9F4F, 0x42},
{0x9F54, 0x00},
{0x9F55, 0x5A},
{0x9F6E, 0x00},
{0x9F6F, 0x10},
{0x9F72, 0x00},
{0x9F73, 0xC8},
{0x9F74, 0x00},
{0x9F75, 0x32},
{0x9FD3, 0x00},
{0x9FD4, 0x00},
{0x9FD5, 0x00},
{0x9FD6, 0x3C},
{0x9FD7, 0x3C},
{0x9FD8, 0x3C},
{0x9FD9, 0x00},
{0x9FDA, 0x00},
{0x9FDB, 0x00},
{0x9FDC, 0xFF},
{0x9FDD, 0xFF},
{0x9FDE, 0xFF},
{0xA002, 0x00},
{0xA003, 0x14},
{0xA04E, 0x00},
{0xA04F, 0x2D},
{0xA054, 0x00},
{0xA055, 0x40},
{0xA06E, 0x00},
{0xA06F, 0x10},
{0xA072, 0x00},
{0xA073, 0xC8},
{0xA074, 0x00},
{0xA075, 0x32},
{0xA0CA, 0x04},
{0xA0CB, 0x04},
{0xA0CC, 0x04},
{0xA0D3, 0x0A},
{0xA0D4, 0x0A},
{0xA0D5, 0x0A},
{0xA0D6, 0x00},
{0xA0D7, 0x00},
{0xA0D8, 0x00},
{0xA0D9, 0x18},
{0xA0DA, 0x18},
{0xA0DB, 0x18},
{0xA0DC, 0x00},
{0xA0DD, 0x00},
{0xA0DE, 0x00},
{0xBCB2, 0x01},
{0x0112, 0x0A},//4k2k@60fps
{0x0113, 0x0A},
{0x0301, 0x06},
{0x0303, 0x02},
{0x0305, 0x02},
{0x0306, 0x00},
{0x0307, 0x4B},
{0x0309, 0x0A},
{0x030B, 0x01},
{0x030D, 0x0C},
{0x030E, 0x01},
{0x030F, 0x90},
{0x0310, 0x01},
{0x0342, 0x10},//10c8 60fps
{0x0343, 0xC8},
{0x0340, 0x09},
{0x0341, 0x16},
{0x0344, 0x00},
{0x0345, 0x00},
{0x0346, 0x01},
{0x0347, 0x7C},
{0x0348, 0x0F},
{0x0349, 0xBF},
{0x034A, 0x0A},
{0x034B, 0x4B},
{0x0385, 0x01},
{0x0387, 0x01},
{0x0900, 0x00},
{0x0901, 0x11},
{0x300D, 0x00},
{0x302E, 0x00},
{0x0401, 0x00},
{0x0404, 0x00},
{0x0405, 0x10},
{0x040C, 0x0F},
{0x040D, 0xC0},
{0x040E, 0x08},
{0x040F, 0xD0},
{0x034C, 0x0F},
{0x034D, 0xC0},
{0x034E, 0x08},
{0x034F, 0xD0},
{0x0114, 0x03},
{0x0408, 0x00},
{0x0409, 0x00},
{0x040A, 0x00},
{0x040B, 0x00},
{0x0902, 0x00},
{0x3030, 0x00},
{0x3031, 0x01},
{0x3032, 0x00},
{0x3047, 0x01},
{0x3049, 0x01},
{0x30E6, 0x02},
{0x30E7, 0x59},
{0x4E25, 0x80},
{0x663A, 0x02},
{0x9311, 0x00},
{0xA0CD, 0x19},
{0xA0CE, 0x19},
{0xA0CF, 0x19},
{0x0202, 0x09},
{0x0203, 0x0C},
{0x0204, 0x00},
{0x0205, 0x00},
{0x020E, 0x01},
{0x020F, 0x00},
{0x0210, 0x01},
{0x0211, 0x00},
{0x0212, 0x01},
{0x0213, 0x00},
{0x0214, 0x01},
{0x0215, 0x00},
{REG_NULL, 0x00},
};
static const struct regval imx386_linear_10_4032x3016_30fps_regs[] = {
{0x0136, 0x18},//global setting
{0x0137, 0x00},
@@ -1184,21 +920,21 @@ static const struct regval imx386_linear_10_4032x3016_30fps_regs[] = {
{0xBCB2, 0x01},
{0x0112, 0x0A},//4k3k@30fps
{0x0113, 0x0A},
{0x0301, 0x06},
{0x0301, 0x04},
{0x0303, 0x02},
{0x0305, 0x0C},
{0x0306, 0x02},
{0x0307, 0x58}, //vtpxck pll mpy 0x01e0 -> 24fps
{0x0305, 0x02},
{0x0306, 0x00},
{0x0307, 0x64},
{0x0309, 0x0A},
{0x030B, 0x01},
{0x030D, 0x0C},
{0x030E, 0x02},
{0x030F, 0x58}, //oppxck pll mpy
{0x0310, 0x00}, //pll mode
{0x030E, 0x03},
{0x030F, 0x20},
{0x0310, 0x01},
{0x0342, 0x10}, //hts
{0x0343, 0xC8},
{0x0340, 0x0C}, //vts
{0x0341, 0x1E},
{0x0340, 0x12}, //vts
{0x0341, 0x2b},
{0x0344, 0x00},
{0x0345, 0x00},
{0x0346, 0x00},
@@ -1264,7 +1000,7 @@ static const struct imx386_mode supported_modes[] = {
.reg_list = imx386_linear_10_4032x2256_regs,
.hdr_mode = NO_HDR,
.vc[PAD0] = 0,
.link_freq_idx = 2,
.link_freq_idx = 1,
.bpp = 10,
},
{
@@ -1276,12 +1012,12 @@ static const struct imx386_mode supported_modes[] = {
},
.exp_def = 0x0600,
.hts_def = 0x10c8,
.vts_def = 0x0916,
.vts_def = 0x122b,
.bus_fmt = MEDIA_BUS_FMT_SRGGB10_1X10,
.reg_list = imx386_linear_10_4032x2256_30fps_regs,
.reg_list = imx386_linear_10_4032x2256_regs,
.hdr_mode = NO_HDR,
.vc[PAD0] = 0,
.link_freq_idx = 0,
.link_freq_idx = 1,
.bpp = 10,
},
{
@@ -1310,7 +1046,7 @@ static const struct imx386_mode supported_modes[] = {
},
.exp_def = 0x0600,
.hts_def = 0x10c8,
.vts_def = 0x0C1E,
.vts_def = 0x122b,
.bus_fmt = MEDIA_BUS_FMT_SRGGB10_1X10,
.reg_list = imx386_linear_10_4032x3016_30fps_regs,
.hdr_mode = NO_HDR,
@@ -1322,7 +1058,6 @@ static const struct imx386_mode supported_modes[] = {
static const s64 link_freq_menu_items[] = {
IMX386_LINK_FREQ_400,
IMX386_LINK_FREQ_600,
IMX386_LINK_FREQ_800,
};