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ETH: do eth reset bit when resume. [1/1]

Browse Source 
PD#SWPL-12780

Problem:
internal phy can not connect network probably
after long stress suspend test

Solution:
In suspend/resume sequeue, add eth reset

Verify:
verify on TL1 and G12b

Change-Id: Id8f6767686f4e4d52774d9ac28dac46549a52d4c
Signed-off-by: qi duan <qi.duan@amlogic.com>
Signed-off-by: Luan Yuan <luan.yuan@amlogic.com>
This commit is contained in:
qi duan
2019-08-15 03:58:34 -04:00
committed by Luan Yuan
parent 514e410e5e
commit fc24beac08
12 changed files with 63 additions and 23 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
arch/arm/boot/dts/amlogic/mesong12a.dtsi
View File

@@ -301,8 +301,9 @@
compatible = "amlogic, g12a-eth-dwmac","snps,dwmac";
reg = <0xff3f0000 0x10000
0xff634540 0x8
0xff64c000 0xa0>;
reg-names = "eth_base", "eth_cfg", "eth_pll";
0xff64c000 0xa0
0xffd01008 0x4>;
reg-names = "eth_base", "eth_cfg", "eth_pll", "eth_reset";
interrupts = <0 8 1>;
interrupt-names = "macirq";
status = "disabled";

5
arch/arm/boot/dts/amlogic/mesong12b.dtsi
View File

@@ -364,8 +364,9 @@
compatible = "amlogic, g12a-eth-dwmac","snps,dwmac";
reg = <0xff3f0000 0x10000
0xff634540 0x8
0xff64c000 0xa0>;
reg-names = "eth_base", "eth_cfg", "eth_pll";
0xff64c000 0xa0
0xffd01008 0x4>;
reg-names = "eth_base", "eth_cfg", "eth_pll", "eth_reset";
interrupts = <0 8 1>;
interrupt-names = "macirq";
status = "disabled";

5
arch/arm/boot/dts/amlogic/mesong12b_a.dtsi
View File

@@ -356,8 +356,9 @@
compatible = "amlogic, g12a-eth-dwmac","snps,dwmac";
reg = <0xff3f0000 0x10000
0xff634540 0x8
0xff64c000 0xa0>;
reg-names = "eth_base", "eth_cfg", "eth_pll";
0xff64c000 0xa0
0xffd01008 0x4>;
reg-names = "eth_base", "eth_cfg", "eth_pll", "eth_reset";
interrupts = <0 8 1>;
interrupt-names = "macirq";
status = "disabled";

5
arch/arm/boot/dts/amlogic/mesonsm1.dtsi
View File

@@ -317,8 +317,9 @@
compatible = "amlogic, g12a-eth-dwmac","snps,dwmac";
reg = <0xff3f0000 0x10000
0xff634540 0x8
0xff64c000 0xa0>;
reg-names = "eth_base", "eth_cfg", "eth_pll";
0xff64c000 0xa0
0xffd01008 0x4>;
reg-names = "eth_base", "eth_cfg", "eth_pll", "eth_reset";
interrupts = <0 8 1>;
interrupt-names = "macirq";
status = "disabled";

5
arch/arm/boot/dts/amlogic/mesontl1.dtsi
View File

@@ -304,8 +304,9 @@
compatible = "amlogic, g12a-eth-dwmac","snps,dwmac";
reg = <0xff3f0000 0x10000
0xff634540 0x8
0xff64c000 0xa0>;
reg-names = "eth_base", "eth_cfg", "eth_pll";
0xff64c000 0xa0
0xffd01008 0x4>;
reg-names = "eth_base", "eth_cfg", "eth_pll", "eth_reset";
interrupts = <0 8 1>;
interrupt-names = "macirq";
status = "disabled";

5
arch/arm/boot/dts/amlogic/mesontm2.dtsi
View File

@@ -318,8 +318,9 @@
compatible = "amlogic, g12a-eth-dwmac","snps,dwmac";
reg = <0xff3f0000 0x10000
0xff634540 0x8
0xff64c000 0xa0>;
reg-names = "eth_base", "eth_cfg", "eth_pll";
0xff64c000 0xa0
0xffd01008 0x4>;
reg-names = "eth_base", "eth_cfg", "eth_pll", "eth_reset";
interrupts = <0 8 1>;
interrupt-names = "macirq";
status = "disabled";

5
arch/arm64/boot/dts/amlogic/mesong12a.dtsi
View File

@@ -301,8 +301,9 @@
compatible = "amlogic, g12a-eth-dwmac","snps,dwmac";
reg = <0x0 0xff3f0000 0x0 0x10000
0x0 0xff634540 0x0 0x8
0x0 0xff64c000 0x0 0xa0>;
reg-names = "eth_base", "eth_cfg", "eth_pll";
0x0 0xff64c000 0x0 0xa0
0x0 0xffd01008 0x0 0x4>;
reg-names = "eth_base", "eth_cfg", "eth_pll", "eth_reset";
interrupts = <0 8 1>;
interrupt-names = "macirq";
status = "disabled";

5
arch/arm64/boot/dts/amlogic/mesong12b.dtsi
View File

@@ -364,8 +364,9 @@
compatible = "amlogic, g12a-eth-dwmac","snps,dwmac";
reg = <0x0 0xff3f0000 0x0 0x10000
0x0 0xff634540 0x0 0x8
0x0 0xff64c000 0x0 0xa0>;
reg-names = "eth_base", "eth_cfg", "eth_pll";
0x0 0xff64c000 0x0 0xa0
0x0 0xffd01008 0x0 0x4>;
reg-names = "eth_base", "eth_cfg", "eth_pll", "eth_reset";
interrupts = <0 8 1>;
interrupt-names = "macirq";
status = "disabled";

5
arch/arm64/boot/dts/amlogic/mesong12b_a.dtsi
View File

@@ -356,8 +356,9 @@
compatible = "amlogic, g12a-eth-dwmac","snps,dwmac";
reg = <0x0 0xff3f0000 0x0 0x10000
0x0 0xff634540 0x0 0x8
0x0 0xff64c000 0x0 0xa0>;
reg-names = "eth_base", "eth_cfg", "eth_pll";
0x0 0xff64c000 0x0 0xa0
0x0 0xffd01008 0x0 0x4>;
reg-names = "eth_base", "eth_cfg", "eth_pll", "eth_reset";
interrupts = <0 8 1>;
interrupt-names = "macirq";
status = "disabled";

5
arch/arm64/boot/dts/amlogic/mesonsm1.dtsi
View File

@@ -317,8 +317,9 @@
compatible = "amlogic, g12a-eth-dwmac","snps,dwmac";
reg = <0x0 0xff3f0000 0x0 0x10000
0x0 0xff634540 0x0 0x8
0x0 0xff64c000 0x0 0xa0>;
reg-names = "eth_base", "eth_cfg", "eth_pll";
0x0 0xff64c000 0x0 0xa0
0x0 0xffd01008 0x0 0x4>;
reg-names = "eth_base", "eth_cfg", "eth_pll", "eth_reset";
interrupts = <0 8 1>;
interrupt-names = "macirq";
status = "disabled";

5
arch/arm64/boot/dts/amlogic/mesontm2.dtsi
View File

@@ -299,8 +299,9 @@
compatible = "amlogic, g12a-eth-dwmac","snps,dwmac";
reg = <0x0 0xff3f0000 0x0 0x10000
0x0 0xff634540 0x0 0x8
0x0 0xff64c000 0x0 0xa0>;
reg-names = "eth_base", "eth_cfg", "eth_pll";
0x0 0xff64c000 0x0 0xa0
0x0 0xffd01008 0x0 0x4>;
reg-names = "eth_base", "eth_cfg", "eth_pll", "eth_reset";
interrupts = <0 8 1>;
interrupt-names = "macirq";
status = "disabled";

31
drivers/net/ethernet/stmicro/stmmac/dwmac-meson.c
View File

@@ -55,6 +55,9 @@ static unsigned int is_internal_phy;
struct meson_dwmac_data {
bool g12a_phy;
};
void __iomem *ee_reset_base;
struct platform_device *ppdev;
#endif
struct meson_dwmac {
@@ -313,6 +316,7 @@ static void __iomem *g12a_network_interface_setup(struct platform_device *pdev)
int auto_cali_idx = -1;
is_internal_phy = 0;
ppdev = pdev;
pr_debug("g12a_network_interface_setup\n");
/*map PRG_ETH_REG */
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "eth_cfg");
@@ -330,6 +334,21 @@ static void __iomem *g12a_network_interface_setup(struct platform_device *pdev)
REG_ETH_reg0_addr = addr;
pr_info(" REG0:Addr = %p\n", REG_ETH_reg0_addr);
/*map ETH_RESET address*/
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "eth_reset");
if (!res) {
dev_err(&pdev->dev, "Unable to get resource(%d)\n", __LINE__);
ee_reset_base = NULL;
} else {
addr = devm_ioremap_resource(dev, res);
if (IS_ERR(addr)) {
dev_err(&pdev->dev, "Unable to map reset base\n");
return NULL;
}
ee_reset_base = addr;
pr_info(" ee eth reset:Addr = %p\n", ee_reset_base);
}
/*map ETH_PLL address*/
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "eth_pll");
if (!res) {
@@ -494,6 +513,10 @@ static int meson6_dwmac_resume(struct device *dev)
struct pinctrl_state *turnon_tes = NULL;
pr_info("resuem inter = %d\n", is_internal_phy);
if ((is_internal_phy) && (support_mac_wol == 0)) {
if (ee_reset_base)
writel((1 << 11), (void __iomem *)
(unsigned long)ee_reset_base);
pin_ctrl = devm_pinctrl_get(dev);
if (IS_ERR_OR_NULL(pin_ctrl)) {
pr_info("pinctrl is null\n");
@@ -504,7 +527,13 @@ static int meson6_dwmac_resume(struct device *dev)
devm_pinctrl_put(pin_ctrl);
pin_ctrl = NULL;
}
dwmac_meson_recover_analog(dev);
if (!ee_reset_base) {
dwmac_meson_recover_analog(dev);
} else {
dwmac_meson_cfg_pll(phy_analog_config_addr, ppdev);
dwmac_meson_cfg_analog(phy_analog_config_addr, ppdev);
dwmac_meson_cfg_ctrl(phy_analog_config_addr, ppdev);
}
}
ret = stmmac_pltfr_resume(dev);
return ret;