lcd: optimize bit_rate config in lcd driver [2/2]

PD#SWPL-3562

Problem:
optimize bit_rate config in lcd driver

Solution:
optimize bit_rate config in lcd driver

Verify:
verify by t962x2-x301

Change-Id: Ia804628aa60590f4311ece394ddacc08ca64d573
Signed-off-by: Shaochan Liu <shaochan.liu@amlogic.com>

Conflicts:
	drivers/amlogic/media/vout/lcd/lcd_clk_config.c
	drivers/amlogic/media/vout/lcd/lcd_debug.c
	drivers/amlogic/media/vout/lcd/lcd_tv/lcd_drv.c
	drivers/amlogic/media/vout/lcd/lcd_vout.c
	include/linux/amlogic/media/vout/lcd/lcd_vout.h

drivers/amlogic/media/vout/lcd/lcd_clk_config.c

@@ -1011,6 +1011,8 @@ static void lcd_clk_generate_txl(struct lcd_config_s *pconf)
 		goto generate_clk_done_txl;
 	}
 
+	bit_rate = pconf->lcd_timing.bit_rate / 1000;
+
 	if (pconf->lcd_timing.clk_auto == 2)
 		cConf->pll_mode = 1;
 	else
@@ -1074,7 +1076,7 @@ static void lcd_clk_generate_txl(struct lcd_config_s *pconf)
 	case LCD_VBYONE:
 		cConf->div_sel_max = CLK_DIV_SEL_MAX;
 		cConf->xd_max = CRT_VID_DIV_MAX;
-		pll_fout = pconf->lcd_control.vbyone_config->bit_rate / 1000;
+		pll_fout = bit_rate;
 		clk_div_in = pll_fout;
 		if (clk_div_in > cConf->data->div_in_fmax)
 			goto generate_clk_done_txl;
@@ -1103,17 +1105,30 @@ static void lcd_clk_generate_txl(struct lcd_config_s *pconf)
 		done = check_pll_txl(cConf, pll_fout);
 		break;
 	case LCD_MLVDS:
-		bit_rate = pconf->lcd_control.mlvds_config->bit_rate / 1000;
-		for (pi_div_sel = 0; pi_div_sel < 2; pi_div_sel++) {
-			pll_fvco = bit_rate * pi_div_table[pi_div_sel] * 4;
-			done = check_pll_tl1_mlvds(cConf, pll_fvco);
-			if (done) {
-				clk_div_sel = CLK_DIV_SEL_1;
-				cConf->xd_max = CRT_VID_DIV_MAX;
-				for (xd = 1; xd <= cConf->xd_max; xd++) {
-					clk_div_out = cConf->fout * xd;
-					if (clk_div_out >
-						cConf->data->div_out_fmax)
+		/* must go through div4 for clk phase */
+		for (tcon_div_sel = 3; tcon_div_sel < 5; tcon_div_sel++) {
+			pll_fvco = bit_rate * tcon_div_table[tcon_div_sel];
+			done = check_pll_vco(cConf, pll_fvco);
+			if (done == 0)
+				continue;
+			cConf->xd_max = CRT_VID_DIV_MAX;
+			for (xd = 1; xd <= cConf->xd_max; xd++) {
+				clk_div_out = cConf->fout * xd;
+				if (clk_div_out > cConf->data->div_out_fmax)
+					continue;
+				if (lcd_debug_print_flag == 2) {
+					LCDPR(
+					"fout=%d, xd=%d, clk_div_out=%d\n",
+						cConf->fout, xd, clk_div_out);
+				}
+				for (clk_div_sel = CLK_DIV_SEL_1;
+					clk_div_sel < CLK_DIV_SEL_MAX;
+					clk_div_sel++) {
+					clk_div_in = clk_vid_pll_div_calc(
+						clk_div_out, clk_div_sel,
+						CLK_DIV_O2I);
+					if (clk_div_in >
+						cConf->data->div_in_fmax)
 						continue;
 					if (lcd_debug_print_flag == 2) {
 						LCDPR("fout=%d, xd=%d\n",
@@ -1121,6 +1136,32 @@ static void lcd_clk_generate_txl(struct lcd_config_s *pconf)
 						LCDPR("clk_div_out=%d\n",
 							clk_div_out);
 					}
+					done = check_pll_od(cConf, pll_fout);
+					if (done)
+						goto generate_clk_done_txl;
+				}
+			}
+		}
+		break;
+	case LCD_P2P:
+		for (tcon_div_sel = 0; tcon_div_sel < 5; tcon_div_sel++) {
+			pll_fvco = bit_rate * tcon_div_table[tcon_div_sel];
+			done = check_pll_vco(cConf, pll_fvco);
+			if (done == 0)
+				continue;
+			cConf->xd_max = CRT_VID_DIV_MAX;
+			for (xd = 1; xd <= cConf->xd_max; xd++) {
+				clk_div_out = cConf->fout * xd;
+				if (clk_div_out > cConf->data->div_out_fmax)
+					continue;
+				if (lcd_debug_print_flag == 2) {
+					LCDPR(
+					"fout=%d, xd=%d, clk_div_out=%d\n",
+						cConf->fout, xd, clk_div_out);
+				}
+				for (clk_div_sel = CLK_DIV_SEL_1;
+					clk_div_sel < CLK_DIV_SEL_MAX;
+					clk_div_sel++) {
 					clk_div_in = clk_vid_pll_div_calc(
 						clk_div_out,
 						clk_div_sel, CLK_DIV_O2I);
@@ -1375,8 +1416,7 @@ static void lcd_clk_generate_axg(struct lcd_config_s *pconf)
 			if (lcd_debug_print_flag == 2)
 				LCDPR("fout=%d, xd=%d\n", cConf->fout, xd);
 
-			pconf->lcd_control.mipi_config->bit_rate =
-				pll_fout * 1000;
+			pconf->lcd_timing.bit_rate = pll_fout * 1000;
 			pconf->lcd_control.mipi_config->clk_factor = xd;
 			cConf->xd = xd;
 			done = check_pll_axg(cConf, pll_fout);
@@ -1510,8 +1550,7 @@ static void lcd_clk_generate_hpll_g12a(struct lcd_config_s *pconf)
 			if (lcd_debug_print_flag == 2)
 				LCDPR("fout=%d, xd=%d\n", cConf->fout, xd);
 
-			pconf->lcd_control.mipi_config->bit_rate =
-				pll_fout * 1000;
+			pconf->lcd_timing.bit_rate = pll_fout * 1000;
 			pconf->lcd_control.mipi_config->clk_factor = xd;
 			cConf->xd = xd;
 			cConf->div_sel = clk_div_sel;

drivers/amlogic/media/vout/lcd/lcd_debug.c

@@ -358,7 +358,7 @@ static int lcd_info_print_vbyone(char *buf, int offset)
 		vx1_conf->region_num,
 		vx1_conf->byte_mode,
 		vx1_conf->color_fmt,
-		vx1_conf->bit_rate,
+		pconf->lcd_timing.bit_rate,
 		vx1_conf->phy_vswing,
 		vx1_conf->phy_preem,
 		vx1_conf->intr_en,
@@ -439,7 +439,7 @@ static int lcd_info_print_mlvds(char *buf, int offset)
 		pconf->lcd_control.mlvds_config->bit_swap,
 		pconf->lcd_control.mlvds_config->phy_vswing,
 		pconf->lcd_control.mlvds_config->phy_preem,
-		pconf->lcd_control.mlvds_config->bit_rate,
+		pconf->lcd_timing.bit_rate,
 		pconf->lcd_control.mlvds_config->pi_clk_sel);
 
 	len += lcd_tcon_info_print((buf+len), (len+offset));
@@ -480,6 +480,7 @@ static int lcd_info_print_p2p(char *buf, int offset)
 		pconf->lcd_control.p2p_config->clk_phase,
 		pconf->lcd_control.p2p_config->pn_swap,
 		pconf->lcd_control.p2p_config->bit_swap,
+		pconf->lcd_timing.bit_rate,
 		pconf->lcd_control.p2p_config->phy_vswing,
 		pconf->lcd_control.p2p_config->phy_preem,
 		pconf->lcd_control.p2p_config->bit_rate,

drivers/amlogic/media/vout/lcd/lcd_tablet/lcd_drv.c

@@ -833,7 +833,7 @@ static void lcd_vbyone_config_set(struct lcd_config_s *pconf)
 	bit_rate = bit_rate * 1000; /* Hz */
 
 	pconf->lcd_control.vbyone_config->phy_div = phy_div;
-	pconf->lcd_control.vbyone_config->bit_rate = bit_rate;
+	pconf->lcd_timing.bit_rate = bit_rate;
 
 	if (lcd_debug_print_flag) {
 		LCDPR("lane_count=%u, bit_rate = %uMHz, pclk=%u.%03uMhz\n",

drivers/amlogic/media/vout/lcd/lcd_tablet/mipi_dsi_util.c

@@ -152,11 +152,11 @@ static void mipi_dsi_init_table_print(struct dsi_config_s *dconf, int on_off)
 	}
 }
 
-static void mipi_dsi_dphy_print_info(struct dsi_config_s *dconf)
+static void mipi_dsi_dphy_print_info(struct lcd_config_s *pconf)
 {
 	unsigned int temp;
 
-	temp = ((1000000 * 100) / (dconf->bit_rate / 1000)) * 8;
+	temp = ((1000000 * 100) / (pconf->lcd_timing.bit_rate / 1000)) * 8;
 	pr_info("MIPI DSI DPHY timing (unit: ns)\n"
 		"  UI:                %d.%02d\n"
 		"  LP TESC:           %d\n"
@@ -217,7 +217,7 @@ static void mipi_dsi_host_print_info(struct lcd_config_s *pconf)
 	struct dsi_config_s *dconf;
 
 	dconf = pconf->lcd_control.mipi_config;
-	esc_clk = dconf->bit_rate / 8 / dsi_phy_config.lp_tesc;
+	esc_clk = pconf->lcd_timing.bit_rate / 8 / dsi_phy_config.lp_tesc;
 	factor = dconf->factor_numerator;
 	factor = ((factor * 1000 / dconf->factor_denominator) + 5) / 10;
 
@@ -243,7 +243,8 @@ static void mipi_dsi_host_print_info(struct lcd_config_s *pconf)
 		"  data format:           %s\n"
 		"  lp escape clock:       %d.%03dMHz\n",
 		dconf->lane_num, dconf->bit_rate_max,
-		(dconf->bit_rate / 1000000), (dconf->bit_rate % 1000000) / 1000,
+		(pconf->lcd_timing.bit_rate / 1000000),
+		(pconf->lcd_timing.bit_rate % 1000000) / 1000,
 		factor,
 		operation_mode_table[dconf->operation_mode_init],
 		dconf->operation_mode_init,
@@ -267,7 +268,7 @@ void mipi_dsi_print_info(struct lcd_config_s *pconf)
 {
 	mipi_dsi_host_print_info(pconf);
 
-	mipi_dsi_dphy_print_info(pconf->lcd_control.mipi_config);
+	mipi_dsi_dphy_print_info(pconf);
 	mipi_dsi_video_print_info(pconf->lcd_control.mipi_config);
 }
 
@@ -1699,13 +1700,13 @@ static void mipi_dsi_non_burst_packet_config(struct lcd_config_s *pconf)
 	hactive = pconf->lcd_basic.h_active;
 	bit_rate_required = pconf->lcd_timing.lcd_clk * 3 * dsi_vconf.data_bits;
 	bit_rate_required = bit_rate_required / lane_num;
-	if (dconf->bit_rate > bit_rate_required)
+	if (pconf->lcd_timing.bit_rate > bit_rate_required)
 		multi_pkt_en = 1;
 	else
 		multi_pkt_en = 0;
 	if (lcd_debug_print_flag) {
 		LCDPR("non-burst: bit_rate_required=%d, bit_rate=%d\n",
-			bit_rate_required, dconf->bit_rate);
+			bit_rate_required, pconf->lcd_timing.bit_rate);
 	}
 
 	if (multi_pkt_en == 0) {
@@ -2018,11 +2019,11 @@ void lcd_mipi_dsi_config_post(struct lcd_config_s *pconf)
 
 	/* pclk lanebyteclk factor */
 	if (dconf->factor_numerator == 0) {
-		lanebyteclk = dconf->bit_rate / 8 / 1000;
+		lanebyteclk = pconf->lcd_timing.bit_rate / 8 / 1000;
 		LCDPR("pixel_clk = %d.%03dMHz, bit_rate = %d.%03dMHz\n",
 			(pclk / 1000), (pclk % 1000),
-			(dconf->bit_rate / 1000000),
-			((dconf->bit_rate / 1000) % 1000));
+			(pconf->lcd_timing.bit_rate / 1000000),
+			((pconf->lcd_timing.bit_rate / 1000) % 1000));
 #if 0
 		dconf->factor_numerator = pclk;
 		dconf->factor_denominator = lanebyteclk;
@@ -2042,7 +2043,7 @@ void lcd_mipi_dsi_config_post(struct lcd_config_s *pconf)
 		mipi_dsi_vid_mode_config(pconf);
 
 	/* phy config */
-	mipi_dsi_phy_config(&dsi_phy_config, dconf->bit_rate);
+	mipi_dsi_phy_config(&dsi_phy_config, pconf->lcd_timing.bit_rate);
 }
 
 static void mipi_dsi_host_on(struct lcd_config_s *pconf)

drivers/amlogic/media/vout/lcd/lcd_tv/lcd_drv.c

@@ -1511,7 +1511,7 @@ static void lcd_vbyone_config_set(struct lcd_config_s *pconf)
 	bit_rate = bit_rate * 1000; /* Hz */
 
 	pconf->lcd_control.vbyone_config->phy_div = phy_div;
-	pconf->lcd_control.vbyone_config->bit_rate = bit_rate;
+	pconf->lcd_timing.bit_rate = bit_rate;
 
 	if (lcd_debug_print_flag) {
 		LCDPR("lane_count=%u, bit_rate = %uMHz, pclk=%u.%03uMhz\n",
@@ -1535,7 +1535,7 @@ static void lcd_mlvds_config_set(struct lcd_config_s *pconf)
 	pclk = pconf->lcd_timing.lcd_clk / 1000;
 	bit_rate = lcd_bits * 3 * pclk / channel_num;
 
-	pconf->lcd_control.mlvds_config->bit_rate = bit_rate * 1000;
+	pconf->lcd_timing.bit_rate = bit_rate * 1000;
 
 	if (lcd_debug_print_flag) {
 		LCDPR("channel_num=%u, bit_rate=%u.%03uMHz, pclk=%u.%03uMhz\n",
@@ -1575,6 +1575,35 @@ static void lcd_mlvds_config_set(struct lcd_config_s *pconf)
 	}
 }
 
+static void lcd_p2p_config_set(struct lcd_config_s *pconf)
+{
+	unsigned int bit_rate, pclk;
+	unsigned int lcd_bits, lane_num;
+
+	if (lcd_debug_print_flag)
+		LCDPR("%s\n", __func__);
+
+	lcd_bits = pconf->lcd_basic.lcd_bits;
+	lane_num = pconf->lcd_control.p2p_config->lane_num;
+	pclk = pconf->lcd_timing.lcd_clk / 1000;
+	switch (pconf->lcd_control.p2p_config->p2p_type) {
+	case P2P_CHPI: /* 8/10 coding */
+		bit_rate = (pclk * 3 * lcd_bits * 10 / 8) / lane_num;
+		break;
+	default:
+		bit_rate = pclk * 3 * lcd_bits / lane_num;
+		break;
+	}
+
+	pconf->lcd_timing.bit_rate = bit_rate * 1000;
+
+	if (lcd_debug_print_flag) {
+		LCDPR("lane_num=%u, bit_rate=%u.%03uMHz, pclk=%u.%03uMhz\n",
+			lane_num, (bit_rate / 1000), (bit_rate % 1000),
+			(pclk / 1000), (pclk % 1000));
+	}
+}
+
 void lcd_tv_clk_config_change(struct lcd_config_s *pconf)
 {
 #ifdef CONFIG_AMLOGIC_VPU

drivers/amlogic/media/vout/lcd/lcd_vout.c

@@ -103,7 +103,6 @@ static struct vbyone_config_s lcd_vbyone_config = {
 	.byte_mode = 4,
 	.color_fmt = 4,
 	.phy_div = 1,
-	.bit_rate = 0,
 	.phy_vswing = VX1_PHY_VSWING_DFT,
 	.phy_preem = VX1_PHY_PREEM_DFT,
 	.intr_en = 1,
@@ -126,7 +125,6 @@ static struct mlvds_config_s lcd_mlvds_config = {
 	.phy_preem = 0,
 
 	.pi_clk_sel = 0,
-	.bit_rate = 0,
 };
 
 static struct p2p_config_s lcd_p2p_config = {
@@ -140,9 +138,6 @@ static struct p2p_config_s lcd_p2p_config = {
 	.bit_swap = 0,
 	.phy_vswing = 0,
 	.phy_preem = 0,
-
-	.pi_clk_sel = 0,
-	.bit_rate = 0,
 };
 
 static unsigned char dsi_init_on_table[DSI_INIT_ON_MAX] = {0xff, 0xff};
@@ -207,6 +202,7 @@ static struct lcd_config_s lcd_config_dft = {
 		.clk_auto = 1,
 		.ss_level = 0,
 		.fr_adjust_type = 0,
+		.bit_rate = 0,
 	},
 	.optical_info = {
 		.hdr_support = 0,

include/linux/amlogic/media/vout/lcd/lcd_vout.h

@@ -139,6 +139,7 @@ struct lcd_timing_s {
 	unsigned char clk_auto; /* clk parameters auto generation */
 	unsigned int lcd_clk;   /* pixel clock(unit: Hz) */
 	unsigned int lcd_clk_dft; /* internal used */
+	unsigned int bit_rate; /* Hz */
 	unsigned int h_period_dft; /* internal used */
 	unsigned int v_period_dft; /* internal used */
 	unsigned char clk_change; /* internal used */
@@ -238,7 +239,6 @@ struct vbyone_config_s {
 	unsigned int byte_mode;
 	unsigned int color_fmt;
 	unsigned int phy_div;
-	unsigned int bit_rate;
 	unsigned int phy_vswing; /*[4]:ext_pullup, [3:0]vswing*/
 	unsigned int phy_preem;
 	unsigned int intr_en;
@@ -295,7 +295,6 @@ struct dsi_config_s {
 	unsigned char lane_num;
 	unsigned int bit_rate_max; /* MHz */
 	unsigned int bit_rate_min; /* MHz*/
-	unsigned int bit_rate; /* Hz */
 	unsigned int clk_factor; /* bit_rate/pclk */
 	unsigned int factor_numerator;
 	unsigned int factor_denominator; /* 100 */
@@ -336,7 +335,6 @@ struct mlvds_config_s {
 
 	/* internal used */
 	unsigned int pi_clk_sel; /* bit[9:0] */
-	unsigned int bit_rate; /* Hz */
 };
 
 enum p2p_type_e {
@@ -357,10 +355,6 @@ struct p2p_config_s {
 	unsigned int bit_swap; /* MSB/LSB reverse */
 	unsigned int phy_vswing;
 	unsigned int phy_preem;
-
-	/* internal used */
-	unsigned int pi_clk_sel; /* bit[9:0] */
-	unsigned int bit_rate; /* Hz */
 };
 
 struct lcd_control_config_s {