mirror of
https://github.com/hardkernel/linux.git
synced 2026-06-06 02:50:49 +09:00
Revert "FROMLIST: pwm: Convert period and duty cycle to u64"
This reverts commit d2ee0ef1e0
Causes build errors on 5.8-rc1, hopefully a new version will be
submitted upstream, no need to keep this around at the moment.
Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: I9d13a5b727ebc9dd4aaa591bb64d28adef8cb38c
This commit is contained in:
@@ -89,7 +89,7 @@ static int clk_pwm_probe(struct platform_device *pdev)
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}
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if (of_property_read_u32(node, "clock-frequency", &clk_pwm->fixed_rate))
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clk_pwm->fixed_rate = div64_u64(NSEC_PER_SEC, pargs.period);
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clk_pwm->fixed_rate = NSEC_PER_SEC / pargs.period;
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if (pargs.period != NSEC_PER_SEC / clk_pwm->fixed_rate &&
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pargs.period != DIV_ROUND_UP(NSEC_PER_SEC, clk_pwm->fixed_rate)) {
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@@ -1929,10 +1929,11 @@ static int pwm_setup_backlight(struct intel_connector *connector,
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return retval;
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}
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level = DIV64_U64_ROUND_UP(pwm_get_duty_cycle(panel->backlight.pwm) * 100,
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CRC_PMIC_PWM_PERIOD_NS);
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panel->backlight.level =
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intel_panel_compute_brightness(connector, level);
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panel->backlight.min = 0; /* 0% */
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panel->backlight.max = 100; /* 100% */
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panel->backlight.level = DIV_ROUND_UP(
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pwm_get_duty_cycle(panel->backlight.pwm) * 100,
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CRC_PMIC_PWM_PERIOD_NS);
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panel->backlight.enabled = panel->backlight.level != 0;
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drm_info(&dev_priv->drm, "Using %s PWM for LCD backlight control\n",
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@@ -447,7 +447,7 @@ static int pwm_fan_resume(struct device *dev)
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return 0;
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pwm_get_args(ctx->pwm, &pargs);
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duty = DIV_ROUND_UP_ULL(ctx->pwm_value * (pargs.period - 1), MAX_PWM);
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duty = DIV_ROUND_UP(ctx->pwm_value * (pargs.period - 1), MAX_PWM);
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ret = pwm_config(ctx->pwm, duty, pargs.period);
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if (ret)
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return ret;
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@@ -241,7 +241,7 @@ static int ir_rx51_probe(struct platform_device *dev)
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}
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/* Use default, in case userspace does not set the carrier */
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ir_rx51.freq = DIV_ROUND_CLOSEST_ULL(pwm_get_period(pwm), NSEC_PER_SEC);
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ir_rx51.freq = DIV_ROUND_CLOSEST(pwm_get_period(pwm), NSEC_PER_SEC);
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pwm_put(pwm);
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hrtimer_init(&ir_rx51.timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
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@@ -1285,8 +1285,8 @@ static void pwm_dbg_show(struct pwm_chip *chip, struct seq_file *s)
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if (state.enabled)
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seq_puts(s, " enabled");
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seq_printf(s, " period: %llu ns", state.period);
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seq_printf(s, " duty: %llu ns", state.duty_cycle);
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seq_printf(s, " period: %u ns", state.period);
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seq_printf(s, " duty: %u ns", state.duty_cycle);
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seq_printf(s, " polarity: %s",
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state.polarity ? "inverse" : "normal");
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@@ -43,7 +43,7 @@ static void clps711x_pwm_update_val(struct clps711x_chip *priv, u32 n, u32 v)
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static unsigned int clps711x_get_duty(struct pwm_device *pwm, unsigned int v)
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{
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/* Duty cycle 0..15 max */
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return DIV64_U64_ROUND_CLOSEST(v * 0xf, pwm->args.period);
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return DIV_ROUND_CLOSEST(v * 0xf, pwm->args.period);
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}
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static int clps711x_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
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@@ -124,7 +124,7 @@ static int pwm_imx_tpm_round_state(struct pwm_chip *chip,
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real_state->duty_cycle = state->duty_cycle;
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tmp = (u64)p->mod * real_state->duty_cycle;
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p->val = DIV64_U64_ROUND_CLOSEST(tmp, real_state->period);
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p->val = DIV_ROUND_CLOSEST_ULL(tmp, real_state->period);
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real_state->polarity = state->polarity;
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real_state->enabled = state->enabled;
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@@ -202,7 +202,7 @@ static void pwm_imx27_wait_fifo_slot(struct pwm_chip *chip,
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sr = readl(imx->mmio_base + MX3_PWMSR);
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fifoav = FIELD_GET(MX3_PWMSR_FIFOAV, sr);
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if (fifoav == MX3_PWMSR_FIFOAV_4WORDS) {
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period_ms = DIV_ROUND_UP_ULL(pwm_get_period(pwm),
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period_ms = DIV_ROUND_UP(pwm_get_period(pwm),
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NSEC_PER_MSEC);
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msleep(period_ms);
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@@ -235,7 +235,8 @@ static int pwm_imx27_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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period_cycles /= prescale;
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c = clkrate * state->duty_cycle;
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duty_cycles = div64_u64(c, NSEC_PER_SEC * prescale);
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do_div(c, NSEC_PER_SEC * prescale);
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duty_cycles = c;
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/*
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* according to imx pwm RM, the real period value should be PERIOD
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@@ -181,7 +181,7 @@ static int pwm_sifive_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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* consecutively
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*/
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num = (u64)duty_cycle * (1U << PWM_SIFIVE_CMPWIDTH);
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frac = DIV64_U64_ROUND_CLOSEST(num, state->period);
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frac = DIV_ROUND_CLOSEST_ULL(num, state->period);
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/* The hardware cannot generate a 100% duty cycle */
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frac = min(frac, (1U << PWM_SIFIVE_CMPWIDTH) - 1);
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@@ -371,10 +371,10 @@ static int sti_pwm_capture(struct pwm_chip *chip, struct pwm_device *pwm,
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effective_ticks = clk_get_rate(pc->cpt_clk);
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result->period = (high + low) * NSEC_PER_SEC;
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do_div(result->period, effective_ticks);
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result->period /= effective_ticks;
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result->duty_cycle = high * NSEC_PER_SEC;
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do_div(result->duty_cycle, effective_ticks);
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result->duty_cycle /= effective_ticks;
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break;
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@@ -61,7 +61,7 @@ static int stm32_pwm_lp_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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do_div(div, NSEC_PER_SEC);
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if (!div) {
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/* Clock is too slow to achieve requested period. */
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dev_dbg(priv->chip.dev, "Can't reach %llu ns\n", state->period);
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dev_dbg(priv->chip.dev, "Can't reach %u ns\n", state->period);
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return -EINVAL;
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}
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@@ -285,7 +285,7 @@ static int sun4i_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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val = (duty & PWM_DTY_MASK) | PWM_PRD(period);
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sun4i_pwm_writel(sun4i_pwm, val, PWM_CH_PRD(pwm->hwpwm));
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sun4i_pwm->next_period[pwm->hwpwm] = jiffies +
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usecs_to_jiffies(div_u64(cstate.period, 1000) + 1);
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usecs_to_jiffies(cstate.period / 1000 + 1);
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if (state->polarity != PWM_POLARITY_NORMAL)
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ctrl &= ~BIT_CH(PWM_ACT_STATE, pwm->hwpwm);
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@@ -42,7 +42,7 @@ static ssize_t period_show(struct device *child,
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pwm_get_state(pwm, &state);
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return sprintf(buf, "%llu\n", state.period);
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return sprintf(buf, "%u\n", state.period);
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}
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static ssize_t period_store(struct device *child,
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@@ -52,10 +52,10 @@ static ssize_t period_store(struct device *child,
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struct pwm_export *export = child_to_pwm_export(child);
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struct pwm_device *pwm = export->pwm;
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struct pwm_state state;
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u64 val;
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unsigned int val;
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int ret;
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ret = kstrtou64(buf, 0, &val);
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ret = kstrtouint(buf, 0, &val);
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if (ret)
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return ret;
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@@ -77,7 +77,7 @@ static ssize_t duty_cycle_show(struct device *child,
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pwm_get_state(pwm, &state);
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return sprintf(buf, "%llu\n", state.duty_cycle);
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return sprintf(buf, "%u\n", state.duty_cycle);
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}
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static ssize_t duty_cycle_store(struct device *child,
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@@ -212,7 +212,7 @@ static ssize_t capture_show(struct device *child,
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if (ret)
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return ret;
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return sprintf(buf, "%llu %llu\n", result.period, result.duty_cycle);
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return sprintf(buf, "%u %u\n", result.period, result.duty_cycle);
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}
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static ssize_t output_type_show(struct device *child,
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@@ -606,8 +606,7 @@ static int pwm_backlight_probe(struct platform_device *pdev)
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pb->scale = data->max_brightness;
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}
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pb->lth_brightness = data->lth_brightness * (div_u64(state.period,
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pb->scale));
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pb->lth_brightness = data->lth_brightness * (state.period / pb->scale);
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props.type = BACKLIGHT_RAW;
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props.max_brightness = data->max_brightness;
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@@ -39,7 +39,7 @@ enum pwm_polarity {
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* current PWM hardware state.
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*/
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struct pwm_args {
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u64 period;
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unsigned int period;
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enum pwm_polarity polarity;
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};
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@@ -67,8 +67,8 @@ enum pwm_output_type {
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* @enabled: PWM enabled status
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*/
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struct pwm_state {
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u64 period;
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u64 duty_cycle;
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unsigned int period;
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unsigned int duty_cycle;
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enum pwm_polarity polarity;
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enum pwm_output_type output_type;
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bool enabled;
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@@ -119,13 +119,13 @@ static inline bool pwm_is_enabled(const struct pwm_device *pwm)
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return state.enabled;
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}
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static inline void pwm_set_period(struct pwm_device *pwm, u64 period)
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static inline void pwm_set_period(struct pwm_device *pwm, unsigned int period)
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{
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if (pwm)
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pwm->state.period = period;
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}
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static inline u64 pwm_get_period(const struct pwm_device *pwm)
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static inline unsigned int pwm_get_period(const struct pwm_device *pwm)
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{
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struct pwm_state state;
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@@ -140,7 +140,7 @@ static inline void pwm_set_duty_cycle(struct pwm_device *pwm, unsigned int duty)
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pwm->state.duty_cycle = duty;
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}
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static inline u64 pwm_get_duty_cycle(const struct pwm_device *pwm)
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static inline unsigned int pwm_get_duty_cycle(const struct pwm_device *pwm)
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{
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struct pwm_state state;
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@@ -332,8 +332,8 @@ struct pwm_chip {
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* @duty_cycle: duty cycle of the PWM signal (in nanoseconds)
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*/
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struct pwm_capture {
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u64 period;
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u64 duty_cycle;
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unsigned int period;
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unsigned int duty_cycle;
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};
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#if IS_ENABLED(CONFIG_PWM)
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