arm64: dts: rockchip: move usb dwc3 reset to core node for rk3399

This patch moves the reset property of usb dwc3_0 and dwc3_1
to the dwc3 core node, then it can reset the dwc3 controller
in runtime PM and sleep PM, rather than only reset in sleep
PM. This can help to fix typec phy power on fail with the
following log when do hotplug test with Type-C dongle.

phy phy-ff7c0000.phy.9: phy poweron failed --> -110

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I27c90147591f83e8cacb8147ed49c1c6c9646a46
This commit is contained in:
William Wu
2022-03-25 17:12:43 +08:00
committed by Tao Huang
parent f4e9d0fcb4
commit fd2afc4fcd

View File

@@ -428,8 +428,6 @@
clock-names = "ref_clk", "suspend_clk",
"bus_clk", "aclk_usb3_rksoc_axi_perf",
"aclk_usb3", "grf_clk";
resets = <&cru SRST_A_USB3_OTG0>;
reset-names = "usb3-otg";
status = "disabled";
usbdrd_dwc3_0: usb@fe800000 {
@@ -439,6 +437,8 @@
clocks = <&cru SCLK_USB3OTG0_REF>, <&cru ACLK_USB3OTG0>,
<&cru SCLK_USB3OTG0_SUSPEND>;
clock-names = "ref", "bus_early", "suspend";
resets = <&cru SRST_A_USB3_OTG0>;
reset-names = "usb3-otg";
dr_mode = "otg";
phys = <&u2phy0_otg>, <&tcphy0_usb3>;
phy-names = "usb2-phy", "usb3-phy";
@@ -466,8 +466,6 @@
clock-names = "ref_clk", "suspend_clk",
"bus_clk", "aclk_usb3_rksoc_axi_perf",
"aclk_usb3", "grf_clk";
resets = <&cru SRST_A_USB3_OTG1>;
reset-names = "usb3-otg";
status = "disabled";
usbdrd_dwc3_1: usb@fe900000 {
@@ -477,6 +475,8 @@
clocks = <&cru SCLK_USB3OTG1_REF>, <&cru ACLK_USB3OTG1>,
<&cru SCLK_USB3OTG1_SUSPEND>;
clock-names = "ref", "bus_early", "suspend";
resets = <&cru SRST_A_USB3_OTG1>;
reset-names = "usb3-otg";
dr_mode = "otg";
phys = <&u2phy1_otg>, <&tcphy1_usb3>;
phy-names = "usb2-phy", "usb3-phy";