shinys000114/linux
1
0
Fork 0
mirror of https://github.com/hardkernel/linux.git synced 2026-06-05 02:21:52 +09:00
Code Issues Packages Projects Releases Wiki Activity

drm/amd/display: Clean Up VPG Low Mem Power

Browse Source 
[WHAT]
One of the current VPG power on calls is unnecessary

Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Michael Strauss
2021-09-21 13:35:19 -04:00
committed by Alex Deucher
parent 05692bb02a
commit fd8811e60d
3 changed files with 13 additions and 14 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
drivers/gpu/drm/amd/display/dc/core/dc.c
View File

@@ -71,8 +71,6 @@
#include "dmub/dmub_srv.h"
#include "dcn30/dcn30_vpg.h"
#include "i2caux_interface.h"
#include "dce/dmub_hw_lock_mgr.h"
@@ -2674,9 +2672,6 @@ static void commit_planes_do_stream_update(struct dc *dc,
enum surface_update_type update_type,
struct dc_state *context)
{
#if defined(CONFIG_DRM_AMD_DC_DCN)
struct vpg *vpg;
#endif
int j;
// Stream updates
@@ -2697,11 +2692,6 @@ static void commit_planes_do_stream_update(struct dc *dc,
stream_update->vrr_infopacket ||
stream_update->vsc_infopacket ||
stream_update->vsp_infopacket) {
#if defined(CONFIG_DRM_AMD_DC_DCN)
vpg = pipe_ctx->stream_res.stream_enc->vpg;
if (vpg && vpg->funcs->vpg_poweron)
vpg->funcs->vpg_poweron(vpg);
#endif
resource_build_info_frame(pipe_ctx);
dc->hwss.update_info_frame(pipe_ctx);
}

13
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c
View File

@@ -49,6 +49,7 @@
#include "inc/link_dpcd.h"
#include "dcn10/dcn10_hw_sequencer.h"
#include "inc/link_enc_cfg.h"
#include "dcn30/dcn30_vpg.h"
#define DC_LOGGER_INIT(logger)
@@ -126,6 +127,18 @@ void dcn31_init_hw(struct dc *dc)
REG_UPDATE(MMHUBBUB_MEM_PWR_CNTL, VGA_MEM_PWR_FORCE, 1);
}
#if defined(CONFIG_DRM_AMD_DC_DCN)
if (dc->debug.enable_mem_low_power.bits.vpg && dc->res_pool->stream_enc[0]->vpg->funcs->vpg_powerdown) {
// Power down VPGs
for (i = 0; i < dc->res_pool->stream_enc_count; i++)
dc->res_pool->stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->stream_enc[i]->vpg);
#if defined(CONFIG_DRM_AMD_DC_DP2_0)
for (i = 0; i < dc->res_pool->hpo_dp_stream_enc_count; i++)
dc->res_pool->hpo_dp_stream_enc[i]->vpg->funcs->vpg_powerdown(dc->res_pool->hpo_dp_stream_enc[i]->vpg);
#endif
}
#endif
if (dc->ctx->dc_bios->fw_info_valid) {
res_pool->ref_clocks.xtalin_clock_inKhz =
dc->ctx->dc_bios->fw_info.pll_info.crystal_frequency;

4
drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c
View File

@@ -1312,10 +1312,6 @@ static struct vpg *dcn31_vpg_create(
&vpg_shift,
&vpg_mask);
// Will re-enable hw block when we enable stream
// Check for enabled stream before powering down?
vpg31_powerdown(&vpg31->base);
return &vpg31->base;
}