dts: arch32: sync dtb between aarch64 and aarch32

PD#173683: remove unnecessary difference between aarch32 and aarch64

Change-Id: I9a1248e3d38dadf9cc6c4bb5e0a6f8c5dbd24a0a
Signed-off-by: Jianxin Pan <jianxin.pan@amlogic.com>
This commit is contained in:
Jianxin Pan
2018-09-14 16:53:47 +08:00
parent a98b098845
commit fd9dacf2d1
7 changed files with 302 additions and 77 deletions

View File

@@ -31,15 +31,30 @@
#address-cells = <1>;
#size-cells = <0>;
cpu-map {
cluster0:cluster0 {
core0 {
cpu = <&CPU0>;
};
core1 {
cpu = <&CPU1>;
};
core2 {
cpu = <&CPU2>;
};
core3 {
cpu = <&CPU3>;
};
};
};
CPU0:cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x0>;
//timer=<&timer_a>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
clock-names = "cpu-cluster.0";
/*cpu-idle-states = <&SYSTEM_SLEEP_0>;*/
cpu-idle-states = <&SYSTEM_SLEEP_0>;
/*cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;*/
};
@@ -47,22 +62,20 @@
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x1>;
//timer=<&timer_b>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
clock-names = "cpu-cluster.0";
/*cpu-idle-states = <&SYSTEM_SLEEP_0>;*/
cpu-idle-states = <&SYSTEM_SLEEP_0>;
/*cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;*/
};
CPU2:cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x2>;
//timer=<&timer_c>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
clock-names = "cpu-cluster.0";
/*cpu-idle-states = <&SYSTEM_SLEEP_0>;*/
cpu-idle-states = <&SYSTEM_SLEEP_0>;
/*cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;*/
};
@@ -70,14 +83,35 @@
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x3>;
//timer=<&timer_d>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
clock-names = "cpu-cluster.0";
/*cpu-idle-states = <&SYSTEM_SLEEP_0>;*/
cpu-idle-states = <&SYSTEM_SLEEP_0>;
/*cpu-idle-states = <&CPU_SLEEP_0 &SYSTEM_SLEEP_0>;*/
};
idle-states {
entry-method = "arm,psci";
/*
CPU_SLEEP_0: cpu-sleep-0 {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
local-timer-stop;
entry-latency-us = <3000>;
exit-latency-us = <3000>;
min-residency-us = <8000>;
};
*/
SYSTEM_SLEEP_0: system-sleep-0 {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
local-timer-stop;
entry-latency-us = <0x3fffffff>;
exit-latency-us = <0x40000000>;
min-residency-us = <0xffffffff>;
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 0xff08>,
@@ -673,17 +707,17 @@
};
/*
* sd_clk_cmd_pins:sd_clk_cmd_pins{
* };
* sd_all_pins:sd_all_pins {
* };
* sd_1bit_uart_pins:sd_1bit_uart_pins{
* };
* sd_clk_cmd_uart_pins:sd_clk_cmd_uart_pins {
* };
* sd_to_ao_jtag_pins:sd_to_ao_jtag_pins{
* };
*/
* sd_clk_cmd_pins:sd_clk_cmd_pins{
* };
* sd_all_pins:sd_all_pins {
* };
* sd_1bit_uart_pins:sd_1bit_uart_pins{
* };
* sd_clk_cmd_uart_pins:sd_clk_cmd_uart_pins {
* };
* sd_to_ao_jtag_pins:sd_to_ao_jtag_pins{
* };
*/
ao_to_sd_uart_clr_pins:ao_to_sd_uart_clr_pins {
mux {
groups = "sdcard_d2",
@@ -1007,6 +1041,84 @@
};
};
lcd_ttl_rgb_6bit_on_pins:lcd_ttl_rgb_6bit_on{
mux {
groups = "lcd_r2_7",
"lcd_g2_7",
"lcd_b2_7";
function = "lcd_ttl";
};
};
lcd_ttl_rgb_6bit_off_pins:lcd_ttl_rgb_6bit_off{
mux {
groups = "GPIODV_2","GPIODV_3","GPIODV_4",
"GPIODV_5","GPIODV_6","GPIODV_7",
"GPIODV_10","GPIODV_11","GPIODV_12",
"GPIODV_13","GPIODV_14","GPIODV_15",
"GPIODV_18","GPIODV_19","GPIODV_20",
"GPIODV_21","GPIODV_22","GPIODV_23";
function = "gpio_periphs";
input-enable;
};
};
lcd_ttl_rgb_8bit_on_pins:lcd_ttl_rgb_8bit_on{
mux {
groups = "lcd_r0_1", "lcd_r2_7",
"lcd_g0_1", "lcd_g2_7",
"lcd_b0_1", "lcd_b2_7";
function = "lcd_ttl";
};
};
lcd_ttl_rgb_8bit_off_pins:lcd_ttl_rgb_8bit_off{
mux {
groups = "GPIODV_0","GPIODV_1","GPIODV_2","GPIODV_3",
"GPIODV_4","GPIODV_5","GPIODV_6","GPIODV_7",
"GPIODV_8","GPIODV_9","GPIODV_10","GPIODV_11",
"GPIODV_12","GPIODV_13","GPIODV_14","GPIODV_15",
"GPIODV_16","GPIODV_17","GPIODV_18","GPIODV_19",
"GPIODV_20","GPIODV_21","GPIODV_22","GPIODV_23";
function = "gpio_periphs";
input-enable;
};
};
/* DE + clk */
lcd_ttl_de_on_pins:lcd_ttl_de_on_pin{
mux {
groups = "tcon_cph", /* clk */
"tcon_oeh"; /* DE */
function = "lcd_ttl";
};
};
/* hvsync + clk */
lcd_ttl_hvsync_on_pins:lcd_ttl_hvsync_on_pin{
mux {
groups = "tcon_cph", /* clk */
"tcon_stv1", /* vs */
"tcon_sth1"; /* hs */
function = "lcd_ttl";
};
};
/* DE + hvsync + clk */
lcd_ttl_de_hvsync_on_pins:lcd_ttl_de_hvsync_on_pin{
mux {
groups = "tcon_cph", /* clk */
"tcon_oeh", /* DE */
"tcon_stv1", /* vs */
"tcon_sth1"; /* hs */
function = "lcd_ttl";
};
};
lcd_ttl_de_hvsync_off_pins:lcd_ttl_de_hvsync_off_pin{
mux {
groups = "GPIODV_26", /* clk */
"GPIODV_27", /* DE */
"GPIODV_24", /* vs */
"GPIODV_25"; /* hs */
function = "gpio_periphs";
input-enable;
};
};
}; /* end of pinctrl_periphs */
&periphs {
@@ -1312,6 +1424,12 @@
interrupts = <0 52 1>;
interrupt-names = "ddr_bandwidth";
};
dmc_monitor {
compatible = "amlogic, dmc_monitor";
status = "okay";
reg_base = <0xda838400>;
interrupts = <0 51 1>;
};
};
&gpu{

View File

@@ -31,11 +31,26 @@
#address-cells = <1>;
#size-cells = <0>;
#cooling-cells = <2>;/* min followed by max */
cpu-map {
cluster0:cluster0 {
core0 {
cpu = <&CPU0>;
};
core1 {
cpu = <&CPU1>;
};
core2 {
cpu = <&CPU2>;
};
core3 {
cpu = <&CPU3>;
};
};
};
CPU0:cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x0>;
//timer=<&timer_a>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
clock-names = "cpu-cluster.0";
@@ -46,7 +61,6 @@
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x1>;
//timer=<&timer_b>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
clock-names = "cpu-cluster.0";
@@ -56,7 +70,6 @@
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x2>;
//timer=<&timer_c>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
clock-names = "cpu-cluster.0";
@@ -67,12 +80,35 @@
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0x0 0x3>;
//timer=<&timer_d>;
enable-method = "psci";
clocks = <&scpi_dvfs 0>;
clock-names = "cpu-cluster.0";
//cpu-idle-states = <&SYSTEM_SLEEP_0>;
};
idle-states {
entry-method = "arm,psci";
/*
CPU_SLEEP_0: cpu-sleep-0 {
compatible = "arm,idle-state";
arm,psci-suspend-param = <0x0010000>;
local-timer-stop;
entry-latency-us = <3000>;
exit-latency-us = <3000>;
min-residency-us = <8000>;
};
*/
/*
* SYSTEM_SLEEP_0: system-sleep-0 {
* compatible = "arm,idle-state";
* arm,psci-suspend-param = <0x0010000>;
* local-timer-stop;
* entry-latency-us = <0x3fffffff>;
* exit-latency-us = <0x40000000>;
* min-residency-us = <0xffffffff>;
* };
*/
};
};
timer {
@@ -892,6 +928,12 @@
interrupts = <0 52 1>;
interrupt-names = "ddr_bandwidth";
};
dmc_monitor {
compatible = "amlogic, dmc_monitor";
status = "okay";
reg_base = <0xff638800>;
interrupts = <0 51 1>;
};
cpu_ver_name {
compatible = "amlogic, cpu-major-id-txlx";
@@ -1197,14 +1239,21 @@
function = "vbyone";
};
};
lcd_vbyone_off_pins: lcd_vbyone_off_pin {
mux {
groups = "GPIOH_0","GPIOH_1";
function = "gpio_periphs";
input-enable;
};
};
lcd_ttl_rgb_6bit_pins_on:lcd_ttl_rgb_6bit_on{
lcd_ttl_rgb_6bit_on_pins:lcd_ttl_rgb_6bit_on{
mux {
groups = "lcd_r2_7","lcd_g2_7","lcd_b2_7";
function = "lcd";
};
};
lcd_ttl_rgb_6bit_pins_off:lcd_ttl_rgb_6bit_off{
lcd_ttl_rgb_6bit_off_pins:lcd_ttl_rgb_6bit_off{
mux {
groups = "GPIOY_2","GPIOY_3","GPIOY_4","GPIOY_5",
"GPIOY_6","GPIOY_7", /*r2~7*/
@@ -1216,7 +1265,7 @@
input-enable;
};
};
lcd_ttl_rgb_8bit_pins_on:lcd_ttl_rgb_8bit_on{
lcd_ttl_rgb_8bit_on_pins:lcd_ttl_rgb_8bit_on{
mux {
groups = "lcd_r0_1","lcd_r2_7",
"lcd_g0_1","lcd_g2_7",
@@ -1224,7 +1273,7 @@
function = "lcd";
};
};
lcd_ttl_rgb_8bit_pins_off:lcd_ttl_rgb_8bit_off{
lcd_ttl_rgb_8bit_off_pins:lcd_ttl_rgb_8bit_off{
mux {
groups = "GPIOY_0","GPIOY_1","GPIOY_2","GPIOY_3",
"GPIOY_4","GPIOY_5", "GPIOY_6","GPIOY_7",

View File

@@ -31,8 +31,9 @@
interrupts = <0 3 1
0 78 1>;
interrupt-names = "vsync","vbyone";
pinctrl-names = "vbyone";
pinctrl-names = "vbyone","vbyone_off";
pinctrl-0 = <&lcd_vbyone_pins>;
pinctrl-1 = <&lcd_vbyone_off_pins>;
pinctrl_version = <2>; /* for uboot */
/* power type:(0=cpu_gpio, 2=signal, 3=extern, 0xff=ending) */
@@ -457,16 +458,15 @@
status = "okay";
key_valid = <1>;
i2c_bus = "i2c_bus_c";
/*pinctrl-names="extern_pins";*/
/*pinctrl_names_uboot = "i2c_c";*/ /* i2c_a, i2c_b, i2c_c */
/*pinctrl-0=<&i2c_c_master>;*/
/*extern-gpios = <&gpio GPIOH_2 1*/
/*&gpio GPIOH_3 1>;*/
/*pinctrl-names="extern_on", */
/* "extern_off"; */
/*pinctrl-0=<&i2c2_h_pins */
/* &lcd_extern_off_pins>; */
/*pinctrl_gpio_off = <0>; */
/*extern-gpios = <&gpio GPIOH_2 GPIO_ACTIVE_HIGH*/
/* &gpio GPIOH_3 GPIO_ACTIVE_HIGH>;*/
/*extern_gpio_names = "GPIOH_2","GPIOH_3";*/
/*i2c_gpio_off = <0 0 1 0>; */
/* I2C_SCK_gpio_index, I2C_SCK_gpio_off,
* I2C_SDA_gpio_index, I2C_SCK_gpio_off
*/
/*i2c_gpio = <0 1>; //i2c_sck, i2c_sda gpio_index */
extern_0{
index = <0>;
@@ -475,7 +475,6 @@
type = <0>; /*0=i2c, 1=spi, 2=mipi*/
i2c_address = <0x1c>; /*7bit i2c_addr*/
i2c_second_address = <0xff>;
i2c_bus = "i2c_bus_c";
cmd_size = <0xff>; /*dynamic cmd_size*/
/* init on/off:
@@ -509,7 +508,6 @@
status = "disabled";
type = <0>; /* 0=i2c, 1=spi, 2=mipi */
i2c_address = <0x1c>; /* 7bit i2c address */
i2c_bus = "i2c_bus_c";
cmd_size = <9>;
};
};
@@ -522,7 +520,9 @@
pinctrl-names = "pwm_on","pwm_vs_on",
"pwm_combo_0_1_on",
"pwm_combo_0_vs_1_on",
"pwm_combo_0_1_vs_on";
"pwm_combo_0_1_vs_on",
"pwm_off",
"pwm_combo_off";
pinctrl-0 = <&bl_pwm_on_pins>;
pinctrl-1 = <&bl_pwm_vs_on_pins>;
pinctrl-2 = <&bl_pwm_combo_0_on_pins
@@ -531,6 +531,8 @@
&bl_pwm_combo_1_on_pins>;
pinctrl-4 = <&bl_pwm_combo_0_on_pins
&bl_pwm_combo_1_vs_on_pins>;
pinctrl-5 = <&bl_pwm_off_pins>;
pinctrl-6 = <&bl_pwm_combo_off_pins>;
pinctrl_version = <2>; /* for uboot */
interrupts = <0 3 1>;
interrupt-names = "ldim_vsync";
@@ -678,9 +680,12 @@
compatible = "amlogic, ldim_dev";
dev_name = "ldim_dev";
status = "okay";
pinctrl-names = "ldim_pwm","ldim_pwm_vs";
pinctrl-0 = <&ldim_pwm_pins>;
pinctrl-1 = <&ldim_pwm_vs_pins>;
pinctrl-names = "ldim_pwm",
"ldim_pwm_vs",
"ldim_pwm_off";
pinctrl-0 = <&bl_pwm_on_pins>;
pinctrl-1 = <&bl_pwm_vs_on_pins>;
pinctrl-2 = <&bl_pwm_off_pins>;
pinctrl_version = <1>; /* for uboot */
/* pwm port: PWM_A, PWM_B, PWM_C, PWM_D, PWM_E, PWM_F, PWM_VS*/

View File

@@ -474,6 +474,9 @@
// "clk_aud_out";
hdmirx_id = <0>;
en_4k_2_2k = <0>;
hpd_low_cec_off = <1>;
/* bit4: enable feature, bit3~0: port number */
disable_port = <0x0>;
reg = <0xffd26000 0xa00000
0xff63C000 0x2000
0xffe0d000 0x2000
@@ -489,7 +492,9 @@
dev_name = "vdin0";
status = "okay";
reserve-iomap = "true";
flag_cma = <0x101>;/*1:share with codec_mm;2:cma alone*/
/*bit0:(1:share with codec_mm;0:cma alone)*/
/*bit8:(1:alloc in discontinus way;0:alone in continuous way)*/
flag_cma = <0x101>;
/* MByte, if 10bit disable: 64M(YUV422),
* if 10bit enable: 64*1.5 = 96M(YUV422)
* if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
@@ -511,6 +516,8 @@
* bit2:support 10bit
* bit3:support 12bit
* bit4:support yuv422 10bit full pack mode (from txl new add)
* bit8:use 8bit at 4k_50/60hz_10bit
* bit9:use 10bit at 4k_50/60hz_10bit
*/
tv_bit_mode = <0x215>;
};
@@ -585,6 +592,10 @@
wb_en = <0>;/*1:enabel ;0:disable*/
cm_en = <0>;/*1:enabel ;0:disable*/
wb_sel = <0>;/*1:mtx ;0:gainoff*/
/*0: 709/601 1: bt2020*/
tx_op_color_primary = <0>;
/*1:enabel osd lut 100 table;0:disable*/
cfg_en_osd_100 = <1>;
};
amdolby_vision {
compatible = "amlogic, dolby_vision_txlx";
@@ -1207,6 +1218,7 @@
mute_gpio-gpios = <&gpio GPIOZ_7 GPIO_ACTIVE_HIGH>;
/*switch ARC_IN & SPDIF_IN*/
source_switch-gpios = <&gpio GPIOZ_4 GPIO_ACTIVE_HIGH>;
source_switch_inv = <1>;
/*analog amp mute*/
/*amp_mute_gpio-gpios = <&gpio GPIOZ_18 GPIO_ACTIVE_LOW>;*/
aux_dev = <&tas5707>;

View File

@@ -468,6 +468,9 @@
// "clk_aud_out";
hdmirx_id = <0>;
en_4k_2_2k = <0>;
hpd_low_cec_off = <1>;
/* bit4: enable feature, bit3~0: port number */
disable_port = <0x0>;
reg = <0xffd26000 0xa00000
0xff63C000 0x2000
0xffe0d000 0x2000
@@ -1467,11 +1470,11 @@
status = "okay";
};
lcd_extern_i2c {
compatible = "amlogic, lcd_i2c_T5800Q";
status = "disabled";
reg = <0x1c>; /*reg_address for i2c_T5800Q*/
lcd_extern_i2c0: lcd_extern_i2c@0 {
compatible = "lcd_ext, i2c";
dev_name = "i2c_T5800Q";
reg = <0x1c>;
status = "okay";
};
};
@@ -1518,6 +1521,18 @@
};
};
/*lcd_extern*/
lcd_extern_off_pins:lcd_extern_off_pin {
mux {
pins = "GPIOH_2",
"GPIOH_3";
function = "gpio_periphs";
/*output-high;*/
output-low;
/*input-enable;*/
};
};
/*backlight*/
bl_pwm_on_pins:bl_pwm_on_pin {
mux {
@@ -1531,6 +1546,13 @@
function = "pwm_vs";
};
};
bl_pwm_off_pins:bl_pwm_off_pin {
mux {
pins = "GPIOZ_6";
function = "gpio_periphs";
output-low;
};
};
bl_pwm_combo_0_on_pins:bl_pwm_combo_0_on_pin {
mux {
pins = "pwm_b";
@@ -1555,18 +1577,12 @@
function = "pwm_vs";
};
};
/*ldim*/
ldim_pwm_pins:ldim_pwm_pin {
bl_pwm_combo_off_pins:bl_pwm_combo_off_pin {
mux {
pins = "pwm_b";
function = "pwm_b";
};
};
ldim_pwm_vs_pins:ldim_pwm_vs_pin {
mux {
pins = "pwm_vs_z6";
function = "pwm_vs";
pins = "GPIOZ_6",
"GPIOZ_7";
function = "gpio_periphs";
output-low;
};
};
};

View File

@@ -20,7 +20,7 @@
#include <dt-bindings/gpio/gpio.h>
#include "mesontxlx.dtsi"
#include "partition_mbox_normal_P_32.dtsi"
#include "partition_mbox_normal.dtsi"
#include "mesontxlx_r311-panel.dtsi"
/ {
@@ -468,6 +468,9 @@
// "clk_aud_out";
hdmirx_id = <0>;
en_4k_2_2k = <0>;
hpd_low_cec_off = <1>;
/* bit4: enable feature, bit3~0: port number */
disable_port = <0x0>;
reg = <0xffd26000 0xa00000
0xff63C000 0x2000
0xffe0d000 0x2000
@@ -1471,11 +1474,12 @@
drc_enable = <0>;
status = "okay";
};
lcd_extern_i2c {
compatible = "amlogic, lcd_i2c_T5800Q";
status = "disabled";
reg = <0x1c>; /*reg_address for i2c_T5800Q*/
lcd_extern_i2c0: lcd_extern_i2c@0 {
compatible = "lcd_ext, i2c";
dev_name = "i2c_T5800Q";
reg = <0x1c>;
status = "okay";
};
};
@@ -1523,6 +1527,18 @@
};
};
/*lcd_extern*/
lcd_extern_off_pins:lcd_extern_off_pin {
mux {
pins = "GPIOH_2",
"GPIOH_3";
function = "gpio_periphs";
/*output-high;*/
output-low;
/*input-enable;*/
};
};
/*backlight*/
bl_pwm_on_pins:bl_pwm_on_pin {
mux {
@@ -1536,6 +1552,13 @@
function = "pwm_vs";
};
};
bl_pwm_off_pins:bl_pwm_off_pin {
mux {
pins = "GPIOZ_6";
function = "gpio_periphs";
output-low;
};
};
bl_pwm_combo_0_on_pins:bl_pwm_combo_0_on_pin {
mux {
pins = "pwm_b";
@@ -1560,18 +1583,12 @@
function = "pwm_vs";
};
};
/*ldim*/
ldim_pwm_pins:ldim_pwm_pin {
bl_pwm_combo_off_pins:bl_pwm_combo_off_pin {
mux {
pins = "pwm_b";
function = "pwm_b";
};
};
ldim_pwm_vs_pins:ldim_pwm_vs_pin {
mux {
pins = "pwm_vs_z6";
function = "pwm_vs";
pins = "GPIOZ_6",
"GPIOZ_7";
function = "gpio_periphs";
output-low;
};
};
};

View File

@@ -3,8 +3,16 @@
export CROSS_COMPILE=/opt/gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabihf/bin/arm-linux-gnueabihf-
make ARCH=arm meson64_a32_defconfig
make ARCH=arm txl_t962_p321.dtb || echo "Compile dtb Fail !!"
make ARCH=arm txlx_t962x_r311_1g.dtb || echo "Compile dtb Fail !!"
make ARCH=arm gxl_p212_1g.dtb
make ARCH=arm gxl_p212_2g.dtb
make ARCH=arm meson8b_m200.dtb
make ARCH=arm meson8b_m400.dtb
make ARCH=arm meson8b_skt.dtb
make ARCH=arm txl_t962_p321.dtb
make ARCH=arm txlx_t962e_r321.dtb
make ARCH=arm txlx_t962x_r311_1g.dtb
make ARCH=arm txlx_t962x_r311_2g.dtb